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Technical content

Features

Applications

The SPLV2.8 was designed to protect low voltage, CMOS devices from ESD and lightning induced transients. There is a compensating diode in parallel with the low voltage TVS to protect one unidirectional line or a high speed data pair when two devices are paired together. These robust structures can safely absorb repetitive ESD strikes at ±30kV (contact discharge) per the IEC61000-4-2 standard and each structure can safely dissipate up to 40A (IEC61000-4-5, t P=8/20μs) with very low clamping voltages. Pinout Functional Block Diagram t&4% *&$ ±30kV contact, ±30kV air t&'5 *&$ (5/50ns) t-JHIUOJOH *&$ 40A (8/20μs) t-PXDBQBDJUBODFPGQ' per line (Pin 2 to 1) t-PXMFBLBHFDVSSFOUPG 1μA (MAX) at 2.8V t4NBMM405 +&%&$ TO-236) package saves board space t&UIFSOFU t8"/-"/&RVJQNFOU t4XJUDIJOH4ZTUFNT t%FTLUPQT 4FSWFST BOE Notebooks t"OBMPH*OQVUT t#BTF4UBUJPOT 1 2 1 2 RoHS Pb GREEN Ethernet PHY RJ -45 Connector NC NC Application Example See Application Example Detail section on page 135 for more information SPLV2.8 Series 2.8V 40A TVS Array

141©2012 Littelfuse, Inc. Specifications are subject to change without notice. Please refer to www.littelfuse.com/SPA for current information. TVS Diode Arrays (SPA™ Family of Products) Revision: March 20, 2012 SPL V2.8 Series SPLV2.8 Lightning Surge Protection - SPLV2.8 Series Product Characteristics Lead Plating Matte Tin Lead Material Copper Alloy Lead Coplanarity 0.0004 inches (0.102mm) Substitute Material Silicon Body Material Molded Epoxy Flammability UL 94 V-0 Notes : 1 . All dimensions are in millimeters 2. Dimensions include solder plating. 3. Dimensions are exclusive of mold flash & metal burr. 4. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form. 5. Package surface matte finish VDI 11-13. Time Temperature TP TL TS(max) TS(min) tP tL tS time to peak temperature PreheatPreheat Ramp-upRamp-up Ramp-downRamp-do Critical Zone TL to TP Critical Zone TL to TP Reflow Condition Pb – Free assembly Pre Heat - Temperature Min (Ts(min)) 150°C - Temperature Max (Ts(max)) 200°C - Time (min to max) (ts) 60 – 180 secs Average ramp up rate (Liquidus) Temp (TL) to peak 3°C/second max TS(max) to TL - Ramp-up Rate 3°C/second max Reflow - Temperature (TL) (Liquidus) 217°C - Temperature (tL) 60 – 150 seconds Peak Temperature (TP) 260+0/-5 °C Time within 5°C of actual peak Temperature (tp) 20 – 40 seconds Ramp-down Rate 6°C/second max Time 25°C to peak Temperature (TP) 8 minutes Max. Do not exceed 260°C Soldering Parameters Data Line Protection of one unidirectional line Ethernet PHY RJ -45 Connector NC NC Protection of one unidirectional data line is realized by connecting pin 3 to the protected line, and pins 1 and 2 to GND. In this configuration, the device presents a maximum loading capacitance of tens of picofarads. During positive transients, the internal TVS diode will conduct and steer current from pin 3 to 1 (GND), clamping the data line at or below the specified voltages for the device (see Electrical Characteristics section). For negative transients, the internal compensating diode is forward biased, steering the current from pin 2 (GND) to 3. Application Example Detail Low capacitance protection of a high-speed data pair is realized by connecting two devices in antiparallel. As shown, pin 1 of the first device is connected to D1 and pin 2 is connected to D2. Additionally, pin 2 of the second device is connected to D1 and pin 1 is connected to D2. Pin 3 must be NC (or not connected) for both devices. When the potential on D1 exceeds the potential on D2 (by the rated standoff voltage), pin 2 on the second device will steer current into pin 1 . The compensating diode will conduct in the forward direction steering current into the avalanching TVS diode which is operating in the reverse direction. For the opposite transient, the first device will behave in the same manner. In this two device arrangement, the total loading capacitance is two times the rated capacitance from pin 2 to pin 1 which will typically be much less than 10pF making it suitable for high- speed data pair such as 10/100/1000 Ethernet. NC Low capacitance protection of one high speed data pair

©2012 Littelfuse, Inc. Specifications are subject to change without notice. Please refer to www.littelfuse.com/SPA for current information. 142 TVS Diode Arrays (SPA™ Family of Products) Revision: March 20, 2012 SPL V2.8 Series Lightning Surge Protection - SPLV2.8 Series Package Dimensions — SOT -23 Pins 3 JEDEC TO-236 Millimetres Inches Min Max Min Max A 0.89 1 .12 0.035 0.044 A1 0.01 0.1 0.0004 0.004 b 0.3 0.5 0.012 0.020 c 0.08 0.2 0.003 0.008 D 2.8 3.04 0.110 0.120 E 2.1 2.64 0.083 0.104 E1 1. 2 1. 4 0.047 0.055 e 0.95 BSC 0.038 BSC e1 1 .90 BSC 0.075 BSC L1 0.54 REF 0.021 REF M 2.29 .90 N 0.95 0.038 O 0.78 0.30 TYP P 0.78 0.30 TYP b E1 E e D A C M N O P Recommended Pad Layout Embossed Carrier T ape & Reel Specification — SOT23-3 Package [.009 ± .0005] .229 ± .013 [.028] 13.5º MAX8º MAX9º MAX .71 [.081] 2.06 .99 [.039].46 [.018] A0 K0 P0 P1 P D E F W Symbol Millimetres Inches Min Max Min Max A0 3.05 3.25 0.12 0.128 B0 2.67 2.87 0.105 0.113 D 3.9 4.1 0.153 0.161 D1 1 .95 2.05 0.788 0.792 E 1 .65 1 .85 0.065 0.073 F 3.45 3.55 0.136 0.14 K0 1 .12 1 .32 0.476 0.484 P 0.95 1 .05 0.037 0.041 P0 3.9 4.1 0.153 0.161 P1 1 .6 0.063 W 7 .9 8.3 0.311 0.327

Ordering Information

Part Number Package Marking Min. Order Qty. SPLV2.8HTG SOT23-3 U2.8 3000 Part Numbering System Part Marking System SP LV2.8 HT G Series Package H = SOT23-3 T= Tape & Reel G= GreenSilicon Protection Array (SPA TM Family of TVS Diode Arrays U2.8 U 2.8 Product Series U = SPLV2.8 Voltage Level