SMJ27C512 AUSTIN | Alldatasheet

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Austin Semiconductor, Inc. SMJ27512 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

FEATURES

  • Organized 65,536 x 8
  • High-reliability MIL-PRF-38535 processing
  • Single +5V ±10% power supply
  • Pin-compatible with existing 512K read-only memories (ROMs) and electrically programmable ROMs (EPROMs)
  • All inputs/outputs fully TTL compatible
  • Power-saving CMOS technology
  • Very high-speed SNAP! Pulse Programming
  • 3-state output buffers
  • 400mV minimum DC noise immunity with standard TTL loads
  • Latchup immunity of 250mA on all input and output lines
  • Low power dissipation (CMOS input levels) PActive - 193mW (MAX) PStandby - 1.7mW (MAX) OPTIONS MARKING
  • Timing 150ns access -15 200ns access -20 250ns access -25
  • Package(s) Ceramic DIP (600mils) J No. 110
  • Operating Temperature Ranges Military (-55 oC to +125oC) M PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS
  • SMD 5962-87648
  • MIL-STD-883 512K UVEPROM UV Erasable Programmable Read-Only Memory For more products and information please visit our web site at www.austinsemiconductor.com GENERAL DESCRIPTION The SMJ27C512 is a set of 65536 by 8-bit (524,288-bit), ultraviolet (UV) light erasable, electrically programmable read-only memories. These devices are fabricated using power-saving CMOS technology for high speed and simple interface with MOS and bipolar circuits. All inputs (including program data inputs can be driven by Series 54 TTL circuits without the use of external pullup resistors. Each output can drive one Series 54 TTL circuit without external resistors. The data outputs are 3-state for connecting multiple devices to a common bus. The SMJ27C512 is pin-compatible with existing 28-pin 512K ROMs and EPROMs. Because this EPROM operates from a single 5V supply (in the read mode), it is ideal for use in microprocessor-based systems. One other supply (13V) is needed for programming. All programming signals are TTL level. This device is programmable by the SNAP! Pulse programming algorithm. The SNAP! Pulse programming algorithm uses a V PP of 13V and a VCC of 6.5V for a nominal programming time of seven seconds. For programming outside the system, existing EPROM programmers can be used. Locations may be programmed singly, in blocks, or at random. 28-Pin DIP (J) 600-Mils A15 A12 DQ0 DQ1 DQ2 GND Vcc A14 A13 A11 G\\/V PP A10 DQ7 DQ6 DQ5 DQ4 DQ3 Pin Name Function A0 - A15 Address Inputs DA0-DQ7 Inputs (programming)/Outputs E\\ Chip Enable/Power Down GND Ground G\\ /VPP Output Enable/13V Programming VCC 5V Power Supply

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. inputs are TTL level except for VPP during programming (13V for SNAP! Pulse), and 12V on A9 for signature mode. TABLE 1. OPERATION MODES

  • This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. these pins. Output data is accessed at pins DQ0 through DQ7. performance or packing density. all outputs are in the high-impedance state. Figure 1. This algorithm programs in a nominal time of seven Data is presented in parallel (eight bits) on pins DQ0 to DQ7. pulses per byte are provided before a failure is recognized. programmed when the devices are connected in parallel. Programmed bits can be verified with G\\ /VPP and E\\ = VIL. output on DQ0-DQ7. All other addresses must be held at VIL.

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. FIGURE 1. SNAP! PULSE PROGRAMMING FLOW CHART

Austin Semiconductor, Inc. SMJ27512 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ** All voltage values are with respect to GND. ABSOLUTE MAXIMUM RATINGS* Supply V oltage Range, V RECOMMENDED OPERATING CONDITIONS NOTES: 1. VCC must be applied before or at the same time as G\\ /VPP and removed after or at the same time as G\\ /VPP. The deivce must not be inserted into or removed from the board when G\\ /VPP or VCC is applied. 2. G\\ /VPP can be connected to VCC directly (except in the program mode). VCC supply current in this case is ICC + IPP. ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES OF OPERATING CONDITIONS NOTES: 1. Typical values are at TC =25°C and nominal voltages. 2. This parameter has been characterized at 25°C and is not production tested. MIN NOM MAX UNIT 4.5 5 5.5 V 6.25 6.5 6.75 V G\\ /VPP Supply Voltage2 12.75 13 13.25 V VID 11.5 12.5 V TTL 2 VCC +1 V CMOS VCC -0.2 V CC +1 V TTL -0.5 0.8 V CMOS -0.5 0.2 V TC -55 125 °C VCC Read Mode SNAP! Pulse programming algorithmSupply Voltage1 VIL Low-level DC input voltage Operating case temperature SNAP! Pulse programming algorithm High-level DC input voltageVIH Voltage level on A9 for signature mode TEST CONDITIONS MIN TYP 1 MAX VOH IOH = -400µA 2.4 VOL IOL = 2.1mA 0.4 II VI = 0V to 5.5V 10 IO VO = 0V to VCC 10 IPP G\\ /VPP = 13V 35 70 TTL-Input Level VCC = 5.5V, E\\=VIH 500 CMOS-Input Level VCC = 5.5V, E\\=VCC 325 ICC2 E\\=VIL, VCC =5.5V tcycle = minimum cycle time, outputs open 35 50 High-level output voltage Low-level output voltage VCC supply current (active) PARAMETER ICC1 VCC supply current (standby) Input current (leakage) G\\ /VPP supply current (during program pulse)2 Output current (leakage)

Austin Semiconductor, Inc. SMJ27512 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. CAPACITANCE OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING CASE TEMPERATURE, f = 1MHz* * Capacitance measurements are made on sample basis only. All typical values are at TC = 25°C and nominal voltages. SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING CASE TEMPERATURE NOTES: 1. Timing measurements are made at 2V for logic high and 0.8V for logic low. (see Figure 2) 2. Common test conditions apply for t dis except during programming. 3. Value calculated from 0.5V delta to measured output level. This parameter is only sampled and not 100% tested. RECOMMENDED TIMING REQUIREMENTS FOR PROGRAMMING: V CC = 6.5V and G\\ /VPP = 13V (SNAP! Pulse), TC = 25°C (see Figure 2) TEST CONDITIONS TYP UNIT C I Input capacitance VI = 0V 6p F C O Output capacitance VO = 0V 10 pF C G /VPP G\\ /VPP input capacitance G\\ /VPP = 0V 20 pF PARAMETER MIN MAX MIN MAX MIN MAX ta(A) Access time from address 150 200 250 ns ta(E) Access time from E\\ 150 200 250 ns ten(G) Output enable time from G\\ /VPP 70 75 100 ns tdis Output disable time from G\\ /VPP or E\\, whichever occurs first3 0 50 0 60 0 60 ns tv(A) Output data valid time after change of address, E\\, or G\\, whichever occurs first3 000 n s UNIT TEST CONDITIONS 1,2PARAMETER -15 -25 See Figure 2 -20 MIN NOM MAX UNIT tdis(E) 0 130 ns th(A) 0µ s th(D) 2µ s th(VPP) 2µ s tw(IPGM) 95 100 105 µs trec(PG) 2µ s tsu(A) 2µ s tsu(D) 2µ s tsu(Vpp) 2µ s tsu(Vcc) 2µ s tv(ELD) 1µ s tr(PG) 50 ns Hold time, address Hold time, G\\ /VPP Setup Time, Address Setup Time, Data Setup Time, G\\ /VPP Setup Time, VCC G\\ /VPP rise time Data valid from E\\ low Output disable time from E\\ Hold Time, address Recovery time, G\\ /VPP Pulse duration, initial program

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. FIGURE 4. PROGRAM-CYCLE TIMING (SNAP! PULSE PROGRAMMING)

  1. G\\ /VPP = 13V and VCC = 6.5V for SNAP! Pulse programming.

Austin Semiconductor, Inc. SMJ27512 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. MECHANICAL DEFINITION* NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ , but they will be within the SMD limits. *All measurements are in inches. ASI Case #110 (Package Designator J) SMD 5962-87648, Case Outline X A Q L e bb2S1 MIN MAX A --- 0.232 b 0.014 0.026 b2 0.045 0.065 c 0.008 0.018 D --- 1.490 E 0.500 0.610 eA e L 0.125 0.200 Q 0.015 0.060 S1 0.005 --- S2 0.005 --- SYMBOL

0.100 BSC

0.600 BSC

c D E Pin 1

Austin Semiconductor, Inc. SMJ27512 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. *AVAILABLE PROCESSES M = Extended Temperature Range -55 oC to +125oC

ORDERING INFORMATION

Temp. SMJ27C512 -15 J * SMJ27C512 -20 J * SMJ27C512 -25 J * EXAMPLE: SMJ27C512-25JM

Austin Semiconductor, Inc. SMJ27512 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ASI TO DSCC PART NUMBER CROSS REFERENCE* TI Part #** SMD P art # SMJ27C512-15JM 5962-8764801XA SMJ27C512-20JM 5962-8764802XA SMJ27C512-25JM 5962-8764803XA * ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. ** Parts are listed on SMD under the old Texas Instruments part number. ASI purchased this product line in November of 1999.