MT5C1005 AUSTIN | Alldatasheet

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Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

FEATURES

  • High Speed: 20, 25, 35, and 45
  • Battery Backup: 2V data retention
  • Low power standby
  • High-performance, low-power CMOS double-metal process
  • Single +5V ( +10%) Power Supply
  • Easy memory expansion with CE\\ and OE\\ options.
  • All inputs and outputs are TTL compatible OPTIONS MARKING
  • Timing 20ns access -20 25ns access -25 35ns access -35 45ns access -45 55ns access -55* 70ns access -70*
  • Package(s) Ceramic DIP (400 mil) C No. 109 Ceramic Quad LCC (contact factory)ECW No. 206 Ceramic LCC EC No. 207 Ceramic Flatpack F No. 303 Ceramic SOJ DCJ No. 501
  • Operating Temperature Ranges Industrial (-40 oC to +85oC) IT Military (-55oC to +125oC) XT
  • 2V data retention/low power L *Electrical characteristics identical to those provided for the 45ns access devices. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS
  • MIL-STD-883 28-Pin DIP (C) (400 MIL) 32-Pin LCC (EC) 32-Pin SOJ (DCJ) 32-Pin Flat Pack (F) 32-Pin LCC (ECW) GENERAL DESCRIPTION The Austin Semiconductor SRAM family employs high-speed, low power CMOS designs fabricated using double- layer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, ASI offers chip enable (CE\\) and output enable (OE\\) capability. These enhancements can place the outputs in High-Z for addi- tional flexibility in system design. Writing to these devices is accomplished when write enable (WE\\) and CE\\ inputs are both LOW. Reading is accomplished when WE\\ remains HIGH while CE\\ and OE\\ go LOW. The devices offer a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. All devices operation from a single +5V power supply and all inputs and outputs are fully TTL compatible. 256K x 4 SRAM SRAM MEMORY ARRAY For more products and information please visit our web site at www.austinsemiconductor.com A10 A11 A12 A13 A14 A15 A16 A17 CE\\ OE\\ Vss Vcc NC DQ4 DQ3 DQ2 DQ1 WE\\ 4 3 2 1 31 32 30 14 15 16 17 18 19 20 A10 A11 A12 A13 A14 A15 A16 A17 CE\\ NC NC NC DQ4 DQ3 DQ2 DQ1 WE\\ Vss OE\\ NC NC Vcc A12 A10 A11 A13 NC A14 A15 A16 A17 NC CE\\ OE\\ Vss Vcc NC NC NC DQ4 DQ3 DQ2 DQ1 WE\\ A12 A10 A11 A13 NC A14 A15 A16 A17 NC CE\\ OE\\ Vss Vcc NC NC NC DQ4 DQ3 DQ2 DQ1 WE\\

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. FUNCTIONAL BLOCK DIAGRAM TRUTH TABLE MODE OE\\ CE\\ WE\\ DQ POWER STANDBY X H X HIGH-Z STANDBY READ L L H Q ACTIVE READ H L H HIGH-Z ACTIVE WRITE X L L D ACTIVE ROW DECODER 262,144 x 4-BIT MEMORY ARRAY I/O CONTROL VCC GND DQ4 DQ1 CE\\ OE\\ WE\\ A A A A A A A A A A COLUMN DECODER A A A A A A A A POWER DOWN

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ABSOLUTE MAXIMUM RATINGS* oC *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55oC < TC < 125oC; VCC = 5V +10%) CAPACITANCE SYM -20 -25 -35 -45 UNITS NOTES Icc 180 180 180 180 mA 3 Power Supply Current: Standby ISBT2 25 25 25 25 mA ISBC 16 16 16 16 mA MAX CONDITIONS WE\\, CE\\ < VIL; VCC = MAX Output Open Power Supply Current: Operating PARAMETER CE\\ > VCC -0.2V; VCC = MAX VIL < VSS +0.2V VIH > VCC -0.2V; f = 0 Hz* CE\\ > VIH; All Other Inputs < VIL or > VIH, VCC = MAX PARAMETER CONDITIONS SYM MAX UNITS NOTES Input Capacitance C I 12 pF 4 Output Capacitance (DQ1-DQ4) C O 14 pF 4 VIN = 0V, TA = 25°C, f = 1MHz VCC = 5V DESCRIPTION CONDITIONS SYM MIN MAX UNITS NOTES Input High (Logic 1) Voltage VIH 2.2 VCC +0.5 V1 Input Low (Logic 0) Voltage VIL -0.5 0.8 V 1 Input Leakage Current 0V< VIN<VCC ILI -10 10 µA Output Leakage Current Output(s) disabled 0V< VOUT <VCC ILO -10 10 µA Output High Voltage IOH = -4.0mA V OH 2.4 V 1 Output Low Voltage IOL = 8.0mA V OL 0.4 V 1 * “L” version only.

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (-55oC < TC < 125oC; VCC = 5V +10%) MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES READ CYCLE READ cycle time tRC 20 25 35 45 ns Address access time tAA 20 25 35 45 ns Chip Enable access time tACE 20 25 35 45 ns Output hold from address change tOH 3333 n s Chip Enable to output in Low-Z tLZCE 3333 n s 4 , 6 , 7 Chip disable to output in High-Z tHZCE 10 12 20 25 ns 4, 6, 7 Chip Enable to power-up time tPU 0000 n s 4 Chip disable to power-down time tPD 20 25 35 45 ns 4 Output Enable access time tAOE 8 1 02 02 5 n s Output Enable to output in Low-Z tLZOE 0000 n s 4 , 6 , 7 Output disable to output in High-Z tHZOE 8 10 20 25 ns 4, 6, 7 WRITE CYCLE WRITE cycle time tWC 20 25 35 45 ns Chip Enable to end of write tCW 15 20 30 35 ns Address valid to end of write tAW 15 20 30 35 ns Address setup time tAS 0000 n s Address hold from end of write tAH 0000 n s WRITE pulse width tWP 15 20 30 35 ns Data setup time tDS 12 15 20 25 ns Data hold time tDH 0000 n s Write disable to output in Low-Z tLZWE 3333 n s 4 , 6 , 7 Write Enable to output in High-Z tHZWE 0 8 0 10 0 15 0 20 ns 4, 6, 7 -35 -45DESCRIPTION -20 SYMBOL -25

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. AC TEST CONDITIONS NOTES 1. All voltages referenced to VSS (GND). 2. -3V for pulse width < 20ns 3. I CC is dependent on output loading and cycle rates. The specified value applies with the outputs unloaded, and f = 1 Hz. tRC (MIN) 4. This parameter is guaranteed but not tested. 5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. Minimum of 5pF for t EHQZ , tOHQZ , tELQX , tOLQX , and tWHQX . 7. At any given temperature and voltage condition, tHZCE is less than tLZCE, and tHZWE is less than tLZWE and tHZOE is less than tLZOE. 8. WE\\ is HIGH for READ cycle. 9. Device is continuously selected. Chip enables and output enables are held in their active state. 10. Address valid prior to, or coincident with, latest occurring chip enable. 11. tRC = Read Cycle Time. 12. Chip enable (CE\\) and write enable (WE\\) can initiate and terminate a WRITE cycle. Fig. 1 Output Load Equivalent Fig. 2 Output Load Equivalent DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only) 123 1 2 3 1 2 3 123 1 23 4 1 23 4 1 23 4 1234 DON’T CARE UNDEFINED LOW Vcc DATA RETENTION WAVEFORM 12345678 12345678 12345678 12345678 123 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 123456789 123456789 123456789 123456789 123 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 DATA RETENTION MODE VDR > 2V4.5V 4.5V VDR tCDR tR VIH VIL VCC CE\\ DESCRIPTION SYM MIN MAX UNITS NOTES VCC for Retention Data V DR 2V Data Retention Current CE\\ > (VCC -0.2V) and VIN > (VCC -0.2V) or < 0.2V VCC = 2V I CCDR 5m A Chip Deselect to Data Retention Time tCDR 0- - n s 4 Operation Recovery Time tR tRC ns 4, 11 CONDITIONS V TH = 1.73VQ 167Ω 30pF V TH = 1.73VQ 167Ω 5pF

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. tAA tOH tRCtRC PREVIOUS DATA VALID VALID DATA VALID ADDRESS DQ READ CYCLE NO. 1 8, 9 tRC tAA tOH tPD tPU tHZCEtACE tLZCE tHZOE tLZOE tAOE tRCtRC DATA VALID CE\\ OE\\ DQ Icc READ CYCLE NO. 2 7, 8, 10 tRC tAOE tLZOE tHZOE tHZCE tLZCE tACE tPU tPD 1234 1 23 4 1234 1234 1 23 4 1 23 4 1234 DON’T CARE UNDEFINED

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. NOTE: Output enable (OE\\) is inactive (HIGH). WRITE CYCLE NO. 2 7, 12 (Write Enabled Controlled) 1234 1 23 4 1 23 4 1234 12345 1 234 5 1 234 5 12345 DON’T CARE UNDEFINED WRITE CYCLE NO. 1 12 (Chip Enabled Controlled) tDHtDS tWP1tWP1 tAH tCW tAW tCWtAS tWCtWC HIGH Z DATA VAILD ADDRESS CE\\ WE\\ D Q tWC tAW tAS tCW tAH tWP tDS tDH 1234567890123456789012 1234567890123456789012 123456789012345678901234567890121234567890 123456789012345678901234567890121234567890 tDH tWP1tWP1 tAS tAW tCW tAH tCW tWCtWC DATA VALID ADDRESS CE\\ WE\\ D Q HIGH-Z tDHtDS tWC tAW tAH tCW tWP 12345678901234567 1 234567890123456 7 12345678901234567 111 12345678901234567890123 1 234567890123456789012 3 1234567890123456789012312 tAS

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. MECHANICAL DEFINITIONS* ASI Case #109 (Package Designator C) *All measurements are in inches. D Pin 1 e b A Q L c E MIN MAX A 0.090 0.110 b 0.016 0.020 b1 0.040 0.060 c 0.008 0.012 D 1.386 1.414 E 0.385 0.405 E1 0.390 0.410 e 0.090 0.110 L 0.125 0.175 Q 0.040 0.060 SYMBOL ASI PACKAGE SPECIFICATIONS

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ASI Case #206 (Package Designator ECW) MECHANICAL DEFINITIONS* *All measurements are in inches. b L e D E A MIN MAX A 0.077 0.093 b 0.022 0.028 b1 0.004 0.014 b2 0.054 0.066 D 0.742 0.758 D1 0.395 0.405 E 0.442 0.458 E1 0.295 0.305 e 0.045 0.055 L 0.045 0.055 L1 0.077 0.093 SYMBOL ASI PACKAGE SPECIFICATIONS

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. MECHANICAL DEFINITIONS* ASI Case #207 (Package Designator EC) *All measurements are in inches. A D E L e b b1 MIN MAX A 0.080 0.100 b 0.022 0.028 b1 0.004 0.014 b2 0.054 0.066 D 0.815 0.835 E 0.392 0.408 e 0.045 0.055 L 0.070 0.080 L1 0.090 0.110 SYMBOL ASI PACKAGE SPECIFICATIONS

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. MECHANICAL DEFINITIONS* ASI Case #303 (Package Designator F) *All measurements are in inches. Pin 1 Index 17 16 Bottom View Top View D EL e b c A Q MIN MAX A --- 0.125 b 0.015 0.019 c 0.004 0.006 D 0.812 0.828 D1 0.745 0.755 E 0.405 0.415 E2 0.324 0.336 e 0.045 0.055 L 0.290 0.310 Q 0.027 0.033 SYMBOL ASI PACKAGE SPECIFICATIONS

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. *All measurements are in inches. ASI Case #501 (Package Designator DCJ) MECHANICAL DEFINITIONS* A e b D E E2R MIN MAX A 0.135 0.153 A2 0.026 0.036 b 0.015 0.019 D 0.812 0.828 D1 0.740 0.755 E 0.405 0.415 e 0.045 0.055 E1 0.435 0.445 E2 0.360 0.380 R 0.030 0.040 SYMBOL ASI PACKAGE SPECIFICATIONS

Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. *AVAILABLE PROCESSES IT = Industrial Temperature Range -40 oC to +85oC XT = Extended Temperature Range -55 oC to +125oC 883C = Full Military Processing -55 oC to +125oC ** OPTIONS L = 2V Data Retention/Low Power

ORDERING INFORMATION

EXAMPLE: MT5C1005EC-45/XT Device Number Package Type Speed ns Options Process Device Number Package Type Speed ns Options Process MT5C1005 C -20 L /* MT5C1005 EC ECW -20 L /* MT5C1005 C -25 L /* MT5C1005 EC ECW -25 L /* MT5C1005 C -35 L /* MT5C1005 EC ECW -35 L /* MT5C1005 C -40 L /* MT5C1005 EC ECW -40 L /* MT5C1005 C -55 L /* MT5C1005 EC ECW -55 L /* MT5C1005 C -70 L /* MT5C1005 EC ECW -70 L /* EXAMPLE: MT5C1005DCJ-70/XT Device Number Package Type Speed ns Options Process Device Number Package Type Speed ns Options Process MT5C1005 F -20 L /* MT5C1005 DCJ -20 L /* MT5C1005 F -25 L /* MT5C1005 DCJ -25 L /* MT5C1005 F -35 L /* MT5C1005 DCJ -35 L /* MT5C1005 F -40 L /* MT5C1005 DCJ -40 L /* MT5C1005 F -55 L /* MT5C1005 DCJ -55 L /* MT5C1005 F -70 L /* MT5C1005 DCJ -70 L /* EXAMPLE: MT5C1005C-20L/IT EXAMPLE: MT5C1005F-25L/883C