SA03 APEX | Alldatasheet

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Technical content

APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL prodlit@apexmicrotech.com

FEATURES

  • WIDE SUPPLY RANGE—16-100V
  • 30A CONTINUOUS TO 60°C case
  • 3 PROTECTION CIRCUITS
  • ANALOG OR DIGITAL INPUTS
  • SYNCHRONIZED OR EXTERNAL OSCILLATOR
  • FLEXIBLE FREQUENCY CONTROL

APPLICATIONS

  • MOTORS TO 4HP
  • REACTIVE LOADS
  • LOW FREQUENCY SONAR
  • LARGE PIEZO ELEMENTS
  • OFF-LINE DRIVERS
  • C-D WELD CONTROLLER

DESCRIPTION

The SA03 is a pulse width amplifier that can supply 3000W to the load. An internal 45kHz oscillator requires no external components. The clock input stage divides the oscillator frequency by two, which provides the basic switching of 22.5 kHz. External oscillators may also be used to lower the switching frequency or to synchronize multiple amplifiers. Current sensing is provided for each half of the bridge giv ing amplitude and direction data. A shutdown input turns off all four drivers of the H bridge output. A high side current limit and the programmable low side current limit protect the amplifier from shorts to supply or ground in addition to load shorts. The H bridge output MOSFETs are protected from thermal overloads by directly sensing the temperature of the die. The 12-pin hermetic MO-127 power package occupies only 3 square inches of board space. BLOCK DIAGRAM AND TYPICAL APPLICATION EXTERNAL CONNECTIONS 12-PIN POWER DIP PACKAGE STYLE CR

APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739 ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS SA03 ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, +VS 100V SUPPLY VOLTAGE, VCC 16V POWER DISSIPATION, internal 300W TEMPERATURE, pin solder - 10s 300°C TEMPERATURE, junction2 150°C TEMPERATURE, storage –65 to +150°C OPERATING TEMPERATURE RANGE, case –55 to +125°C INPUT VOLTAGE, +PWM 0 to +11V INPUT VOLTAGE, –PWM 0 to +11V INPUT VOLTAGE, ILIM 0 to +10V The SA03 is constructed from MOSFET transistors. ESD handling procedures must be observed. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. CAUTION NOTES: 1. Each of the two active output transistors can dissipate 150W. 2. Unless otherwise noted: T C = 25°C, VS, VCC at typical specification. 3. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. For guidance, refer to the heatsink data sheet. 4. Guaranteed but not tested. 5. If 100% duty cycle is not required V S(MIN) = 0V. SPECIFICATIONS PARAMETER TEST CONDITIONS2 MIN TYP MAX UNITS CLOCK (CLK) CLK OUT, high level4 IOUT ≤ 1mA 4.8 5.3 V CLK OUT, low level4 IOUT ≤ 1mA 0 .4 V FREQUENCY 44 45 46 kHz RAMP, center voltage 5 V RAMP, P-P voltage 4 V CLK IN, low level4 0 .9 V CLK IN, high level4 3.7 5.4 V OUTPUT TOTAL RON .16 Ω EFFICIENCY, 10A output VS = 100V 97 % SWITCHING FREQUENCY OSC in ÷ 2 22 22.5 23 kHz CURRENT, continuous4 60°C case 30 A CURRENT, peak4 40 A POWER SUPPLY VOLTAGE, VS Full temperature range 165 60 100 V VOLTAGE, VCC Full temperature range 14 15 16 V CURRENT, VCC IOUT = 0 80 mA CURRENT, VCC, shutdown 50 mA CURRENT, VS No Load 50 mA ILIM/SHUTDOWN TRIP POINT 90 110 mV INPUT CURRENT 100 nA THERMAL3 RESISTANCE, junction to case Full temperature range, for each die .83 °C/W RESISTANCE, junction to air Full temperature range 12 °C/W TEMPERATURE RANGE, case Meets full range specifications –25 +85 °C

APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL prodlit@apexmicrotech.com SA03 TYPICAL PERFORMANCE GRAPHS

APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739 spikes will invariably be found at the I SENSE pins. The noise spikes could trip the current limit threshold which is only 100 mV. RFILTER and CFILTER should be ad- justed so as to reduce the switch- ing noise well below 100 mV to prevent false current limiting. The sum of the DC level plus the noise peak will determine the current limit ing value. As in most switching circuits it may be difficult to determine the true noise amplitude without careful attention to grounding of the oscilloscope probe. Use the shortest possible ground lead for the probe and con- nect exactly at the GND terminal of the amplifier. Suggested starting values are CFILTER = .01uF, RFILTER = 5k . The required value of R LIMIT in voltage mode may be cal - culated by: RLIMIT = .1 V / ILIMIT where RLIMIT is the required resistor value, and I LIMIT is the maximum desired current. In current mode the required value of each R LIMIT is 2 times this value since the sense voltage is divided down by 2 (see Figure B). If RSHDN is used it will further divide down the sense voltage. The shutdown divider network will also have an effect on the filtering circuit. BYPASSING Adequate bypassing of the power supplies is required for proper operation. Failure to do so can cause erratic and low efficiency operation as well as excessive ringing at the out puts. The Vs supply should be bypassed with at least a 1µF ceramic capacitor in parallel with another low ESR capacitor of at least 10µF per amp of output current. Capacitor types rated for switching applications are the only types that should be considered. The bypass capacitors must be physically connected directly to the power supply pins. Even one inch of lead length will cause excessive ringing at the outputs. This is due to the very fast switching times and the inductance of the lead connection. The bypassing requirements of the Vcc supply are less stringent, but still necessary. A .1µF to .47µF ceramic capacitor connected directly to the Vcc pin will suffice. STARTUP CONDITIONS The high side of the all N channel output bridge circuit is driven by bootstrap circuit and charge pump arrangement. In order for the circuit to produce a 100% duty cycle indefinitely the low side of each half bridge circuit must have previously been in the ON condition. This means, in turn, that if the input signal to the SA03 at startup is demanding a 100% duty cycle, the output may not follow the command and may be in a tri- state condition. The ramp signal must cross the input signal at some point to correctly determine the output state. After the ramp crosses the input signal level one time, the output state will be correct thereafter. OPERATING CONSIDERATIONS SA03 GENERAL Please read Application Note 30 on "PWM Basics". Refer to Application Note 1 "General Operating Considerations" for helpful information regarding power supplies, heat sinking and mounting. Visit www.apexmicrotech.com for design tools that help automate pwm filter design; heat sink selection; Apex’s complete Application Notes library; Technical Seminar Work book; and Evaluation Kits. CLOCK CIRCUIT AND RAMP GENERATOR The clock frequency is internally set to a frequency of ap - proximately 45kHz. The CLK OUT pin will normally be tied to the CLK IN pin. The clock is divided by two and applied to an RC network which produces a ramp signal at the –PWM/RAMP pin. An external clock signal can be applied to the CLK IN pin for synchronization purposes. If a clock frequency lower than 45kHz is chosen an external capacitor must be tied to the –PWM/RAMP pin. This capacitor, which parallels an internal capacitor, must be selected so that the ramp oscillates 4 volts p-p with the lower peak 3 volts above ground. PWM INPUTS The full bridge driver may be accessed via the pwm input comparator. When +PWM > -PWM then A OUT > B OUT. A motion control processor which generates the pwm signal can drive these pins with signals referenced to GND. PROTECTION CIRCUITS In addition to the externally programmable current limit there is also a fixed internal current limit which senses only the high side current. It is nominally set to 140% of the continuous rated output current. Should either of the outputs be shorted to ground the high side current limit will latch off the output transistors. Also, the temperature of the output transistors is continually monitored. Should a fault condition occur which raises the temperature of the output transistors to 165°C the thermal protection circuit will activate and also latch off the output transistors. In either case, it will be necessary to remove the fault condition and recycle power to V CC to restart the circuit. CURRENT LIMIT There are two load current sensing pins, I SENSE A and I SENSE B. The two pins can be shorted in the voltage mode connection but both must be used in the current mode con - nection (see figures A and B). It is recommended that R LIMIT resistors be non-inductive. Load current flows in the I SENSE pins. To avoid errors due to lead lengths connect the I LIMIT/ SHDN pin directly to the R LIMIT resistors (through the filter net- work and shutdown divider resistor) and connect the R LIMIT resistors directly to the GND pin. Switching noise This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice. SA03U REV. F MARCH 2001 © 2001 Apex Microtechnology Corp.