S8844-0909

S8844-0909 HAMAMATSU | Alldatasheet

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Technical content

Features

/K6C Number of active pixels: 512 × 512 /K6C Greater than 90 % quantum efficiency at peak sensitivity wavelength /K6C Wide spectral response range /K6C Low noise /K6C Wide dynamic range /K6C MPP operation /K6C Built-in one-stage thermoelectric cooler

Applications

/K6C Scientific measurement /K6C Semiconductor inspection /K6C UV imaging /K6C Bio-photon observation /K6C DNA sequencer IMAGE SENSOR CCD area image sensor 512 × 512 pixels, Back-thinned FFT-CCD I Specifications Type No. Cooling Number of total pixels Number of active pixels Active area [mm (H) × mm (V)] S8844-0909 One-stage TE-cooled 532 × 520 512 × 512 12.288 × 12.288 I General ratings Parameter Specifications Pixel size 24 (H) × 24 (V) µm Number of active pixels 512 (H) × 512 (V) Vertical clock phase 2 phase Horizontal clock phase 2 phase Output circuit One-stage MOSFET source follower Package 24 pin ceramic DIP (refer to dimensional outlines) Built-in cooler One-stage Window AR coated sapphire glass *1 *1: Windowless type is available on custom order.

CCD area image sensor S8844-0909 I Absolute maximum ratings (Ta=25 °C) Parameter Symbol Min. Typ. Max. Unit Operating temperature Topr -50 - +30 °C Storage temperature Tstg -50 - +70 °C OD voltage V OD -0.5 - +25 V RD voltage VRD -0.5 - +18 V ISV voltage V ISV -0.5 - +18 V ISH voltage VISH -0.5 - +18 V IGV voltage V IG1V, VIG2V -10 - +15 V IGH voltage VIG1H, VIG2H -10 - +15 V SG voltage V SG -10 - +15 V OG voltage VOG -10 - +15 V RG voltage V RG -10 - +15 V TG voltage VTG -10 - +15 V Vertical clock voltage V P1V, VP2V -10 - +15 V Horizontal clock voltage VP1H, VP2H -10 - +15 V I Operating conditions (MPP mode, Ta=25 °C) Parameter Symbol Min. Typ. Max. Unit Output transistor drain voltage V OD 18 20 22 V Reset drain voltage VRD 11.5 12 12.5 V Output gate voltage V OG 135 V Substrate voltage VSS - 0 - V Test point (vertical input source) V ISV -V RD -V Test point (horizontal input source) VISH - VRD - V Test point (vertical input gate) V IG1V, VIG2V -8 0 - V Test point (horizontal input gate) VIG1H, VIG2H -8 0 - V High V P1VH, VP2VH 468Vertical shift register clock voltage Low V P1VL, VP2VL -9 -8 -7 V High VP1HH, VP2HH 4 6 8Horizontal shift register clock voltage Low VP1HL, VP2HL -9 -8 -7 V High V SGH 468Summing gate voltage Low V SGL -9 -8 -7 V High VRGH 4 6 8Reset gate voltage Low VRGL -9 -8 -7 V High V TGH 468Transfer gate voltage Low V TGL -9 -8 -7 V I Electrical characteristics (Ta=25 °C) Parameter Symbol Min. Typ. Max. Unit Signal output frequency fc - - 1 MHz Vertical shift register capacitance CP1V, CP2V - 6,400 - pF Horizontal shift register capacitance C P1H, CP2H - 120 - pF Summing gate capacitance CSG - 7 - pF Reset gate capacitance C RG -7- p F Transfer gate capacitance CTG - 150 - pF Charge transfer efficiency *2 CTE 0.99995 0.99999 - - DC output level *3 Vout 12 15 18 V Output impedance *3 Zo - 3 - k Ω Power consumption *3 *4 P - 15 - mW *2: Charge transfer efficiency per pixel, measured at half of the full well capacity. *3: The values depend on the load resistance. (VOD=20 V, Load resistance=22 kΩ ) *4: Power consumption of the on-chip amplifier.

CCD area image sensor S8844-0909 *9: Spectral response with sapphire window is decreased by the transmittance I Spectral response (without window) *9 I Spectral transmittance characteristic of window material KMPDB0058EA QUANTUM EFFICIENCY (%) WAVELENGTH (nm) (Typ. Ta=25 ˚C) 200 400 600 800 1000 1200 100 FRONT-SIDED FRONT-SIDED (UV COAT) BACK-THINNED 100 200 WAVELENGTH (nm) TRANSMITTANCE (%) 300 400 500 600 700 800 9001000 1100 1200 100 (Typ. Ta=25 ˚C) AR COATED SAPPHIRE KMPDB0226EA I Electrical and optical characteristics (Ta=25 °C, unless otherwise noted) Parameter Symbol Min. Typ. Max. Unit Saturation output voltage Vsat - Fw × Sv - V Vertical 150,000 300,000 -Full well capacity Horizontal Fw 300,000 600,000 - e- CCD node sensitivity Sv 1.8 2.2 - µV/e - 25 °C - 4,000 12,000Dark current *5 (MPP mode) 0 °C DS - 200 600 e-/pixel/s Readout noise *6 Nr - 8 16 e - rms Line binning 18,750 75,000 - -Dynamic range *7 Area scanning DR 9,375 37,500 - - Photo response non-uniformity *8 PRNU - ±3 ±10 % Spectral response range λ - 200 to 1100 - nm *5: Dark current nearly doubles for every 5 to 7 °C increase in temperature. *6: Operating frequency is 150 kHz. *7: Dynamic Range (DR) = Full well/Readout noise *8: Measured at half of the full well capacity. Photo Response Non-Uniformity (PRNU) [%] = Signal peak) to (peak noise pattern Fixed × 100

CCD area image sensor S8844-0909 I Device structure (Conceptual drawing of top view) 2322 21 20 1415 893 4 5

512 SIGNAL OUT

4 BLANK 4 BLANK

V H

8 BEVEL 4 BEVEL

V=512 H=512

4 BEVEL 4 BEVEL

I Dark current vs. temperature KMPDC0075EA -50 -40 -30 -20 0-10 10 20 30 TEMPERATURE ( ˚C) 0.1 100 1000 10000 DARK CURRENT (e -/pixel/s) (Typ.) KMPDB0037EB

CCD area image sensor S8844-0909 INTEGRATION PERIOD (Shutter must be open) P1V RG OS P2V, TG P1H P2H, SG READOUT PERIOD (Shutter must be closed) ENLARGED VIEW 4..519 520← 512 + 8 (BEVEL)Tpwv Tovr Tpwr D1 D2 D3 D4 D18 D19 D20 P2V, TG P1H P2H, SG RG OS Tpwh, Tpws 123 KMPDC0119EA I Timing chart Parameter Symbol Remark Min. Typ. Max. Unit Pulse width Tpwv 6 - - µsP1V, P2V, TG Rise and fall time Tprv, Tpfv *10 200 - - ns Pulse width Tpwh 500 - - ns Rise and fall time Tprh, pfh 10 - - nsP1H, P2H Duty ratio - *10 - 50 - % Pulse width Tpws 500 - - ns Rise and fall time Tprs, Tpfs 10 - - nsSG Duty ratio - -5 0- % Pulse width Tpwr 100 - - nsRG Rise and fall time Tprr, Tpfr - 5 - - ns TG – P1H Overlap time Tovr - 3 - - µs *10: Symmetrical clock pulses should be overlapped at 50 % of maximum amplitude. Area scanning 1 (low dark current mode)

CCD area image sensor S8844-0909 KMPDC0120EA Parameter Symbol Remark Min. Typ. Max. Unit Pulse width Tpwv 6 - - µsP1V, P2V, TG Rise and fall time Tprv, Tpfv *11 200 - - ns Pulse width Tpwh 500 - - ns Rise and fall time Tprh, Tpfh 10 - - nsP1H, P2H Duty ratio - *11 - 50 - % Pulse width Tpws 500 - - ns Rise and fall time Tprs, Tpfs 10 - - nsSG Duty ratio - -5 0- % Pulse width Tpwr 100 - - nsRG Rise and fall time Tprr, Tpfr - 5 - - ns TG - P1H Overlap time Tovr - 3 - - µs *11: Symmetrical clock pulses should be overlapped at 50 % of maximum amplitude. INTEGRATION PERIOD (Shutter must be open) P1V RG OS P2V, TG P1H P2H, SG READOUT PERIOD (Shutter must be closed) ENLARGED VIEW 4..519520← 512 + 8 (BEVEL)Tpwv Tovr Tpwr D1 D2 D3 D4 D18 D19 D20 P2V, TG P1H P2H, SG RG OS Tpwh, Tpws 123 Area scanning 2 (large full well mode)

CCD area image sensor S8844-0909 I Dimensional outline (unit: mm) 34.0 38.0 50.0 2.54 22.9 0.5 19.0 4.0 42.0 22.4 1.0 4.8 6.4 7.0 7.1 INDEX MARK PIN No. 1 3.0 KMPDA0163EA 2.54 0.5 27.94 17.5 SAPPHIRE WINDOW 31.0 ACTIVE AREA 12.288 16.5 20.0 12.288 SAPPHIRE LIGHT-SHIELDED AREA SAPPHIRE WINDOW TE-COOLER I Pin connections Pin No. Symbol Function Remark (standard operation)

1 RD Reset drain +12 V

2 OS Output transistor source RL=10 k to 100 kΩ

3 OD Output transistor drain +20 V

4 OG Output gate +3 V

5 SG Summing gate Same timing as P2H

8 P2H CCD horizontal register clock-2

9 P1H CCD horizontal register clock-1

10 IG2H Test point (horizontal input gate-2) 0 V

11 IG1H Test point (horizontal input gate-1) 0 V

12 ISH Test point (horizontal input source) Connect to RD

13 TG * 12 Transfer gate Same timing as P2V

14 P2V CCD vertical register clock-2

15 P1VCCD vertical register clock-1

16 Th1 Thermistor

17 Th2 Thermistor

18 P- TE-cooler (-)

19 P+ TE-cooler (+)

20 SS Substrate (GND) GND

21 ISVTest point (vertical input source) Connect to RD

22 IG2V Test point (vertical input gate-2) 0 V

23 IG1VTest point (vertical input gate-1) 0 V

24 RG Reset gate

*12: Isolation gate between vertical register and horizontal register. In standard operation, TG should be applied the same pulse as P2V. KMPDA0163EA

CCD area image sensor S8844-0909 VOLTAGE vs. CURRENT CCD TEMPERATURE vs. CURRENT VOLTAGE (V) CCD TEMPERATURE ( ˚C) -30 2.01.51.0 CURRENT (A) 0.50 -20 -10 (Typ. Ta=25 ˚C) KMPDB0180EA I Specifications of built-in TE-cooler Parameter Symbol Condition Typ. Unit Internal resistance Rint Ta=25 °C2 . 1 Ω Maximum current *13 Imax Tc *14=Th *15=25 °C 2.0 A Maximum voltage Vmax Tc *14=Th *15=25 °C4 . 2 V Maximum heat absorption *16 Qmax 4.5 W Maximum temperature of heat radiating side -7 0 °C *13: Maximum current Imax: If the current greater than this value flows into the thermoelectric cooler, the heat absorption begins to decrease due to the Joule heat. It should be noted that this value is not the damage threshold value. To protect the thermoelectric cooler and maintain stable operation, the supply current should be less than 60 % of this maximum current. *14: Temperature of the cooling side of thermoelectric cooler. *15: Temperature of the heat radiating side of thermoelectric cooler. *16: Maximum heat absorption Qmax. This is a theoretical heat absorption level that offsets the temperature difference in the thermoelectric cooler when the maximum current is supplied to the unit. I Specifications of built-in temperature sensor A chip thermistor is built in the same package with a CCD chip, and the CCD chip temperature can be monitored with it. A relation between the thermistor resistance and absolute temperature is expressed by the following equation. R1 = R2 × expB (1 / T1 - 1 / T2) R1: Resistance at absolute temperature T1 (K) R2: Resistance at absolute temperature T2 (K) B: B constant (K) The characteristics of the thermistor used are as follows. R (298K) = 10 k Ω B (298K / 323K) = 3450 K (Typ. Ta=25 ˚C) 10 kΩ 220 240 260 TEMPERATURE (K) RESISTANCE 280 300 100 kΩ 1 MΩ KMPDB0111EA

HAMAMATSU PHOTONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184, www.hamamatsu.com Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 08152-3750, Fax: (49) 08152-2658 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1/E, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741 Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions. Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. ©2006 Hamamatsu Photonics K.K. CCD area image sensor S8844-0909 I Precaution for use (Electrostatic countermeasures) G Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with an earth ring, in order to prevent electrostatic damage due to electrical charges from friction. G Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. G Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge. G Ground the tools used to handle these sensors, such as tweezers and soldering irons. It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage that occurs. Cat. No. KMPD1056E04 Feb. 2006 DN I Element cooling/heating temperature incline rate Element cooling/heating temperature incline rate should be set at less than 5 K/min.