S8658-01

S8658-01 HAMAMATSU | Alldatasheet

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Technical content

Features

/K6C FFT -CCD coupled with FOS for X-ray imaging /K6C 1536 (H) × 128 (V) pixel format /K6C Pixel size: 48 × 48 µm /K6C Slit-like image of 220 mm long by aligning 3 CCD chips together /K6C Coupled with FOS for X-ray imaging /K6C TDI (Time Delay Integration) operation /K6C 100 % fill factor /K6C Wide dynamic range /K6C Low dark current /K6C MPP operation

Applications

/K6C General X-ray imaging /K6C Non-destructive inspection /K6C Dental panorama, cephalo IMAGE SENSOR CCD area image sensor Front-illuminated FFT -CCD for X-ray imaging PRELIMINARY DATA Apr. 2003 I Selection guide Type No. Cooling Number of total pixels Number of active pixels Active area [mm (H) × mm(V)] S8658-01 Non-cooled 1536 × 128 1536 × 128 73.728 × 6.144 Note) As an input window, FOS is suited to S8658-01. I General ratings Parameter Specification CCD structure Full frame transfer or TDI X-ray sensitive area 220 × 6 mm Fill factor 100 % Number of active pixels 1536 (H) × 128 (V) * 1 Pixel size 48 (H) × 48 (V) µm CCD active area 73.728 (H) × 6.144 (V) mm * 1 Vertical clock phase 2 phase and 2 line Horizontal clock phase 2 phase and 2 line Output circuit Two-stage MOSFET source follower with load resistance X-ray resolution 4 to 6 Lp/mm at 60 kVp, 10 m Roentgen Reliability 100,000 shots at 60 kVp, 10 m Roentgen Package 60 pin ceramic package Window FOS (Fiber Optic plate with Scintillator) *1: Number of active pixels per chip. Three chips are used.

CCD area image sensor S8658-01 I Absolute maximum ratings (Ta=25 °C) Parameter Symbol Min. Typ. Max. Unit Storage temperature Tstg -20 - +70 °C Operating temperature Topr 0 - +40 °C OD voltage V OD -0.5 - +20 V RD voltage VRD -0.5 - +18 V ISV voltage V ISV -0.5 - +18 V IGV voltage VIGV -15 - +15 V IGH voltage V IGH -15 - +15 V SG voltage VSG -15 - +15 V OG voltage V OG -15 - +15 V RG voltage VRG -15 - +15 V TG voltage V TG -15 - +15 V Vertical clock voltage VP1AV, VP2AV VP1BV, VP2BV -15 - +15 V Horizontal clock voltage VP1AH, VP2AH VP1BH, VP2BH -15 - +15 V I Operating conditions (MPP mode, Ta=25 °C) Parameter Symbol Min. Typ. Max. Unit Output transistor drain voltage V OD 12 15 18 V Reset drain voltage VRD 12 13 14 V Output gate voltage V OG -0.5 2 5 V Output transistor gro und voltage VSSA - 0 - V Substrate voltage V SSD -5 0 - V Vertical input source VISV - VRD - Vertical input gate VIGV -8 0 -Test point Horizontal input gate VIGH -8 0 - V High VP1AVH, VP2AVH VP1BVH, VP2BVH 036Vertical shift register clock voltage Low VP1AVL, VP2AVL VP1BVL, VP2BVL -9 -8 -7 V High VP1AHH, VP2AHH VP1BHH, VP2BHH 0 3 6Horizontal shift register clock voltage Low VP1AHL, VP2AHL VP1BHL, VP2BHL -9 -8 -7 V High V SGH 036Summing gate voltage Low V SGL -9 -8 -7 V High VRGH 0 3 6Reset gate voltage Low VRGL -9 -8 -7 V High V TGH 036Transfer gate voltage Low V TGL -9 -8 -7 V I Electrical characteristics (Ta=25 °C) Parameter Symbol Remark Min. Typ. Max. Unit Signal output frequency fc - 2 4 MHz Reset clock frequency frg - 2 4 MHz Vertical shift register capacitance CP1AV, CP2AV CP1BV, CP2BV - 15000 - pF Horizontal shift register capacitance CP1AH, CP2AH CP1BH, CP2BH - 500 - pF Summing gate capacitance C SG -1 5-p F Reset gate capacitance CRG - 10 - pF Transfer gate capacitance C TG - 500 - pF Transfer efficiency CTE *2 0.99995 0.99999 - DC output level Vout * 3 581 1V Output impedance Zo *3 - 500 - Ω Power dissipation P * 3, *4 -6 0-m W *2: Measured at half of the full well capacity. CTE is defined per pixel. *3: VOD=15 V. *4: Power dissipation of the on-chip amplifier (each chip).

CCD area image sensor S8658-01 I Electrical and optical characteristics (Ta=25 °C, unless otherwise noted) Parameter Symbol Remark Min. Typ. Max. Unit Saturation output voltage Vsat - Fw × Sv - V Vertical 600 1200 - Horizontal 600 1200 -Full well capacity Summing Fw 600 1200 - ke- CCD node sensitivity Sv * 5 0.45 0.6 - µV/e - Dark current (MPP mode) DS *6 - 8 24 ke-/pixel/s Readout noise Nr * 7 -6 0 1 2 0 e -rms Dynamic range DR *8 5000 20000 - X-ray response non-uniformity XRNU * 9, *10 -± 1 0 ± 3 0% White spots - - 10Point defects * 11 Black spots - - 10 Cluster defects *12 - - 0Blemish Column defects *13 - - 0 X-ray resolution ∆ R4 6 - L p / m m *5: VOD=15 V. *6: Dark current doubles for every 5 to 7 °C. *7: -40 °C, operating frequency is 2 MHz. *8: Dynamic range = Full well capacity / Readout noise *9: X-ray irradiation of 60 kVp, measured at half of the full well capacity. *10: XRNU (%) = Noise / Signal × 100 Noise: Fixed pattern noise (peak to peak) Measuring region that is within 220.0 mm (H) × 6.0 mm (V) (refer to dimensional outline) *11: White spots > 20 times of typ. dark signal (8 ke -/pixel/s). Black spots > 50 % reduction in response relative to adjacent pixels, measured at half of the full well capacity. *12: continuous 2 to 9 point defects. *13: continuous >10 point defects. SPACIAL FREQUENCY (Line pair/mm) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 (X-ray source: 60 kVp) CTF 4826 3715 1 0 9 X-RAY EXPOSURE (mR) 1000 500 (X-ray source: 70 kVp) OUTPUT VOLTAGE (mV) 2413 I Resolution KMPDB0248EA I Response KMPDB0249EA

CCD area image sensor S8658-01 234 125 126 127 128S1 S1531 S1532 S1533 S1534 S1535 S1536 1531 1532 1533 1534 1535 1536 ISV A14, B14 A15, B15IGV P1BV P2BV P1AV P2AV TG RG RD SSA OS OD OG SG P2AH P1AH P2BH P1BH IGHSSD 234 125 126 127 128S1 S1531 S1532 S1533 S1534 S1535 S1536 1531 1532 1533 1534 1535 1536 P2AHP1AHP2BHP1BHIGH SSD LEFT CHIP (CHIP A), CENTER CHIP (CHIP B) RIGHT CHIP (CHIP C) A16, B16 A17, B17 A18, B18 A19, B19 A20, B20 A1, B1 A2, B2 A3, B3 A4, B4 A5, B5 A6, B6 A7, B7 A8, B8 A9, B9 A10, B10 A11, B11 A12, B12 A13, B13 C1 C2 C3 C4 C5 C6 ISV IGV P1BV P2BV P1AV P2AV TG RG RD SSA OS OD OG SGC7 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 I Device structure KMPDC0143EA I Pixel format ← Left Horizontal Direction → Right Blank Optical black Isolation Effective Isolation Optical black Blank 0 0 0 1536 0 0 0 Top ← Vertical direction → Bottom Isolation Effective Isolation 0 128 0 I Timing chart (TDI operation) P1AV, P1BV P2AV, P2BV TG P1AH, P1BH P2AH, P2BH SG RG OS ENLARGED VIEW Tpwv Tovr Tpwr TG P1AH, P1BH P2AH, P2BH SG RG OS S2 S3S1 S4 S5 S1535 S1536 Tpwh, Tpws KMPDC0142EB

CCD area image sensor S8658-01 I Timing chart (TDI operation, 2 × 2 pixel binning) P1AV, P1BV P2AV, P2BV TG P1AH, P1BH P2AH, P2BH SG RG OS ENLARGED VIEW Tpwv Tovr Tpwr TG P1AH, P1BH P2AH, P2BH SG RG OS S1 + S2 S3 + S4 S1535 + S1536 Tpwh, Tpws KMPDC0111EC Parameter Symbol Remark Min. Typ. Max. Unit Pulse width tpwv 30 60 - µsP1AV, P1BV, P2AV, P2BV, TG Rise and fall time tprv, tpfv *14, *15 200 - - ns Pulse width tpwh 125 250 - ns Rise and fall time tprh, tpfh 10 - - nsP1AH, P1BH, P2AH, P2BH Duty ratio *15 - 50 - % Pulse width tpws 125 250 - ns Rise and fall time tprs, tpfs 10 - - nsSG Duty ratio - 50 - % Pulse width tpwr 10 50 - nsRG Rise and fall time tprr, tpfr 5 - - ns TG-P1AH, P1BH Overlap time tovr 10 20 - µs *14: TG terminal can be short-circuited to P2AV terminal. *15: Symmetrical pulses should be overlapped at 50 % of maximum amplitude.

CCD area image sensor S8658-01 KMPDA0149EC I Dimensional outline (unit: mm) 15.24 30.4845.72 45.72 60.96 1.6 FOP 3.0 5.6 60.96 B20 ← B14A20 ← A14 LEFT CHIP RIGHT CHIP →A1 A13 →C1 C13→B1 B13 C20 ← C14 CENTER CHIP 0.45 2.54 3.4 FOP 7.2 ± 0.2 28.0 ± 0.3 25.4 X-RAY SENSITIVE AREA: 220.0 (H) × 6.0 (V) 223.0 ± 0.5 FOP 228.0 ± 0.3 *1 *2 SCINTILLATOR LEFT CHIP EDGE PIXEL DEAD SPACE 1: 250 µm MIN. 350 µm MAX. ±50 µm MAX.CENTER CHIP CENTER CHIP EDGE PIXEL DEAD SPACE 2: 130 µm MIN. 200 µm MAX. ±50 µm MAX.RIGHT CHIP *1 Details *2 Details

CCD area image sensor S8658-01 I Pin connections Pin No. Symbol Description Remark A1, B1 RG Reset gate A2, B2 RD Reset drain A3, B3 SSA Analog ground A4, B4 OS Output transistor source A5, B5 OD Output transistor drain A6, B6 OG Output gate A7, B7 SG Summing gate A8, B8 P2AH CCD horizontal register clock A-2 A9, B9 P1AH CCD horizontal register clock A-1 A10, B10 SSD Digital ground A11, B11 P2BH CCD horizontal register clock B-2 Same timing as P2AH A12, B12 P1BH CCD horizontal register clock B-1 Same timing as P1AH A13, B13 IGH Test point (Horizontal input gate) A14, B14 ISV Test point (Vertical input source) Shorted to RD A15, B15 IGV Test point (Vertical input gate) A16, B16 P1BV CCD vertical register clock B-1 Same timing as P1AV A17, B17 P2BV CCD vertical register clock B-2 Same timing as P2AV A18, B18 P1AV CCD vertical register clock A-1 A19, B19 P2AV CCD vertical register clock A-2 A20, B20 TG Transfer gate C1 IGH Test point (Horizontal input gate) C2 P1BH CCD horizontal register clock B-1 Same timing as P1AH C3 P2BH CCD horizontal register clock B-2 Same timing as P2AH C4 SSD Digital ground C5 P1AH CCD horizontal register clock A-1 C6 P2AH CCD horizontal register clock A-2 C7 SG Summing gate C8 OG Output gate C9 OD Output transistor drain C10 OS Output transistor source C11 SSA Analog ground C12 RD Reset drain C13 RG Reset gate C14 TG Transfer gate C15 P2AV CCD vertical register clock A-2 C16 P1AV CCD vertical register clock A-1 C17 P2BV CCD vertical register clock B-2 Same timing as P2AV C18 P1BV CCD vertical register clock B-1 Same timing as P1AV C19 IGV Test point (Vertical input gate) C20 ISV Test Point (Vertical input source) Shorted to RD I Precautions for use (Electrostatic countermeasures) * Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with an earth ring, in order to prevent electrostatic damage due to electrical charges from friction. * Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge. * Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge. * Ground the tools used to handle these sensors, such as tweezers and soldering irons. It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of damage that occurs. HAMAMA TSU PHO TONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184, http://www.hamamatsu.com German y: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, German y, Telephone: (49) 08152-3750, Fax: (49) 08152-2658 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 How ard Court, 10 Tewin Road, W elwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1/E, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741 Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions. Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. ©2004 Hamamatsu Photonics K.K. Cat. No. KMPD1078E05 Sep. 2004 DN