RFP30N06LE HARRIS | Alldatasheet

Document overview

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Technical content

Features

  • 30A, 60V
  • r DS(ON) = 0.047Ω
  • 2kV ESD Protected Temperature Compensating PSPICE Model
  • Peak Current vs Pulse Width Curve
  • UIS Rating Curve

Description

The RFP30N06LE, RF1S30N06LE and RF1S30N06LESM are N-Channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switch- ing regulators, switching converters, motor drivers and relay drivers. These transistors can be operated directly from inte- grated circuits. These transistors incorporate ESD protection and are designed to withstand 2kV (Human Body Model) of ESD. Formerly developmental type TA49027. PACKAGE AVAILABILITY PART NUMBER PACKAGE BRAND RFP30N06LE TO-220AB F30N06LE RF1S30N06LE TO-262AA 1S30N06L RF1S30N06LESM TO-263AB 1S30N06L NOTE: When ordering use the entire part number. Add suffix, 9A, to obtain the TO-263 variant in tape and reel i.e. RF1S30N06LESM9A. Absolute Maximum Ratings TC = +25oC RFP30N06LE, RF1S30N06LE, RF1S30N06LESM UNITS Drain Current Refer to Peak Current Curve A Power Dissipation 0.645 W W/oC STG , TJ -55 to +175 oC July 1995 File Number 3629.1

Specifications RFP30N06LE, RF1S30N06LE, RF1S30N06LESM Electrical SpecificationsTC = +25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain-Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0V 60 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA1 - 2 V Zero Gate Voltage Drain Current I DSS VDS = 60V, VGS = 0V TC = +25oC- - 1 µA TC = +150oC- - 5 0 µA Gate-Source Leakage Current I GSS VGS = +10, -8V - - 10 µA On Resistance r DS(ON) ID = 30A, VGS = 5V - - 0.047 Ω Turn-On Time t ON VDD = 30V, ID = 30A, R L = 1Ω , VGS = 5V, R GS = 2.5Ω - - 140 ns Turn-On Delay Time t D(ON) -1 1-n s Rise Time t R -8 8-n s Turn-Off Delay Time t D(OFF) -3 0-n s Fall Time t F -4 0-n s Turn-Off Time t OFF - - 100 ns Total Gate Charge Q G(TOT) VGS = 0V to 10V VDD = 48V, ID = 30A, R L = 1.6Ω -5 1 6 2 n C Gate Charge at 5V Q G(5) VGS = 0V to 5V - 28 34 nC Threshold Gate Charge Q G(TH) VGS = 0V to 1V - 1.8 2.6 nC Input Capacitance C ISS VDS = 25V, VGS = 0V, f = 1MHz - 1350 - pF Output Capacitance C OSS - 290 - pF Reverse Transfer Capacitance C RSS -8 5-p F Thermal Resistance Junction to Case R θJC - - 1.55 oC/W Thermal Resistance Junction to Ambient RθJA -- 8 0 oC/W Source-Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Forward Voltage V SD ISD = 30A - - 1.5 V Reverse Recovery Time t RR ISD = 30A, dISD /dt = 100A/µs - - 125 ns

FIGURE 1. SAFE OPERATING AREA CURVE FIGURE 2. NORMALIZED MAXIMUM TRANSIENT THERMAL FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs FIGURE 4. PEAK CURRENT CAPABILITY FIGURE 5. TYPICAL SATURATION CHARACTERISTICS FIGURE 6. TYPICAL TRANSFER CHARACTERISTICS

175 T c–

FIGURE 7. NORMALIZED r DS(ON) vs JUNCTION TEMPERATURE FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN FIGURE 10. NORMALIZED POWER DISSIPATION vs FIGURE 11. TYPICAL CAPACITANCE vs DRAIN-TO-SOURCE FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR

0.75 BVDSS

0.50 BVDSS

0.25 BVDSS

RFP30N06LE, RF1S30N06LE, RF1S30N06LESM Temperature Compensated PSPICE Model for the RFP30N06LE, RF1S30N06LE, RF1S30N06LESM SUBCKT RFP30N06LE 2 1 3; rev 6/2/93 CA 12 8 1 3.34e-9 CB 15 14 3.44e-9 CIN 6 8 0 1.343e-9 DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DESD1 91 9 DESD1MOD DESD2 91 7 DESD2MOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 75.39 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 7.22e-9 LSOURCE 3 7 6.31e-9 MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 11.86e-3 RGATE 9 20 2.52 RIN 6 8 1e9 RSCL1 5 51 RSLVCMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 26.6e-3 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 0.5 ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/89,7)) .MODEL DBKMOD D (RS = 1.82e-1 TRS1 = 7.50e-3 TRS2 = -4.0e-5) .MODEL DESD1MOD D (BV = 13.54 TBV1 = 0 TBV2 = 0 RS = 45.5 TRS1 = 0 TRS2 = 0) .MODEL DESD2MOD D (BV = 11.46 TBV1 = -7.576e-4 TBV2 = -3.0e-6 RS = 0 TRS1 = 0 TRS2 = 0) .MODEL DPLCAPMOD D (CJO = 0.591e-9 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 1.94 KP = 139.2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 1.07e-3 TC2 = -3.03e-7) .MODEL RDSMOD RES (TC1 = 5.38e-3 TC2 = 1.64e-5) .MODEL RSLVCMOD RES (TC1 = 1.75e-3 TC2 = 3.90e-6) .MODEL RVTOMOD RES (TC1 = -2.15e-3 TC2 = -5.43e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.05 VOFF = -1.5) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.5 VOFF = -4.05) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.2 VOFF = 2.8) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.8 VOFF = -2.2) .ENDS NOTE: For further discussion of the PSPICE model, consultA New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records 1991. GATE LGATE RGATE EVTO 12 13 S1A S1B S2A S2B CA CB EGS EDS RIN CIN MOS1 MOS2 DBREAK DBODY LDRAIN DRAIN RSOURCE LSOURCE SOURCE RBREAK RVTO VBAT IT VTO ESG DPLCAP 17 18 RDRAIN ESCL RSCL1RSCL2 EBREAK + DESD1 DESD2