CA1391 HARRIS | Alldatasheet

Document overview

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Technical content

Features

  • CA1391E - Positive Horizontal Sawtooth Input
  • CA1394E - Negative Horizontal Sawtooth Input
  • Internal Shunt Regulator
  • Linear Balanced Phase Detector
  • Preset Hold Control Capability
  • Low Thermal Frequency Drift
  • Small Static Phase Error
  • Variable Output Duty Cycle
  • Adjustable DC Loop Gain

Description

The Harris CA1391E and CA1394E are monolithic integrated circuits designed for use in the low-level horizontal section of monochrome or color television receivers. Functions include a phase detector, an oscillator, a regulator, and a pre-driver. The CA1391E and CA1394E are electrically equivalent and pin compatible with industry types 1391 and 1394 in similar packages. Pinout CA1391, CA1394 (PDIP) TOP VIEW Functional Diagram Part Number Information PART NUMBER TEMP. RANGE ( oC) PACKAGE PKG. NO. CA1391E 0 to 85 8 Ld PDIP E8.3 CA1394E 0 to 85 8 Ld PDIP E8.3 OUT GND SYNC HORIZ SPACE OSC PHASE RATIO TIMING DETECT OUTIN IN MARK- PHASE DETECTOR OUT PHASE DETECTOR REGULATOR OSCILLATOR PRE- DRIVER HORIZONTAL SAWTOOTH INPUT SYNC INPUT GROUND MARK-SPACE RATIO OUTPUT PHASE DETECTOR OUTPUT OSCILLATOR TIMING 3 2 6 75 [ /Title (CA13 91, CA139 /Sub- ject (TV Hori- zontal Proces- sors) /Autho r () /Key- words (Har- ris Semi- con- ductor, TV hori- zontal proces- sor, hori- zontal oscilla- tor, hori- zontal driver, phase detec- tor, AFC cir- cuit, AGC cir- cuit, OBSOLETE PR ODUCT NO RECOMMENDED REPLA CEMENT Call Central Applications 1-800-442-7747 or email: centapp@harris.com

Absolute Maximum Ratings Thermal Information P-P Operating Conditions Thermal Resistance (Typical, Note 1) θJA (oC/W) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications(See Figure 1) PARAMETER TEST CONDITIONS TEMP. (oC) MIN TYP MAX UNITS Supply Voltage S 1, S5, S6 = 2; S2, S3, S4, S7, S8 = 1 Measure Terminal 6 to GND 2 5 8-9 V Free Running Frequency -1% S1, S5, S6 = 2; S2, S3, S4, S7, S8 = 1 Counter to Terminal 1 25 14734 - 16734 Hz Output Leakage S 2, S3, S6, S8 = 1; S1, S4, S5, S7 = 2 Measure Terminal 1 to 25V 2 5 -1 0- m V Output Saturation S 2, S3, S5, S6, S8 = 1; S1, S4, S7 = 2 Measure Terminal 1 to GND 2 5 -6 0- m V Phase Detector Bias S 2, S5, S6, S8 = 1; S1, S3, S4, S7 = 2 Measure Terminal 3 to GND 25 - 1.9 - V Phase Detector Leak S 5, S8 = 1; S1, S2, S3, S4, S6, S7 = 2 Measure Terminal 5 to +4V 25 -2 - 2 mV Phase Detector Low S 1, S5, S8 = 1; S2, S3, S4, S6, S7 = 2 Measure Terminal 5 to +4V 25 -0.55 (Note 2) -- V Phase Detector High S 1, S5, S6, S8 = 1; S2, S3, S4, S7 = 2 Measure Terminal 5 to +4V 25 +0.55 (Note 2) -- V Phase Detector Balance VDET2 + VDET3 25 -100 - 100 mV Sync Diode S 1, S2, S3, S4, S6, S7 = 1; S5, S8 = 2 25 0.3 - 1.2 V Static Phase Error See Figure 3 25 - 0.5 - µs Oscillator Pull In Range - ±300 - Hz Oscillator Hold In Range - ±900 - Hz NOTE: 2. Polarity reversed in the CA1391. CA1391, CA1394

FIGURE 1. DC TEST CIRCUIT NOTE: All resistances are in ohms.