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Technical content
Features
85MHz to 4200MHz LO Frequency Range Fractional-N Synthesizer with Very Low Spurious Levels Typical Step Size 1.5Hz On-Chip Crystal-Sustaining Circuit with Programmable Loading Capacitors Fully Integrated Low Phase Noise VCO and LO Buffers Integrated Phase Noise
- Typ. 0.3° rms at 1 GHz
- T y p . 0 . 8 ° r m s a t 3 G H z High Linearity RF Mixer(s) 30MHz to 6000MHz Mixer Frequency Range Input IP3 +23dBm Mixer Bias Adjustable for Low Power Operation Full Duplex Mode (RFFC5061) 2.7V to 3.3V Power Supply Low Current Consumption 3- or 4-Wire Serial Interface
Applications
Frequency Band Shifters Wideband Radios Diversity Receivers Software Defined Radios DS110614 Package: QFN, 32-Pin, 5mmx5mm RFFC5061/62 Wideband Syn- thesizer/VCO with Integrated 6GHz Mixer
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Absolute Maximum Ratings Parameter Rating Unit Supply Voltage (VDD) -0.5 to +3.6 V Input Voltage (VIN) any pin -0.3 to V DD+0.3 V RF/IF mixer input power +15 dBm Operating Temperature Range -40 to +85 °C Storage Temperature Range -40 to +150 °C Parameter Specification Unit ConditionMin. Typ. Max. ESD Requirements Human Body Model 2000 V DC Pins
1500 V All Pins
Charge Device Model 500 V All Pins Operating Conditions Supply voltage (VDD) 2.7 3.0 3.3 V Temperature (TOP)- 4 0 + 8 5 ° C Logic Inputs/Outputs (VDD=Supply to DIG_VDD pin) Input low voltage -0.3 +0.5 V Input high voltage 1.5 V DD V Input low current -10 +10 AI n p u t = 0 V Input high current -10 +10 AI n p u t = V DD Output low voltage 0 0.2*V DD V Output high voltage 0.8*V DD VDD V Load resistance 10 k Ω Load capacitance 20 pF GPO Drive Capability Sink Current 20 mA At V OL = +0.6V Source Current 20 mA At V OL = +2.4V Output Impedance 25 Ω Static Supply Current (IDD) with 1GHz LO 100 mA Low current, MIX_IDD=1, one mixer enabled. 125 mA High linearity, MIX_IDD=6, one mixer enabled. Standby 4 mA Reference oscillator and bandgap only. Power Down Current 300 A ENBL=0 and REF_STBY=0 Mixer 1/2 (Mixer output driving 4:1 balun) Gain -2 dB Not including balun losses Noise Figure <3000MHz 10 dB Low current setting 13 dB High linearity setting Noise Figure <4000MHz 11 dB Low current setting 15 dB High linearity setting IIP3 +10 dBm Low current setting +23 dBm High linearity setting Caution! ESD sensitive device. Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical perfor- mance or functional operation of the device under Absolute Maximum Rating condi- tions is not implied. The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended appli- cation circuitry and specifications at any time without prior notice. RFMD Green: RoHS compliant per EU Directive 2002/95/EC, halogen free per IEC 61249-2-21, < 1000ppm each of antimony trioxide in polymeric materials and red phosphorus as a flame retardant, and <2% antimony in solder.
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Parameter Specification Unit ConditionMin. Typ. Max. Mixer 1/2 (Mixer output driving 4:1 balun) (continued) Input Port Frequency range 30 6000 MHz Mixer input return loss 10 dB 100 Ω differential Output port frequency range 30 4500 MHz Mixer 1/2 (Mixer output driving 1:1 balun) Output Port Frequency Range 30 6000 MHz Gain -7 dB Not including balun losses Reference Oscillator Crystal frequency 10 26 26 MHz Reference divider ratio 1 7 Synthesizer (PLL Closed Loop, 26MHz Crystal) Synthesizer Output Frequency 85 4200 MHz Phase detector frequency 26 MHz Phase noise (LO=1GHz) -102 dBc/Hz 10kHz offset -103 dBc/Hz 100kHz offset -130 dBc/Hz 1MHz offset 0.30 0.40 ° RMS integrated from 1kHz to 40MHz Phase noise (LO=2GHz) -96 dBc/Hz 10kHz offset -97 dBc/Hz 100kHz offset -124 dBc/Hz 1MHz offset 0.45 0.60 ° RMS integrated from 1kHz to 40MHz Phase noise (LO=3GHz) -91 dBc/Hz 10kHz offset -93 dBc/Hz 100kHz offset -120 dBc/Hz 1MHz offset 0.80 1.00 ° RMS integrated from 1kHz to 40MHz Phase noise (LO=4GHz) -90 dBc/Hz 10kHz offset -91 dBc/Hz 100kHz offset -118 dBc/Hz 1MHz offset 0.85 1.10 ° RMS integrated from 1kHz to 40MHz Normalized phase noise floor -210 dBc/Hz Measured at 20kHz to 30kHz offset Voltage Controlled Oscillator Open loop phase noise at 1MHz offset 2.5GHz LO frequency -134 dBc/Hz VCO3, LO Divide by 2 2.0GHz LO frequency -135 dBc/Hz VCO2, LO Divide by 2 1.5GHz LO frequency -136 dBc/Hz VCO1, LO Divide by 2 Open loop phase noise at 10MHz offset 2.5GHz LO frequency -149 dBc/Hz VCO3, LO Divide by 2 2.0GHz LO frequency -150 dBc/Hz VCO2, LO Divide by 2 1.5GHz LO frequency -151 dBc/Hz VCO1, LO Divide by 2 External LO Input LO Input Frequency Range 85 4200 MHz LO Divide by 1 LO Input Frequency Range 85 5400 MHz LO Divide by 2 External LO Input Level 0 dBm Driven from 50 Source Via a 1:1 Balun
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Note 1: An RC low-pass filter could be used on this line to reduce digital noise. Note 2: If the device is under software control this input can be configured as a general purpose output (GPO). Note 3: Connect a 51K resistor from this pin to ground. This pin is sensitive to low frequency noise injection. Note 4: DC voltage should not be applied to this pin. Use either an AC coupling capacitor as part of lumped element matching network or a transformer (see application schematic). Note 5: This pin must be connected to ANA_VDD2 using an RF choke or transformer (see application schematic). Pin Function Description 1E N B L / G P O 5 Device Enable pin (see note 1 and 2). 2 EXT_LO External local oscillator input (See note 4). 3 EXT_LO_DEC Decoupling pin for external local oscillator (See note 4). 4R E X T External bandgap bias resistor (See note 3). 5 ANA_VDD1 Analog supply. Use good RF decoupling. 6L F I L T 1 Phase detector output. Low-frequency noise-sensitive node. 7L F I L T 2 Loop filter op-amp output. Low-frequency noise-sensitive node. 8L F I L T 3 VCO control input. Low-frequency noise-sensitive node. 9M O D E / G P O 6 Mode select pin (See note 1 and 2). 10 XTALP Reference crystal input. 11 XTALN Reference crystal input. 12 TM Connect to ground. 13 MIX1_IPN Differential input 1 (see note 4). On RFFC5062 this pin is NC. 14 MIX1_IPP Differential input 1 (see note 4). On RFFC5062 this pin is NC. 15 GPO1/ADD1 General purpose output / MultiSlice address bit. 16 GPO2/ADD2 General purpose output / MultiSlice address bit. 17 MIX1_OPN Differential output 1 (see note 5). On RFFC5062 this pin is NC. 18 MIX1_OPP Differential output 1 (see note 5). On RFFC5062 this pin is NC. 19 DIG_VDD Digital supply. Should be decoupled as close to the pin as possible. 20 NC 21 NC 22 ANA_VDD2 Analog supply. Use good RF decoupling. 23 MIX2_IPP Differential input 2 (see note 4). 24 MIX2_IPN Differential input 2 (see note 4). 25 GPO3/FM General purpose output / frequency control input. 26 GPO4/LD/DO General purpose output / Lock detect output / serial data out. 27 MIX2_OPN Differential output 2. (see note 5). 28 MIX2_OPP Differential output 2. (see note 5). 29 RESETX Chip reset (active low). Connect to DIG_VDD if asynchronous reset is not required. 30 ENX Serial interface select (active low) (See note 1). 31 SCLK Serial interface clock (see note 1). 32 SDATA Serial interface data (see note 1). Exposed paddle Ground reference, should be connected to PCB ground through a low impedance path.
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Theory of Operation The RFFC5061 and RFFC5062 are wideband RF frequency converter chips which include a fractional-N synthesizer and a low noise VCO core. The RFFC5061 has an LO signal multiplexer, tw o LO buffer circuits, and two RF mixers. The RFFC5062 has a single LO buffer circuit and one RF mixer. Both devices have an integrated voltage reference and low drop out regulators sup- plying critical circuit blocks such as th e VCOs and synthesizer. Synthesizer programming, device configuration and control are achieved through a mixture of hardware and software controls . All on-chip registers are programmed through a simple 3-wire serial interface. VCO The VCO core in the RFFC5061 and RFFC5062 consists of three VCOs which, in conjunction with the integrated LO dividers of /2 to /32, cover the LO range of 85MH z to 4200MHz. Each VCO has 128 overlapping bands which are used to achieve low VCO gain and optimal phase noise performance across the whole tuning range. The chip automatically selects the correct VCO (VCO auto-select) and VCO band (VCO coarse tuning) to generate the desired LO frequency based on the values programmed into the PLL1 and PLL2 registers banks. The VCO auto-select and VCO coarse tuning are triggered every time ENBL is taken high, or if the PLL re-lock self clearing bit is programmed high. Once the correct VCO and band have been selected the PLL will lock onto the correct frequency. During the band selection process, fixed capacitance elements are progressively connected to the VCO resonant circuit until the VCO is oscillating approximately at the correct frequency. The output of this band selection, CT_CAL, is made available in the read- back register. A value of 127 or 0 in this register indicates th at the coarse tuning was unsucce ssful, and this will also be in di- cated by the CT_FAILED flag also available in the read-back register. A CT_CAL value between 1 and 126 indicates a success- ful calibration, the actual value being dependent on the desired frequency as well as process variation for a particular device. The band select process will center the VCO tuning voltage at about 1.0V, compensating for manufacturing tolerances and pro- cess variation as well as environmental factors including temperat ure. In applications where the device is left enabled at the same LO frequency for some time, it is recommended that automatic band selection be performed for every 30°C change in temperature. This assumes an active loop filter. The RFFC5061 and RFFC5062 feature a differential LO input to allo w the mixer to be driven from an external LO source. The fractional-N PLL can be used wi th an external VCO driven into this LO input, which may be useful to reduce phase noise in some applications. This may also require an external op-amp, dependant on the tuning voltage required by the external VCO. In the RFFC5061 the LO signal is routed to mixer 1, mixer 2, or both mixers depending on the state of the MODE pin (or MODE bit if under software control) and the value of the FULLD bit. Setting FULLD high puts the device into Full Duplex mode and both mixers are enabled. Fractional-N PLL The RFFC5061 and RFFC5062 contain a charge pump-based fracti onal-N phase locked loop (P LL) for controlling the three VCOs. The PLL has been designed to use a standard crystal of between 10MHz and 26MHz. The PLL includes automatic cali- bration systems to counteract the effects of process and envi ronmental variations, ensuring repeatable loop response and phase noise performance. As well as the VCO auto-select and coarse tuning, there is a loop filter calibration mechanism which can be enabled if required. This operates by adjusting the charge pump current to maintain loop bandwidth. This can be useful for applications where the LO is tuned over a wide frequency range. Two PLL programming banks are provided, the first bank is preceded by the label PLL1 and the second bank is preceded by the label PLL2. For the RFFC5061 these banks are used to program mixer 1 and mixer 2 respectively, and are selected automati- cally as the mixer is selected using MODE. For the RFFC5062 mixer 2 and register bank PLL2 are normally used. The VCO outputs are first divided down in a high frequency presca lar. The output of this high frequency prescalar then enters the N divider, which is a fractional divider containing a dual-modulus prescaler and a digitally spur-compensated fractional sequence generator. This allows very fine frequency steps and minimizes fractional spurs. The fractional energy is randomized and appears as fractional noise at frequency offsets above 100kHz which will be attenuated by the loop filter. An external loop filter is used, giving flexibility in setting loop bandwidth for optimizing phase noise and lock time, for example.
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . The synthesizer step size is typically 1.5Hz when using a 26MH z reference frequency. The exact step size for any reference and LO frequency can be calculated using the following formula: (FREF * P) / (R * 224 * LO_DIV) Where FREF is the reference frequency, R is the reference division rati o, P is the prescalar division ratio, and LO_DIV is the LO divider value. Pin 26 (GPO4) can be configured as a lock detect pin. The lock status is also available in the read-back register. The lock detect function is a window detector on the VCO tuning voltage. The lock flag will be high to show PLL lock which corresponds to the VCO tuning voltage being within the specified range, typically 0.30V to 1.25V. Phase Detector and Charge Pump The phase detector provides a current output to drive an active loop filter. The charge pump output current is set by the value contained in the P1_CP_DEF and P2_CP_DEF fields in the loop filter configuration register. The charge pump current is given by approximately 3uA/bit, and the fields are 6 bits long. This gives default value (31) of 93uA and maximum value (63) of 189uA. If the automatic loop bandwidth calibration is enabled the charge pump current is set by the calibration algorithm based upon the VCO gain. The phase detector will operate with a maximum input frequency of 26MHz. Loop Filter The active loop filter is implemented using the on-chip low no ise op-amp with external resistors and capacitors. The internal configuration of the chip is shown below with the recommended active loop filter. The op-amp gives a tuning voltage range of typically +0.1V to +2.4V. The recommended loop filter shown is designed to give the lowest integrated phase noise for refer- ence frequency of 26MHz. The external loop filter gives the flex ibility to optimize the loop response for any particular applic a- tion and combination of reference and VCO frequencies. Crystal Oscillator The RFFC5061 and RFFC5062 have been designed to use a standard, low cost, external crystal of typically 26MHz. The crystal oscillator circuit contains internal loading capacitors. No external loading capacitors are required, assuming crystal load speci- fication of between 8pF and 10pF. The internal loading capacitors are a combination of fixed ca pacitance, and an array of switched capacitors. The switched capacitors can be used to tune the crystal oscillator onto the required center frequency and minimize frequency error. The capacitance steps are approximately 0.25pF (fine) and 0.55pF (coarse) and the total differential capacitance range is from LFILT1 8p2 180p 22K 470R 470R 330p 330p LFILT2 LFILT3 +1.1V
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . about 2pF to 12pF. The PCB stray capacitance and oscillator input and output capacitance will also contribute to the crystal's total load capacitance. When the PLL is not in use, it may be desirable to turn off the internal reference circuits, by setting the REFSTBY bit low, to min- imize current draw while in standby mode. On cold start, or if REFSTBY is programmed low, the reference circuits will need a warm-up period. A crystal oscillator typically takes many millisecon ds to settle. This time is set by the SU_WAIT bits. This wi ll allow the clock to be stable and immediately available when the ENBL bit is asserted high, allowing the PLL to assume normal operation. If the current consumption of the reference circuits in standby mode, typically 4mA, is not critical, then the REFSTBY bit can be set high. This allows the fastest startup and lock time after ENBL is taken high. Wideband Mixer The mixers are wideband, double-balanced Gilbert cells. They support RF/IF frequencies from 30MHz up to 6000MHz. Each mixer has an input port and an output port that can be used for either IF or RF (in other words, for up- or down-conversion). The mixer current can be programmed to between about 15mA and 45mA depending on linearity requirements. The majority of the mixer current is sourced through the output pins via either a ce nter-tapped balun or an RF choke in the external matching cir- cuitry to the supply. The RF mixer input and output ports are differential and require baluns and simple matching circuits optimized to the specific application frequencies. A conversion gain of approximately -2dB (not including balun losses) is achieved with 100 differen- tial input impedance, and the outputs driving 200 differential load impedance. Increasing the mixer output load increases the conversion gain. The mixer has a broadband common gate input. The input impe dance is dominated by the resistance set by the mixer 1/gm term, which is inversely proportional to the mixer current setting. The resistance will be approximately 85 at the default mixer current setting (100). There is also some shunt capacitance at the mixer input, and the inductance of the bond wires (about 0.5nH on each pin) to consider at higher frequencies. The following diagram is a simple model of the mixer input impedance: The mixer output is high impedance, consisting of approximately 2k resistance in parallel with some capacitance, approxi- mately 1pF dependent on PCB layout. The mixer output does not require a conjugate matching network. It is a constant current output which will drive a real differential load of between 50Ω and 500Ω, typically 200Ω. Since the mixer output is a constant current source, a higher resistance load will give higher output voltage and gain. A shunt inductor can be used to resonate with the mixer output capacitance at the frequency of interest. This inductor may not be required at lower frequencies where the impedance of the output capacitance is less significant. At hi gher output frequencies the inductance of the bond wires (about 0.5nH on each pin) becomes more significant. Above about 4500MHz, it is beneficial to lower the output load to 50 to mini- mize the effect of the ouput capacitance. The following diagram is a simple model of the mixer output: The RFFC5061 mixer layout and pin placement has been optimized for high mixer-to-mixer isolation of greater than 60dB. The mixers can be set up to operate in half duplex mode (1 mixer active) or full duplex mode (both mixers active). This selection i s RFFC506x Mixer Input 0.5nH 0.5nH Rin Typ 850.5pF RFFC506x Mixer Output 0.5nH 0.5nH 1K 1pF 1K
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . done via control of MODE and by setting the FULLD bit. When in full duplex mode, either PLL register bank can be used, the LO signal is routed to both mixers. Serial Interface All on-chip registers in the RFFC5061 an d RFFC5062 are programmed using a proprietary 3-wire serial bus which supports both write and read operations. Synthesizer programming, device configuration, and control are achieved through a mixture of hardware and software controls. Certain functions and operations require the use of hardware controls via the ENBL, MODE, and RESETB pins in addition to programming via the serial bus. Alternatively there is the option to control the chip completely via the serial bus. The serial data interface can be configured for 4-wire operation by setting the 4wire bit in the SDI_CTRL register high. Then pin 26 is used as the data out pin, and pin 32 is the serial data in pin. Hardware Control Three hardware control pins are provided: ENBL, MODE, and RESETB. The ENBL pin has two functions: to enable the analog circuits in the chip and to trigger the VCO auto-selection and coarse tun- ing mechanisms. The VCO auto-selection and coarse tuning is in itiated when the ENBL pin is taken high. Every time the fre- quency of the synthesizer is reprogrammed, ENBL has to be asserted high to initiate these mechanisms and then to initiate the PLL locking. Alternatively following the programming of a new frequency the PLL re-lock self clearing bit could be used. If the device is left in the enabled state for long periods, it is recommended that VCO auto-selection and coarse tuning (band selection) is performed for every 30°C change in temperature. Th e lock detect flag can be used to indicate when to perform the VCO calibration, it shows that the VCO tuning voltage has drifted significantly with changing temperature. The RESETB pin is a hardware reset control that will reset all digital circuits to their startup state when asserted low. The device includes a power-on-reset function, so this pin should not normal ly be required, in which case it should be connected to the positive supply. The MODE pin controls which mixer(s) and PLL programming register bank is active. Serial Data Interface Control The normal mode of operation uses the 3-wire serial data inte rface to program the device registers, and three extra hardware control lines: MODE, ENBL and RESETB. When the device is under software control, achieved by setting the SIPIN bit in the SDI_CTRL register high, then the hardware can be controlled via the SDI_CTRL register . When this is the case, the three hardware control lines are not required. If the device is under software control, pins 1 and 9 can be configured as general purpose outputs (GPO). Mode FULLD Active PLL Register Bank Active Mixer LOW 0 1 1 HIGH 0 2 2 LOW 1 1 1 and 2 HIGH 1 2 1 and 2
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Multi-Slice Mode The Multi-Slice mode of operation allows up to four chips to be controlled from a common serial bus. The device address pins A0 and A1 are used to set the address of each part. On power up, and after a reset, the devices ignore the address pins (A1 and A2, pins 15 and 16) and any data presented to the serial bus will be programmed into all the devices. However, once the sipin bit in the SDI_CTRL register is set, each device then adopts an address according to the state of the address pins on the device. General Purpose Outputs The general purpose outputs (GPOs) can be controlled via the GPO register and will depend on the state of MODE since they can be set in different states corresponding to either mixer path 1 or 2. For example, the GPOs can be used to drive LEDs or to control external circuitry such as switches or low power LNAs. Each GPO pin can supply approximately 20mA load current. The ou tput voltage of the GPO high state will drop with increased current drive by approximately 25mV/mA. Similarly the output voltage of the GPO low state will rise with increased current, again by approximately 25mV/mA. External Modulation The RFFC5061 and RFFC5062 fractional-N synthesizer can be used to modulate the frequency of the VCO. There are two ded- icated registers, EXT_MOD and FMOD, which can be used to configure the device as a modulator. It is possible to modulate the VCO in two ways: 1.Binary FSK The MODSETUP bits in the EXT_MOD register are set to 11. GPO3 is then configured as an input and used to control the signal frequency. The frequency deviation is set by the MODSTEP and MODULATION bits in the EXT_MOD and FMOD registers respec- tively. The modulation frequency is calculated according to the following formula: Where MODULATION is a 2's complement number and FPD is the phase detector frequency. 2.Continuous Modulation The MODSETUP bits in the EXT_MOD register are set to 01. The frequency deviation is set by the MODSTEP and MODULATION bits in the EXT_MOD and FMOD registers respectively. The VCO frequency is then changed by writing a new value into the MOD- ULATION bits, the VCO frequency is instantly updated. An arbi trary frequency modulation can then be performed dependant only on the rate at which values are written into the FMOD register. Slice2 (0) Slice2 (1) Slice2 (2) Slice2 (3) A1 A2 ENX SDATA SCLK VddVdd Vdd Vdd A1 A2 A1 A2 A1 A2 FMOD 2MODSTEP FPD MODULATION 216=
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . The modulation frequency is calculated according to the following formula: Where MODULATION is a 2's complement number and FPD is the phase detector frequency. Programming Information The RFFC5061 and RFFC5062 share a common serial interface and control block. Please refer to the Register Maps and Pro- gramming Guide which are available for download from http://rfmd.com/products/IntSynthMixer/. Evaluation Boards Evaluation boards for RFFC5061 and RFFC5062 are provided as part of a design kit, along with the necessary cables and pro- gramming software tool to enable full evaluation of the device. Design kits can be ordered from www.rfmd.com or from local RFMD sales offices and authorized sales channels. For ordering codes please see “Ordering Information” on page 25. For further details on how to set up the design kits go to http://rfmd.com/products/IntSynthMixer/. The standard evaluation boards are configured with 3.7GHz ceramic baluns on the RF ports and wideband transformers on the IF ports. On the RFFC5061 evaluation board, mixer 1 is co nfigured for down-conversion and mixer 2 is configured for up- conversion. On the RFFC5062 evaluation board, mixer 2 is configured for down conversion. FMOD 2MODSTEP FPD MODULATION 216=
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Detailed Functional Block Diagram Note: Wideband transmission line transformer baluns shown above for operation to ~2.5GHz. Substitute baluns for higher fre- quency applications as required. Pre- scaler Mux N divider Sequence generator Phase detector Reference divider Charge pump GPO Control Biasing & LDOs Lock Flag Ext LO 51K +3V MODE ENBL RESET ENX SDATA SCLK RFXF8553 4:1 Balun +3V OP1 RFXF8553 4:1 Balun +3V OP2 RFXF9503 1:1 Balun IP2 RFXF9503 1:1 Balun IP1 Loop Filter 3-Wire Serial Bus Control Lines Mixer 2 Mixer 1 RFFC5061 Only Xtal oscillator & tuning /2n [n=0..5]
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . RFFC5061 Pin Out RFFC5062 Pin Out Exposed paddle ENBL/GPO5 EXT_LO EXT_LO_DEC REXT ANA_VDD1 LFILT1 LFILT2 LFILT3 GPO2/ADD2 GPO1/ADD1 MIX1_IPP MIX1_IPN TM XTALN XTALP MODE/GPO6 GPO3/FM GPO4/LD/DO MIX2_OPN MIX2_OPP RESETX ENX SCLK SDATA MIX2_IPN MIX2_IPP ANA_VDD2 NC NC DIG_VDD MIX1_OPP MIX1_OPN Exposed paddle ENBL/GPO5 EXT_LO EXT_LO_DEC REXT ANA_VDD1 LFILT1 LFILT2 LFILT3 GPO2/ADD2 GPO1/ADD1 TM XTALN XTALP MODE/GPO6 GPO3/FM GPO4/LD/DO MIX_OPN MIX_OPP RESETX ENX SCLK SDATA MIX_IPN MIX_IPP ANA_VDD2 NC NC DIG_VDD NC NC NC NC
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Wideband Application Schematic (<2.5GHz) 51K 33pF 33pF 33pF 33pF VDDA2 VDDD 8.2pF 180pF 330pF C10 22K 470RR2 VDDA2 VDDA2 100pF C20 100pF C21 100pF C23 100pF C24 100pF C26 100pF C27 100pF C28 100pF C29 100pF C30 RF_OP2 RF_IP2 RF_OP1 RF_IP1 VDDA1 33pF C13 33pF C14 33pF C15 330pF C17 470RR6 100pF RF_OP2_P RF_OP2_N RF_IP2_P RF_IP2_N RF_OP1_N RF_OP1_P RF_OP1 RF_IP2 RF_OP2 RF_IP1_N RF_IP1_P 10nF C1910nF C18 RFXF9503 RFXF8553 RFXF9503 RFXF8553
50 OHM
RF_IP1 10nF C34 33pF C36 33pF C35 LFILT3 LFILT3 LFILT1 LFILT1 LFILT2 LFILT2 Loop Filter GPIO2 GPIO1 GPIO4 GPIO3 220RR25 ENBL SDATA SCLK ENX RESETX MODE XTALP10 ENBL1 EXT_LO2 EXT_LO_DEC3 REXT4 ANA_VDD15 LFILT16 LFILT27 LFILT38 MODE9 XTALN11 GPIO115 TM 12 MIX1_IO1N13 MIX1_IO1P14 GPIO216 ANA_VDD2 22 MIX1_IF_IO2N 17 MIX1_IF_IO2P 18 DIG_VDD 19 NC 20 NC 21 RESETX29 MIX2_IF_IO2P 23 MIX2_IF_IO2N 24 GPIO325 GPIO426 MIX2_IO1P27 MIX2_IO1N28 SDATA32 ENX30 SCLK31 GND 33 RFFC5061_RFFC5062 D1 GREEN LOCK DETECT LED RFFC5061 Only 26MHz XTAL
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Narrowband 3.7GHz Application Schematic 51K 33pF 33pF 33pF 33pF VDDA2 VDDD 8.2pF 180pF 330pF C10 22K 470RR2 VDDA2 100pF C23 100pF C24 100pF C26 100pF C27 100pF C28 15pF C29 15pF C30 RF_OP2 IF_IP2 IF_OP1 RF_IP1 VDDA1 33pF C13 33pF C14 33pF C15 330pF C17 470RR6 RF_OP2_P RF_OP2_N IF_IP2_P IF_IP2_N IF_OP1_N IF_OP1_P IF_OP1 IF_IP2 RF_OP2 RF_IP1_N RF_IP1_P 10nF C1910nF C18 RFXF9503 RFXF8553 RF_IP1 10nF C34 33pF C36 33pF C35 LFILT3 LFILT3 LFILT1 LFILT1 LFILT2 LFILT2 Loop Filter GPIO2 GPIO1 GPIO4 GPIO3 220RR25 ENBL SDATA SCLK ENX RESETX MODE XTALP10 ENBL1 EXT_LO2 EXT_LO_DEC3 REXT4 ANA_VDD15 LFILT16 LFILT27 LFILT38 MODE9 XTALN11 GPIO115 TM 12 MIX1_IO1N13 MIX1_IO1P14 GPIO216 ANA_VDD2 22 MIX1_IF_IO2N 17 MIX1_IF_IO2P 18 DIG_VDD 19 NC 20 NC 21 RESETX29 MIX2_IF_IO2P 23 MIX2_IF_IO2N 24 GPIO325 GPIO426 MIX2_IO1P27 MIX2_IO1N28 SDATA32 ENX30 SCLK31 GND 33 RFFC5061_RFFC5062 D1 GREEN LOCK DETECT LED RFFC5061 Only JOHANSON 3700BL15B050 3 4 VDDA2 15pF C21 JOHANSON 3700BL15B200 3 4 U2L1 2.2nH Mixer 2 Up Conversion Circuit Mixer 1 Down Conversion Circuit 26MHz XTAL
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: Synthesizer and VCO VDD=+3V and T A=+27°C unless stated. -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 Phase Noise (dBc/Hz) Offset Frequency (KHz) Synthesizer Phase Noise 3000MHz VCO Frequency, 26MHz Crystal 3000MHz 1500MHz 750MHz 375MHz 187.5MHz 93.75MHz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 Phase Noise (dBc/Hz) Offset Frequency (KHz) Synthesizer Phase Noise 4000MHz VCO Frequency, 26MHz Crystal 4000MHz 2000MHz 1000MHz 500MHz 250MHz 125MHz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 1 10 100 1000 10000 100000 Phase Noise (dBc/Hz) Offset Frequency (KHz) Synthesizer Phase Noise 5200MHz VCO Frequency, 26MHz Crystal 2600MHz 1300MHz 650MHz 325MHz 162.5MHz 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 600 1200 1800 2400 3000 3600 4200 RMS Integrated Phase Noise (Degrees) LO Frequency (MHz) Synthesiser RMS Integrated Phase Noise Integration Bandwidth 1KHz to 40MHz -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 Phase Noise (dBc/Hz) Offset Frequency (KHz) VCO Phase Noise With LO Divide by 1 4000MHz VCO2 3500MHz VCO2 3000MHz VCO1 -160.0 -150.0 -140.0 -130.0 -120.0 -110.0 -100.0 -90.0 -80.0 -70.0 -60.0 Phase Noise (dBc/Hz) Offset Frequency (KHz) VCO Phase Noise With LO Divide by 2 2500MHz VCO3 2000MHz VCO2 1500MHz VCO1
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: VCO VDD=+3V and T A=+27°C unless stated. 1200 1300 1400 1500 1600 1700 1800 0 2 04 06 08 0 1 0 0 1 2 0 VCO Frequency (MHz) CT_CAL Word VCO1 Frequency versus CT_CAL VCO1 with LO Divide by 2 -40 Deg C +27 Deg C +85 Deg C 1200 1300 1400 1500 1600 1700 1800 Kvco (MHz/V) VCO Frequency /2 (MHz) VCO1 Frequency versus Kvco LO Divide by 2 VCO1 2100 2200 2300 2400 2500 2600 2700 2800 2900 0 2 04 06 08 0 1 0 0 1 2 0 VCO Frequency (MHz) CT_CAL Word VCO3 Frequency versus CT_CAL VCO3 with LO Divide by 2 -40 Deg C +27 Deg C +85 Deg C 1600 1700 1800 1900 2000 2100 2200 2300 Kvco (MHz/V) VCO Frequency /2 (MHz) VCO2 Frequency versus Kvco LO Divide by 2 VCO2 1600 1700 1800 1900 2000 2100 2200 2300 0 20 40 60 80 100 120 VCO Frequency (MHz) CT_CAL Word VCO2 Frequency versus CT_CAL VCO2 with LO Divide by 2 -40 Deg C +27 Deg C +85 Deg C 2200 2300 2400 2500 2600 2700 2800 2900 Kvco (MHz/V) VCO Frequency /2 (MHz) VCO3 Frequency versus Kvco LO Divide by 2 VCO3
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: VCO VDD=+3V and T A=+27°C unless stated. 1475 1480 1485 1490 1495 1500 1505 0.0 0.5 1.0 1.5 VCO1 Frequency /2 (MHz) Tuning Voltage (Volts) VCO1 Frequency versus Tuning Voltage For the same coarse tune setting, LO divide by two -40 Deg C +27 Deg C +85 Deg C 2465 2470 2475 2480 2485 2490 2495 2500 2505 2510 2515 0.0 0.5 1.0 1.5 VCO3 Frequency /2 (MHz) Tuning Voltage (Volts) VCO3 Frequency versus Tuning Voltage For the same coarse tune setting, LO divide by two -40 Deg C +27 Deg C +85 Deg C 1980 1985 1990 1995 2000 2005 2010 2015 2020 0.0 0.5 1.0 1.5 VCO2 Frequency /2 (MHz) Tuning Voltage (Volts) VCO2 Frequency versus Tuning Voltage For the same coarse tune setting, LO divide by two -40 Deg C +27 Deg C +85 Deg C
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: Supply Current VDD=+3V and T A=+27°C unless stated.Typical Performance Characteristics: RFMixer 2, RFFC5061 and RFFC5062 90.0 100.0 110.0 120.0 130.0 140.0 150.0 160.0 1234567 Current (mA) Mixer Bias Current Setting (MIX_IDD) Total Supply Current versus Mixer Bias Setting One Mixer Enabled, LO Frequency = 3500MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 80.0 90.0 100.0 110.0 120.0 130.0 140.0 1234567 Current (mA) Mixer Bias Current Setting (MIX_IDD) Total Supply Current versus Mixer Bias Setting One Mixer Enabled, LO Frequency = 1000MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V RFFC5061 Typical Operating Current in mA in Full Duplex Mode (both mixers enabled) with +3V supply. MIX2_IDD MIX1_IDD 1234567 1 121 126 131 136 142 146 151 2 126 131 136 141 147 151 156 3 131 136 141 147 152 156 161 4 1 3 61 4 11 4 71 5 21 5 71 6 21 6 7 5 141 146 152 157 162 167 172 6 146 151 156 161 167 171 176 7 151 156 161 166 171 176 181 60.0 70.0 80.0 90.0 100.0 110.0 120.0 130.0 140.0 150.0 160.0 100 600 1100 1600 2100 2600 3100 3600 4100 Supply Current (mA) LO Frequency (MHz) Total Supply Current versus LO Frequency One Mixer Enabled, +3.0V Supply Voltage MIX_IDD = 1 MIX_IDD = 2 MIX_IDD = 3 MIX_IDD = 4 MIX_IDD = 5 MIX_IDD = 6 MIX_IDD = 7
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: RF Mixer 1, RFFC5061 only VDD=+3V and T A=+27°C unless stated. As measured on RFFC5061 wideband evaluation board. See application schematic on page 13. -10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 400 600 800 1000 1200 1400 1600 1800 2000 Conversion Gain (dB) RF Input Frequency (MHz) Conversion Gain of Mixer 1 IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 5.0 10.0 15.0 20.0 25.0 30.0 1234567 Input IP3 (dBm) Mixer Bias Current Setting (MIX1_IDD) Mixer 1 Input IP3 versus Bias Current LO Frequency = 1000MHz, IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 1234567 Noise Figure (dB) Mixer Bias Current Setting (MIX1_IDD) Mixer 1 Noise Figure versus Bias Current LO Frequency = 1000MHz, IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 500 750 1000 1250 1500 1750 2000 Noise Figure (dB) LO Frequency (MHz) Mixer 1 Noise Figure versus Frequency IF Output = 100MHz MIX_IDD = 1 MIX_IDD = 2 MIX_IDD = 3 MIX_IDD = 4 MIX_IDD = 5 MIX_IDD = 6 MIX_IDD = 7 -2.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 1234567 Pin 1dB (dBm) Mixer Bias Current Setting (MIX1_IDD) Mixer 1 Input Power for 1dB Compression LO Frequency = 1000MHz, IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 5.0 10.0 15.0 20.0 25.0 30.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 500 750 1000 1250 1500 1750 2000 2250 Pin 1dB (dBm) IIP3 (dBm) RF Input Frequency (MHz) Mixer 1 Linearity Performance MIX_IDD = 5, +3.0V, IF Output = 100MHz Input IP3 Pin 1dB
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: RF Mixer 2, RFFC5061 and RFFC5062 VDD=+3V and T A=+27°C unless stated. As measured on RFFC5061/5062 wideband evaluation board. See application schematic on page 13. -10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 400 600 800 1000 1200 1400 1600 1800 2000 Conversion Gain (dB) RF Input Frequency (MHz) Conversion Gain of Mixer 2 IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 5.0 10.0 15.0 20.0 25.0 30.0 1234567 Input IP3 (dBm) Mixer Bias Current Setting (MIX2_IDD) Mixer 2 Input IP3 versus Bias Current LO Frequency = 1000MHz, IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 1234567 Noise Figure (dB) Mixer Bias Current Setting (MIX2_IDD) Mixer 2 Noise Figure versus Bias Current LO Frequency = 1000MHz, IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 500 750 1000 1250 1500 1750 2000 Noise Figure (dB) LO Frequency (MHz) Mixer 2 Noise Figure versus Frequency IF Output = 100MHz MIX_IDD = 1 MIX_IDD = 2 MIX_IDD = 3 MIX_IDD = 4 MIX_IDD = 5 MIX_IDD = 6 MIX_IDD = 7 -2.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 1234567 Pin 1dB (dBm) Mixer Bias Current Setting (MIX2_IDD) Mixer 2 Input Power for 1dB Compression LO Frequency = 1000MHz, IF Output = 100MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 5.0 10.0 15.0 20.0 25.0 30.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 500 750 1000 1250 1500 1750 2000 2250 Pin 1dB (dBm) IIP3 (dBm) RF Input Frequency (MHz) Mixer 2 Linearity Performance MIX_IDD = 5, +3.0V, IF Output = 100MHz Input IP3 Pin 1dB
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: RF Mixers, RFFC5061 and RFFC5062 VDD=+3V and T A=+27°C unless stated. As measured on RFFC5061/5062 wideband evaluation board. See application schematic on page 13. Note: Mixer 1 plots only apply to RFFC5061. -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 Level at Mixer 1 Output (dBm) RF Input Frequency (MHz) LO & RF Leakage at Mixer 1 Output RF Input Power 0dBm, MIX1_IDD = 4 IF Output at 100MHz LO Leakage (High Side) RF Leakage -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 Level at Mixer 2 Output (dBm) RF Input Frequency (MHz) LO & RF Leakage at Mixer 2 Output RF Input Power 0dBm, MIX2_IDD = 4 IF Output at 100MHz LO Leakage (High Side) RF Leakage -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 200 400 600 800 1000 1200 1400 1600 1800 2000 LO Leakage (dBm) LO Frequency (MHz) Typical LO Leakage at Mixer Output +3.0V Supply Voltage Path 1, -40 Deg C Path 1, +27 Deg C Path 1, +85 Deg C Path 2, -40 Deg C Path 2, +27 Deg C Path 2, +85 Deg C 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0 500 1000 1500 2000 2500 Isolation (dB) RF Input Frequency (MHz) Mixer to Mixer Isolation in Full Duplex Mode LO = RF input + 100MHz MIX_IDD = 4
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: RF Mixers at 3.7GHz VDD=+3V and T A=+27°C unless stated. As measured on 3.7GHz narrowband evaluation board, down conversion. See application schematic on page 14 -10.0 -9.0 -8.0 -7 .0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 3400 3500 3600 3700 3800 3900 4000 4100 4200 Conversion Gain (dB) RF Input Frequency (MHz) Conversion Gain of Mixer 1 Down Conversion with IF Output = 200MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 5.0 10.0 15.0 20.0 25.0 30.0 1234567 Input IP3 (dBm) Mixer Bias Current Setting (MIX1_IDD) Mixer 1 Input IP3 versus Bias Current RF Frequency = 4000MHz, IF Output = 200MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 3400 3500 3600 3700 3800 3900 4000 4100 4200 Level at Mixer 1 Output (dBm) RF Input Frequency (MHz) LO & RF Leakage at Mixer 1 Output RF Input Power -10dBm, MIX1_IDD = 4 IF Output at 200MHz LO Leakage (Low Side) RF Leakage -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 3200 3400 3600 3800 4000 4200 4400 LO Leakage (dBm) LO Frequency (MHz) Typical LO Leakage at Mixer 1 Output +3.0V Supply Voltage -40 Deg C +27 Deg C +85 Deg C 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 3400 3500 3600 3700 3800 3900 4000 4100 4200 Noise Figure (dB) RF Input Frequency (MHz) Mixer 1 Noise Figure versus Frequency IF Output = 200MHz MIX_IDD = 1 MIX_IDD = 2 MIX_IDD = 3 MIX_IDD = 4 MIX_IDD = 5 MIX_IDD = 6 MIX_IDD = 7 0.0 5.0 10.0 15.0 20.0 25.0 30.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 3400 3500 3600 3700 3800 3900 4000 4100 4200 Pin 1dB (dBm) IIP3 (dBm) RF Input Frequency (MHz) Mixer 1 Linearity Performance MIX_IDD = 5, +3.0V, IF Output = 200MHz Input IP3 Pin 1dB
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Typical Performance Characteristics: RF Mixers at 3.7GHz VDD=+3V and T A=+27°C unless stated. As measured on 3.7GHz narrowband evaluation board, up conversion. See application schematic on page 14 Resonant match on mixer output, shunt inductor L1 is 2.7nH unless stated. 0.0 5.0 10.0 15.0 20.0 25.0 1234567 Input IP3 (dBm) Mixer Bias Current Setting (MIX2_IDD) Mixer 2 Input IP3 versus Bias Current IF Input = 500MHz, RF output = 3900MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 3400 3600 3800 4000 4200 Noise Figure (dB) RF Output Frequency (MHz) Mixer 2 Noise Figure versus Frequency Up Conversion with IF Input = 500MHz MIX_IDD = 1 MIX_IDD = 2 MIX_IDD = 3 MIX_IDD = 4 MIX_IDD = 5 MIX_IDD = 6 MIX_IDD = 7 -10.0 -9.0 -8.0 -7 .0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 3400 3600 3800 4000 4200 Conversion Gain (dB) RF Output Frequency (MHz) Conversion Gain of Mixer 2 Up Conversion with IF Input = 500MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V -25.0 -20.0 -15.0 -10.0 -5.0 0.0 2500 2750 3000 3250 3500 3750 4000 4250 4500 4750 Conversion Gain (dB) RF Output Frequency (MHz) Conversion Gain of Mixer 2 versus Shunt Inductor Up Conversion with IF Input = 500MHz 3.3nH 2.7nH 2.2nH -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 2800 3000 3200 3400 3600 3800 4000 4200 4400 4600 Level at Mixer 2 Output (dBm) RF Output Frequency (MHz) IF and LO Leakage at Mixer 2 Output RF Input Power - 10dBm, MIX_IDD = 4 RF Output LO Leakage (Low Side) IF Leakage at 500MHz 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 1234567 Input IP3 (dBm) Mixer Bias Current Setting (MIX2_IDD) Mixer 2 Noise Figure versus Bias Current IF Input = 500MHz, RF Output = 3900MHz -40 Deg C, +2.7V -40 Deg C, +3.0V -40 Deg C, +3.3V +27 Deg C, +2.7V +27 Deg C, +3.0V +27 Deg C, +3.3V +85 Deg C, +2.7V +85 Deg C, +3.0V +85 Deg C, +3.3V
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com . Package Drawing QFN, 32-pin, 5mmx5mm
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com .
Ordering Information
Part Number Description Devices/Container RFFC5061SB 32-pin QFN 5-piece sample bag RFFC5061SQ 32-pin QFN 25-piece sample bag RFFC5061SR 32-pin QFN 100-piece reel RFFC5061TR7 32-pin QFN 750-piece reel RFFC5061TR13 32-pin QFN 2500-piece reel DKFC5061 Complete Design Kit 1 box Part Number Description Devices/Container RFFC5062SB 32-pin QFN 5-piece sample bag RFFC5062SQ 32-pin QFN 25-piece sample bag RFFC5062SR 32-pin QFN 100-piece reel RFFC5062TR7 32-pin QFN 750-piece reel RFFC5062TR13 32-pin QFN 2500-piece reel DKFC5062 Complete Design Kit 1 box