RF5111

RF5111 RFMD | Alldatasheet

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RF Micro Devices, Inc.

7628 Thorndike Road

Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Optimum Technology Matching® Applied Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS SiGe HBT Si CMOS InGaP/HBT GaN HEMT SiGe Bi-CMOS 16 15 14 13 5 6 7 8 VAT EN RF IN GND1 VCC1 APC1 APC2 VCC NC NC RF OUT RF OUT RF OUT VCC2 2f0 VCC2 VCC2 RF5111 3V DCS POWER AMPLIFIER

• 3V DCS1800 (PCN) Cellular Handsets
• 3V DCS1900 (PCS) Cellular Handsets
• 3V Dual-Band/Triple-Band Handsets
• Commercial and Consumer Systems
• Portable Battery-Powered Equipment
• GPRS Compatible The RF5111 is a high-power, high-efficiency power ampli- fier module offering high performance in GSM or GPRS applications. The device is manufactured on an advanced GaAs HBT process, and has been designed for use as the final RF amplifier in DCS1800/1900 handheld digital cellular equipment and other applications in the 1700MHz to 2000MHz band. On-board power control provides over 65dB of control range with an analog volt- age input, and provides power down with a logic “low” for standby operation. The device is self-contained with 50 Ω input and the output can be easily matched to obtain opti- mum power and efficiency characteristics. The RF5111 can be used together with the RF5110 for dual-band operation. The device is packaged in an ultra-small plas- tic package, minimizing the required board space.
• Single 2.7V to 4.8V Supply Voltage
• +33dBm Output Power at 3.5V
• 27dB Gain with Analog Gain Control
• 50% Efficiency
• 1700MHz to 1950MHz Operation
• Supports DCS1800 and PCS1900 RF5111 3V DCS Power Amplifier RF5111PCBA-41X Fully Assembled Evaluation Board Rev A1 060921

1.50 TYP

2 PLCS

0.15 CB -B-

1.37 TYP

0.15 CB 0.15 CA -A- 3.00 SQ. 2.75 SQ.2 PLCS 0.15 CA 1.00 0.85 0.05 0.01 0.80 0.65 0.05 C 12° MAX -C- SEATING PLANE Shaded lead is pin 1. Dimensions in mm. CA B0.10 M 0.30 0.18 0.60 0.24 TYP 0.50 0.55 0.30 1.65 1.35 SQ. 0.23 0.13

4 PLCS

0.45 0.00 Package Style: QFN, 16-Pin, 3x3 RoHS Compliant & Pb-Free Product

Supply Voltage -0.5 to +6.0 V DC Power Control Voltage (VAPC) -0.5 to +3.0 V Enable Voltage (VAT_EN) -0.5 to +3.0 V DC Supply Current 1500 mA Input RF Power +13 dBm Duty Cycle at Max Power 50 % Output Load VSWR 10:1 Operating Case Temperature -40 to +85 °C Storage Temperature -55 to +150 °C Parameter Specification Unit ConditionMin. Typ. Max. Overall Temp = 25 °C, VCC=3.6V, VAPC1,2=2.8V , VAT_EN=0V , PIN=+5.5dBm, Freq=1710MHz to 1910MHz, 37.5% Duty Cycle, pulse width=1731 μs Operating Frequency Range 1710 to 1785 MHz See application schematic for tuning details. 1850 to 1910 MHz A different tuning is required. Usable Frequency Range 1700 to 2000 MHz Maximum Output Power +32.3 +33 dBm Temp=+25°C, V CC=3.6V, VAPC1,2=2.8V +32 +32.8 dBm Temp=+25°C, V CC=3.3V, VAPC1,2=2.8V +30.4 +32.5 dBm Temp=+60°C, V CC=3.3V, VAPC1,2=2.8V Total Efficiency 43 49 % At P OUT,MAX, VCC=3.6V 15 % P OUT=+20dBm 10 % P OUT=+10dBm Recommended Input Power Range Output Noise Power -79 dBm RBW=100kHz, 1805MHz to 1880MHz and 1930MHz to 1990MHz, POUT,MIN <POUT<POUT,MAX, PIN,MIN <PIN<PIN,MAX, VCC=3.0V to 5.0V Forward Isolation -37 -25 dBm V APC1,2=0.3V, PIN=+10dBm Second Harmonic -20 -7 dBm P OUT<+32.3dBm; PIN=+10dBm Third Harmonic -20 -7 dBm P IN=+10dBm All Other Non-Harmonic Spuri- ous -36 dBm Input Impedance 50 Ω Input VSWR 2.5:1 P OUT,MAX-5dB<P OUT<POUT,MAX 3:1 P OUT<POUT,MAX-5dB Output Load VSWR Stability 8:1 Spurious<-36dBm, V APC1,2=0.3V to 2.6V, RBW=100kHz Ruggedness 10:1 No damage Output Load Impedance 4.5-j3.9 Ω Load Impedance presented at RF OUT pin Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. RoHS marking based on EUDirective2002/95/EC (at time of this printing). However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).

Parameter Specification Unit ConditionMin. Typ. Max. Power Control Power Control “ON” 3.0 V Maximum P OUT, Voltage supplied to the input Power Control “OFF” 0.3 0.5 V Minimum P OUT, Voltage supplied to the input Power Control Range 62 68 dB V APC1,2=0.3V to 2.8V, VAT_EN=2.7V , PIN=+8dBm Gain Control Slope 100 dB/V P OUT=-10dBm to +33dBm APC Input Capacitance 10 pF DC to 2MHz APC Input Current 4.5 5 mA V APC1,2=2.8V 10 μAV APC1,2=0V Turn On/Off Time 100 ns Power Supply Power Supply Voltage 3.5 V Specifications 2.7 4.8 V Nominal operating limits, P OUT<+33dBm

5.5 V With maximum output load VSWR 6:1,

POUT<+33dBm Power Supply Current 1. 3 A DC Current at P OUT,MAX 5 295 mA Idle Current, P IN<-30dBm, VAPC=2.6V 11 0 μAP IN<-30dBm, VAPC1,2=0.2V 11 0 μAP IN<-30dBm, VAPC1,2=0.2V, Temp=+85°C

Pin Function Description Interface Schematic 1V A T E N Control pin for the pin diode. The purpose of the pin diode is to attenu- ate RF drive level when VAPC is low. This serves to reduce RF leakage through the device caused by self-biasing under high RF drive levels. A good input match is maintained when the input stage bias is turned off by the same mechanism. When this pin is set high, pin diode attenua- tion control is turned on. (See Theory of Operation for details.) 2R F I N RF Input. This is a 50Ω input, but the actual impedance depends on the interstage matching network connected to pin 5. An external DC block- ing capacitor is required if this port is connected to a DC path to ground or a DC voltage. 3G N D 1 Ground connection for the preamplifier stage. For best performance, keep traces physically short and connect immediately to the ground plane. It is important for stability that this pin has it’s own vias to the groundplane, to minimize any common inductance. See pin 2. 4V C C 1 Power supply for the preamplifier stage and interstage matching. This pin forms the shunt inductance needed for proper tuning of the inter- stage match. Refer to the application schematic for proper configura- tion, and note that position and value of the components are important. See pin 2. 5A P C 1 Power Control for the driver stage and preamplifier. When this pin is “low”, all circuits are shut off. A “low” is typically 0.5V or less at room temperature. A shunt bypass capacitor is required. During normal oper- ation this pin is the power control. Control range varies from approxi- mately 1.0V for -10dBm to 2.6V for +33dBm RF output power. The maximum power achievable depends on the actual output matching; see the application information for more details. The maximum current into this pin is 5mA when V APC1=2.6V, and 0mA when VAPC=0V . 6A P C 2 Power control for the output stage. See pin 6 for more details. See pin 6. 7V C C Power supply for the bias circuits. See pin 6. 8N C Not connected. 9N C Not connected. 10 RF OUT RF output and power supply for the output stage. Bias voltage for the final stage is provided through this wide output pin. An external match- ing network is required to provide the optimum load impedance. 11 RF OUT Same as pin 10. Same as pin 10. 12 RF OUT Same as pin 10. Same as pin 10. 13 2F0 Connection for the second harmonic trap. This pin is internally con- nected to the RF OUT pins. The bonding wire together with an external capacitor form a series resonator that should be tuned to the second harmonic frequency in order to increase efficiency and reduce spurious outputs. Same as pin 10. RF IN GND VCC1 From Bias Stages PIN From Attn control circuit GND VCC To RF Stages GND APC GND PCKG BASE RF OUT From Bias Stages

Pin Function Description Interface Schematic 14 VCC2 Power supply for the driver stage. This pin forms the shunt inductance needed for proper tuning of the second interstage match. 15 VCC2 Same as pin 14. Same as pin 14. 16 VCC2 Same as pin 14. Same as pin 14. Pkg Base GND Ground connection for the output stage. This pad should be connected to the groundplane by vias directly under the device. A short path is required to obtain optimum performance, as well as to provide a good thermal path to the PCB for maximum heat dissipation. GND2 VCC2 From Bias Stages

Theory of Operation and Application Information The RF5111 is a three-stage device with 28 dB gain at full power. Therefore, the drive required to fully saturate the out- put is +5dBm. Based upon HBT (Heterojunction Bipolar Transistor) technology, the part requires only a single positive 3V supply to operate to full specification. Power control is provided through a single pin interface, with a separate Power Down control pin. The final stage ground is achieved through the large pad in the middle of the backside of the package. First and second stage grounds are brought out through separate ground pins for isolation from the output. These grounds should be connected directly with vias to the PCB ground plane, and not connected with the output ground to form a so called “local ground plane” on the top layer of the PCB. The output is brought out through the wide output pad, and forms the RF output signal path. The amplifier operates in near Class C bias mode. The final stage is “deep AB”, meaning the quiescent current is very low. As the RF drive is increased, the final stage self-biases, causing the bias point to shift up and, at full power, draws about 1500mA. The optimum load for the output stage is approximately 4.5Ω. This is the load at the output collector, and is created by the series inductance formed by the output bond wires, vias, and microstrip, and 2 shunt capacitors exter- nal to the part. The optimum load impedance at the RF Output pad is 4.5-j3.9 Ω. With this match, a 50Ω terminal imped- ance is achieved. The input is internally matched to 50 Ω with just a blocking capacitor needed. This data sheet defines the configuration for GSM operation. The input is DC coupled; thus, a blocking cap must be inserted in series. Also, the first stage bias may be adjusted by a resistive divider with high value resistors on this pin to V PC and ground. For nominal operation, however, no external adjustment is necessary as internal resistors set the bias point optimally. When the device is driven at maximum input power self biasing would occur. This results in less isolation than one would expect, and the maximum output power would be about -15dBm. If the drive power to the PA is turned on before the GSM ramp-up, higher isolation is required. In order to meet the GSM system specs under those conditions, a PIN diode attenuator connected to the input can be turned on. The figure below shows how the attenuator and its controls are con- nected. The current through the PIN diode is controlled by two signals: AT_EN and APC. The AT_EN signal allows current through the PIN diode and is an on/off function. The APC sign al controls the amount of current through the PIN diode. Normally, the AT_EN signal will be derived from the VCO ENABLE signal available in most GSM hand set designs. If maximum isolation is needed before the ramp-up, the AT_EN signal needs to be turned on before the RF power is applied to the device input. The current into this pin is not critical, and can be reduced to a few hundred micro amps with an external series resistor. Without the resistor, the pin will draw about 700μA. 5 kΩ 750 Ω 500 Ω 2 kΩ RF IN AT_EN APC VCC From Bias Stages PIN

Because of the inverting stage at the APC input, the current through the PIN diode is inverted from the APC voltage. Thus, when VAPC is high for maximum output power, the attenuator is turned off to obtain maximum drive level for the first RF stage. When VAPC is low for maximum isolation, the attenuator is be turned on to reduce the drive level and to avoid self-biasing. The PIN diode is dimensioned such that a low VAPC the impedance of the diode is about 50 Ohm. Since the input imped- ance of the first RF stage become very high when the bias is turned off, this topology will maintain a good input imped- ance over the entire VAPC control range. VCC1 and VCC2 provide supply voltage to the first and second stage, as well as provides some frequency selectivity to tune to the operating band. Essentially, the bias is fed to this pin through a short microstrip. A bypass capacitor sets the inductance seen by the part, so placement of the bypass cap can affect the frequency of the gain peak. This supply should be bypassed individually with 100pF capacitors before being combined with V CC for the output stage to prevent feedback and oscillations. The RF OUT pin provides the output power. Bias for the final stage is fed to this output line, and the feed must be capa- ble of supporting the approximately 1.5A of current required. Care should be taken to keep the losses low in the bias feed and output components. A narrow microstrip line is recommended because DC losses in a bias choke will degrade efficiency and power. While the part is safe under CW operation, maximum power and reliability will be achieved under pulsed conditions. The data shown in this data sheet is based on a 12.5% duty cycle and a 600μs pulse, unless specified otherwise. The part will operate over a 3.0V to 5.0V range. Under nominal conditions, the power at 3.5V will be greater than +32dBm at +85°C. As the voltage is increased, however, the output power will increase. Thus, in a system design, the ALC (Automatic Level Control) Loop will back down the power to the desired level. This must occur during operation, or the device may be damaged from too much power dissipation. At 5.0V, over +36dBm may be produced; however, this level of power is not recommended, and can cause damage to the device. The HBT breakdown voltage is >20V, so there is no issue with overvoltage. However, under worst-case conditions, with the RF drive at full power during transmit, and the output VSWR extremely high, a low load impedance at the collector of the output transistors can cause currents much higher than no rmal. Due to the bipolar nature of the devices, there is no limitation on the amount of current the device will sink, and the safe current densities could be exceeded. High current conditions are potentially dangerous to any RF device. High currents lead to high channel temperatures and may force early failures. The RF5111 includes temperature compensation circuits in the bias network to stabilize the RF transistors, thus limiting the current through the amplifier and protecting the devices from damage. The same mechanism works to compensate the currents due to ambient temperature variations. To avoid excessively high currents it is important to control the V APC when operating at supply voltages higher than 4.0V, such that the maximum output power is not exceeded.

Notes: 1. Using a hi-Q capacitor will increase efficiency slightly. 2. All capacitors are standard 0402 multi layer chip. RF IN VCC VCC 5.1 pF Note 1 50 Ω μstrip 1.0 pF Note 1 33 pF RF OUT Quarter wave length 15 pF VCC 1.0 pF 1 nF 12 pF Very close to pin 15/16 VCC APC 15 pF15 pF Distance center to center of capacitors 0.220" Instead of a stripline, an inductor of ~6 nH can be used Distance between edge of device and capacitor is 0.080" Instead of a stripline, an inductor of 2.2 nH can be used 15 pF 16 15 14 13 5 6 7 8 33 pF 15 pF Distance between edge of device and capacitor is 0.240" to improve the "off" isolation

750 Ω 5k Ω 500 Ω 3k Ω AT_EN 2.5k Ω 320 Ω 1.5k Ω VCC1 GND1 PKG BASE APC1 500 Ω 2.5k Ω VCC VCC2 RF OUT APC2 200 Ω 1.5k Ω VCC PKG BASE

Evaluation Board Schematic Dual-Band DCS/PCS Lumped Element C19 12 pF C20 1 nF 1 nF APC 10 nF VCC 1 nF 1 nF RF IN 50 Ω μstrip 50 Ω μstrip C10 5.1 pF C11 2.2 pF C12 2.4 pF C14 33 pF 50 Ω μstrip J2 RF OUT C17 33 pF C15 1 nF 47 pF VCC C18 1 pF 27 pF 100 mils 16 15 14 13 5 6 7 8 33 pF 1.2 nH 8.8 nH C16 3.3 uF C21 3.3 uF 10 Ω Ferrite C23 33 pF C22 1 nF VAT EN C24 1 nF C25 1 nF 1.2 nH VCC C3A 10 nF 1 nF P1-1 VAT EN P1-2 VCC P1-3 VCC GND GND CON5

Board Size 2.0” x 2.0” Board Thickness 0.032”, Board Material FR-4, Multi-Layer

Notes about testing the RF5111 The test setup shown above includes two attenuators. The 3dB pad at the input is to minimize the effects that the switch- ing of the input impedance of the PA has on the signal generator. When V APC is switched quickly, the resulting input impedance change can cause the signal generator to vary its output signal, either in output level or in frequency. Instead of an attenuator an isolator may also be used. The attenuat or at the output is to prevent damage to the spectrum ana- lyzer, and should be able to handle the power. It is important not to exceed the rated supply current and output power. When testing the device at higher than nominal supply voltage, the VAPC should be adjusted to avoid the output power exceeding +36dBm. During load-pull testing at the output it is important to monitor the forward power through a directional coupler. The forward power should not exceed +36dBm, and V APC needs to be adjusted accordingly. This simulates the behavior for the power control loop in this respect. To avoid damage, it is recommended to set the power supply to limiting the current during the burst, not to exceed the maximum current rating. Power Supply V- S- S+ V+ 10dB/5W3dB RF Generator Spectrum Analyzer Buffer x1 OpAmp Pulse Generator A buffer amplifier is recommended because the current into the VAPC changes with voltage. As an alternative, the voltage may be monitored with an oscilloscope.

3μinch to 8μinch gold over 180μinch nickel. assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. Figure 1. PCB Metal Land Pattern (Top View)

clearance can be provided in the master data or requested from the PCB fabrication supplier. that the quantity of vias be increased by a 4:1 ratio to achieve similar results. Figure 2. PCB Solder Mask Pattern (Top View)