RF5110_1 RFMD | Alldatasheet
Document overview
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Technical content
Features
Single 2.7V to 4.8V Supply Volt- age +36dBm Output Power at 3.5V 32 dB Gain with Analog Gain Con- trol 57% Efficiency 800MHz to 950MHz Operation Supports GSM and E-GSM
Applications
3V GSM Cellular Handsets 3V Dual-Band/Triple-Band Hand- sets GPRS Compatible Commercial and Consumer Sys- tems Portable Battery-Powered Equip- ment RF5110 3V GSM Power Amplifier RF5110 PCBA Fully Assembled Evaluation Board Rev A0 DS050318 Package Style: QFN, 16-Pin, 3 x 3
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Absolute Maximum Ratings Parameter Rating Unit Supply Voltage -0.5 to +6.0 V DC Power Control Voltage (VAPC1,2) -0.5 to +3.0 V DC Supply Current 2400 mA Input RF Power +13 dBm Duty Cycle at Max Power 50 % Output Load VSWR 10:1 Operating Case Temperature -40 to +85 °C Storage Temperature -55 to +150 °C Parameter Specification Unit ConditionMin. Typ. Max. Overall Temp=25°C, VCC=3.6V , VAPC1,2=2.8V , PIN=+4.5dBm, Freq=880MHz to 9 15MHz, 37.5% Duty Cycle, pulse width = 1731μs Operating Frequency Range 880 to 915 MHz See evaluation board schematic. Usable Frequency Range 800 to 950 MHz Using different evaluation board tune. Maximum Output Power 33.8 34.5 dBm Temp=25°C, V CC=3.6V , VAPC1,2=2.8V 33.1 dBm Temp=+60°C, V CC=3.3V, VAPC1,2=2.8V Total Efficiency 50 57 % At P OUT,MAX, VCC=3.6V 12 % P OUT=+20dBm 5% P OUT=+10dBm Input Power for Max Output +4.5 +7.0 +9.5 dBm Output Noise Power -72 dBm RBW=100kHz, 925MHz to 935MHz, POUT,MIN <POUT<POUT,MAX, PIN,MIN <PIN<PIN,MAX, VCC=3.3V to 5.0V -8 1 dBm RBW=100kHz, 935MHz to 960MHz, POUT,MIN <POUT<POUT,MAX, PIN,MIN <PIN<PIN,MAX, VCC=3.3V to 5.0V Forward Isolation -22 dBm V APC1,2=0.3V , PIN=+9.5dBm Second Harmonic -20 -7 dBm P IN=+9.5dBm Third Harmonic -25 -7 dBm P IN=+9.5dBm All Other Non-Harmonic Spurious -36 dBm Input Impedance 50 Ω Optimum Source Impedance 40+j10 Ω For best noise performance Input VSWR 2.5:1 P OUT,MAX-5dB<P OUT<POUT,MAX 4:1 P OUT<POUT,MAX-5dB Output Load VSWR Stability 8:1 Spurious<-36dBm, V APC1,2=0.3V to 2.6V , RBW=100kHz Ruggedness 10:1 No damage Output Load Impedance 2.6-j1.5 Ω Load Impedance presented at RF OUT pad Caution! ESD sensitive device. Exceeding any one or a combination of the Absolute Maximum Rating conditions may cause permanent damage to the device. Extended application of Absolute Maximum Rating conditions to the device may reduce device reliability. Specified typical perfor- mance or functional operation of the device under Absolute Maximum Rating condi- tions is not implied. RoHS status based on EUDirective2002/95/EC (at time of this document revision). The information in this publication is believed to be accurate and reliable. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents, or other rights of third parties, resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended appli- cation circuitry and specifications at any time without prior notice.
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Parameter Specification Unit ConditionMin. Typ. Max. Power Control VAPC1 VAPC2 Power Control “ON” 2.6 V Maximum P OUT, Voltage supplied to the input Power Control “OFF” 0.2 0.5 V Minimum P OUT, Voltage supplied to the input Power Control Range 75 dB V APC1,2=0.2V to 2.6V Gain Control Slope 5 100 150 dB/V P OUT=-10dBm to +35dBm APC Input Capacitance 10 pF DC to 2MHz APC Input Current 4.5 5 mA V APC1,2=2.8V 25 μAV APC1,2=0V Turn On/Off Time 100 ns V APC1,2=0 to 2.8V Power Supply Power Supply Voltage 3.5 V Specifications 2.7 4.8 V Nominal operating limits, P OUT<+35dBm
5.5 V With maximum output load VSWR 6:1,
POUT<+35dBm Power Supply Current 2 A DC Current at P OUT,MAX 15 200 335 mA Idle Current, P IN<-30dBm 11 0 μAP IN<-30dBm, V APC1,2=0.2V 11 0 μAP IN<-30dBm, V APC1,2=0.2V , T emp=+85°C
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Pin Function Description Interface Schematic 1V C C 1 Power supply for the pre-amplifier stage and interstage matching. This pin forms the shunt inductance needed for proper tuning of the interstage match. Refer to the application schematic for proper configuration. Note that position and value of the components are important. See pin 3. 2G N D 1 Ground connection for the pre-amplifier stage. Keep traces physically short and connect immediately to the ground plane for best performance. It is important for stability that this pin has it’s own vias to the groundplane, to minimize any common inductance. See pin 1. 3R F I N RF Input. This is a 50Ω input, but the actual impedance depends on the interstage matching network connected to pin 1. An external DC blocking capacitor is required if this port is connected to a DC path to ground or a DC voltage. 4G N D 2 Ground connection for the driver stage. To minimize the noise power at the output, it is recommended to connect this pin with a trace of about 40mil to the ground plane. This will slightly reduce the small signal gain, and lower the noise power. It is important for stability that this pin have it’s own vias to the ground plane, minimizing common inductance. See pin 3. 5V C C 2 Power supply for the driver stage and interstage matching. This pin forms the shunt inductance needed for proper tuning of the interstage match. Please refer to the application schematic for proper configuration, and note that position and value of the components are important. 6V C C 2 Same as pin 5. 7N C Not connected. 82 F 0 Connection for the second harmonic trap. This pin is internally connected to the RF OUT pins. The bonding wire together with an external capacitor form a series resonator that should be tuned to the second harmonic fre- quency in order to increase efficiency and reduce spurious outputs. Same as pin 9. 9R F O U T RF Output and power supply for the output stage. Bias voltage for the final stage is provided through this wide output pin. An external matching net- work is required to provide the optimum load impedance. 10 RF OUT Same as pin 9. Same as pin 9. 11 RF OUT Same as pin 9. Same as pin 9. 12 RF OUT Same as pin 9. 13 NC Not connected. 14 VCC Power supply for the bias circuits. 15 APC2 Power Control for the output stage. See pin 16 for more details. See pin 16. 16 APC1 Power Control for the driver stage and pre-amplifier. When this pin is "low," all circuits are shut off. A "low" is typically 0.5V or less at room tempera- ture. A shunt bypass capacitor is required. During normal operation this pin is the power control. Control range varies from about 1.0V for -10dBm to 2.6V for +35dBm RF output power. The maximum power that can be achieved depends on the actual output matching; see the application infor- mation for more details. The maximum current into this pin is 5mA when V APC1=2.6V , and 0mA when VAPC=0V . Pkg Base GND Ground connection for the output stage. This pad should be connected to the ground plane by vias directly under the device. A short path is required to obtain optimum performance, as well as to provide a good thermal path to the PCB for maximum heat dissipation. GND1 RF IN VCC1 From Bias Stages GND2 VCC2 From Bias Stages GND PCKG BASE RF OUT From Bias Stages GND VCC To RF Stages GND APC
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Package Drawing
1.50 TYP
2 PLCS
0.15 CB -B-
1.37 TYP
0.15 CB 0.15 CA -A- 3.00 SQ. 2.75 SQ.2 PLCS 0.15 CA 1.00 0.85 0.05 0.010.80 0.65 0.05 C 12° MAX -C- SEATING PLANE Shaded lead is pin 1. Dimensions in mm. CA B0.10 M 0.30 0.18 0.60 0.24 TYP 0.50 0.55 0.30 1.65 1.35SQ. 0.23 0.13
4 PLCS
0.45 0.00
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Theory of Operation and Application Information The RF5110 is a three-stage device with 32 dB gain at full power. Therefore, the drive required to fully saturate the output is +3dBm. Based upon HBT (Heterojunction Bipolar Transistor) techno logy, the part requires only a single positive 3V supply to operate to full specification. Power control is provided through a single pin interface, with a separate Power Down control pin . The final stage ground is achieved through the large pad in the middle of the backside of the package. First and second stage grounds are brought out through separate ground pins for is olation from the output. These grounds should be connected directly with vias to the PCB ground plane, and not connected with the output ground to form a so called “local ground plane” on the top layer of the PCB. The output is brought out through the wide output pad, and forms the RF output signal path. The amplifier operates in near Class C bias mode. The final stag e is “deep AB”, meaning the quiescent current is very low. As the RF drive is increased, the final stage self-biases, causing the bias point to shift up and, at full power, draws about 2000mA. The optimum load for the output stage is approximately 2.6 Ω. This is the load at the output collector, and is created by the series inductance formed by the output bond wires, vias, and microstrip, and 2 shunt capacitors external to the part. The opti- mum load impedance at the RF Output pad is 2.6-j1.5Ω. With this match, a 50Ω terminal impedance is achieved. The input is internally matched to 50Ω with just a blocking capacitor needed. This data sheet defines the configuration for GSM operation. The input is DC coupled; thus, a blocking cap must be inserted in series. Also, the first stage bias may be adjusted by a resis - tive divider with high value resistors on this pin to V PC and ground. For nominal operation, however, no external adjustment is necessary as internal resistors set the bias point optimally. VCC1 and VCC2 provide supply voltage to the first and second stage, as well as provides some frequency selectivity to tune to the operating band. Essentially, the bias is fed to this pin through a short microstrip. A bypass capacitor sets the inductance seen by the part, so placement of the bypass cap can affect th e frequency of the gain peak. This supply should be bypassed individually with 100pF capacitors before being combined with VCC for the output stage to prevent feedback and oscillations. The RF OUT pin provides the output power. Bias for the final stag e is fed to this output line, and the feed must be capable of supporting the approximately 2A of current required. Care should be taken to keep the losses low in the bias feed and output components. A narrow microstrip line is recommended because DC losses in a bias choke will degrade efficiency and power. While the part is safe under CW operation, maximum power and reliability will be achieved under pulsed conditions. The data shown in this data sheet is based on a 12.5% duty cycle and a 600μs pulse, unless specified otherwise. +90°C. As the voltage is increased, however, the output power will increase. Thus, in a system design, the ALC (Automatic Level Control) Loop will back down the power to the desired level. This must occur during operation, or the device may be dam- aged from too much power dissipation. At 5.0V, over +38dBm may be produced; however, this level of power is not recom- mended, and can cause damage to the device. The HBT breakdown voltage is >20V, so there are no issue with overvoltage. However, under worst-case conditions, with the RF drive at full power during transmit, and the output VSWR extrem ely high, a low load impedance at the collector of the output transistors can cause currents much higher than normal. Due to the bipolar nature of the devices, there is no limitation on the amount of current de device will sink, and the safe current densities could be exceeded. High current conditions are potentially dangerous to any RF device. High currents lead to high channel temperatures and may force early failures. The RF5110 includes temperature compensation circuits in the bias network to stabilize the RF transistors, thus limiting the current through the amplifier and protecting the devices from damage. The same mechanism works to com- pensate the currents due to ambient temperature variations. To avoid excessively high currents it is important to control the VAPC when operating at supply voltages higher than 4.0V, such that the maximum output power is not exceeded.
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Internal Schematic RF IN 1.0 kΩ VCC1 PKG BASE 4.5 pF GND2 APC1 400 Ω VCC VCC2 RF OUT APC2 300 Ω VCC PKG BASE 5 Ω 5 Ω APC1
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Evaluation Board Schematic GSM850 Lumped Element C17 10 nF 56 pF 180 Ω RF IN 50 Ω μstrip VAPC 15 pF C10 2 pF C11 9.1 pF C12 56 pF J2 RF OUT VCC C14 33 pF C13 1 nF 8.8 nH 50 Ω μstrip 16 15 14 13 5 6 7 8 C16 10 nF C15 33 pF VCC VAPC 50 Ω μstrip 1.5 pF 11 nH C19 27 pF 1 nF VCC1 33 pF C20 13 pF VCC2 1.6 nH 10 Ω Ferrite 10 nF 1.8 nH 10 nF 1 nF 65 mils 40 mils CON4 P1-1 VCC P1-2 VCC GND GND CON3 P2-1 VAPC GND GND C9 and C10 share the same pad. 60 mils C21 3.3 μF C18 3.3 μF
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Evaluation Board Schematic GSM900 Lumped Element C17 10 nF 56 pF 180 Ω RF IN 50 Ω μstrip VAPC VCC C14 47 pF 8.8 nH 16 15 14 13 5 6 7 8 C16 10 nF C15 47 pF VCC VAPC 50 Ω μstrip 1.5 pF 11 nH C19 27 pF 1 nF VCC1 C23 27 pF C20 15 pF VCC2 1.6 nH 10 Ω Ferrite 10 nF C21 3.3 μF C18 3.3 μF 27 pF CON4 P1-1 VCC P1-2 VCC GND GND CON3 P2-1 VAPC GND GND 15 pF C10 11 pF C11* 5.6 pF C12 56 pF J2 RF OUT 50 Ω μstrip 3.6 nH 39 mils *C11 is adjacent to L4.C9 and C10 share the same pad. C23 and C27 share the same pad. 10 nF 1 nF C13 1 nF 55 mils
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Evaluation Board Layout Board Size 2.0” x 2.0” Board Thickness 0.032”; Board Material FR-4; Multi-Layer
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Typical Test Setup Notes about testing the RF5110 The test setup shown above includes two attenuators. The 3dB pad at the input is to minimize the effect on the signal genera- tor as a result of switching the input impedance of the PA. When V APC is switched quickly, the resulting input impedance change can cause the signal generator to vary its output signal, either in output level or in frequency. Instead of an attenuator an isolator may also be used. The attenuator at the output is to prevent damage to the spectrum analyzer, and should be sized accordingly to handle the power. It is important not to exceed the rated supply current and output power. When testing the device at higher than nominal supply voltage, the VAPC should be adjusted to avoid the output power exceeding +36dBm. During load-pull testing at the output it is important to monitor the forward power through a directional coupler. The forward power should not exceed +36dBm, and VAPC needs to be adjusted accordingly. This simulates the behavi or for the power control loop. To avoid damage, it is recom- mended to set the power supply to limit the current during the burst not to exceed the maximum current rating. Power Supply 10dB/5W3dB RF Generator Spectrum Analyzer Buffer x1 OpAmp Pulse Generator A buffer amplifier is recommended because the current into the VAPC changes with voltage. As an alternative, the voltage may be monitored with an oscilloscope. V+V- S- S+
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. to 8μinch gold over 180μinch nickel. Figure 1. PCB Metal Land Pattern (Top View)
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. provided in the master data or requested from the PCB fabrication supplier. The PCB land pattern has been designed with a thermal pad that matches the die paddle size on the bottom of the device. quantity of vias be increased by a 4:1 ratio to achieve similar results. Figure 2. PCB Solder Mask Pattern (Top View)
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.