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REF) Peiiminay —_—_— RF 2123 | MICRO-DEVICES HIGH POWER AMPLIFIER Typical Applications LE * 915MHz ISM Band Applications * Commercial and Consumer Systems L + Driver stage for GSM Base Stations * Portable Battery Powered Equipment Ss + Base Station Equipment L a a Product Description = a oo . 158 009 u The RF2123 is a high power, high efficiency amplifier IC. 150 [ 004 T 020 fo) The device is manufactured on an advanced Gallium Ars- To 962 JF 014 a enide Heterojunction Bipolar Transistor (HBT) process, —° t and has been designed for use as a driver stage for GSM a | 4 base stations, for the 915MHz ISM band, as the final PA gaa 750 for Micro and Pico base stations, and in other applica- ian i tions in the 800MHz to 950MHz band. On-board power [ [ [ | control provides over 45dB of control range with an ana- too log voltage input, and provides power down with a logic [_ | L "low" for standby operation. The device is self-contained an — eee with 50Q input and the output can be easily matched to B°MAX obtain optimum power and efficiency characteristics. PMN —— oo | Js ow | 016 008 Optimum Technology Matching® Applied Package Style: SOP-16 QBW1 O siat [{/GaAsHBT [[] GaAs MESFET O siBi-cmos Features E « Single Supply Voltage L veci[i} [16]BIAS GND + +33dBm Output Power a eno} leno + 30dB Gain with Analog Gain Control E eno eno * 880MHz to 915MHz Operation L + Supports GSM , E-GSM, 915MHz ISM |- GND1 TA re RF OUT a GND] 6 11]GND enol 7 1olGno Ordering Information RF2123 High Power Amplifier eta} —I _a PC RF2123PCBA Fully Assembled Evaluation Board Functional Block Diagram RF Micro Devices, Inc. Tel (336) 664 1233

7625 Thorndike Road Fax (336) 664 0454

Greensboro, NC 27409, USA hitp:/www.timd.com Rev A1 971105 2-53

_RF2123 | ——SOOSOSCH Absolute Maximum Ratings [Parameter | ___-Rating | Unit | ‘Supply Voltage 0.5 1047.5 Voc Power Control Voltage (Vpc) -0.5 to 45 Vv PXoouiion: ESD sensitive device. DC Supply Current 1100 mA Input RF Power +2 dBm AF Micro Devices believes the furnished information fs corect and accurate Output Load VSWR 10:1 take cranges tote procucts wihout notes, A Mero Devicas does fot Ambient Operating Temperature -30 to +90 °c ‘assume responsbilty for the use of the described product(s) g Storage Temperature -40 to +150 Kel z a E < Parameter 8 Overall 125 °C, Vec=5.8V, Vpo=4.0V, n=+6dBm, Freq=890MHz to 915MHz, Operating Frequency Range 880 to 915, MHz Usable Frequency Range 800 to 950 MHz Maximum Output Power +33 dBm 432 dBm | T=+90 °C, \\oc=5.3V, Vpg=4.0V Total Efficiency TBD % At maximum output power Input Power for Max Output +6 +8 dBm Output Noise Power in Receive TBD dBm/Hz | Any gain setting Band Isolation -35 3B In “OFF” state, Pjy=+6dBm Second Harmonic -40 -35 dBc Third Harmonic -45 -35 dBc Input Impedance 50 2 Input VSWR <2.5:1 Output Load VSWR 10:1 Spurious<-60dBc Power Control Power Control "ON" 40 v Voltage supplied to the input Power Control “OFF” v Voltage supplied to the input Power Control Range 3B Turn On/Off Time 400 ns Power Supply Power Supply Voltage v Specifications 43 75 v Operating limits Power Supply Current A DC Current at maximum output power 10 HA Vpc=0.5V 2-54 Rev A1 971105

—UC_COC«siC¥zsiCis_is_CCNCFRF2123 | | Pin | Function |Description Interface Schematic vcci Power supply for the driver stage and interstage matching. This pin vect forms the shunt inductance needed for proper tuning of the interstage match. Please refer to the application schematic for proper configura- ae F tion, and note that position and value of the components are important. Ground connection for final power stage. Keep traces physically short and connect immediately to the ground plane for best performance. This pin is also connected internally to pins 6, 7, 10, 11, 14, and 15 for ry a very low inductance and low thermal resistance path to ground. a 3] en[seneaspn2 OS Ground connection for the driver stage. Keep traces physically short __| See pin 1 schematic. a and connect immediately to the ground plane for best performance. Itis 2 recommended to use separate vias to the ground plane for this return = path to maintain stability. 2 RF Input. This is a 50 input, but the actual impedance depends on __| See pin 1 schematic. i the interstage matching network connected to pin 3. An external DC a blocking capacitor is required if this port is connected to a DC path to ground or a DC voltage. OS f-7[ enn [Sane asping | 38 | vCec2 Power supply for the bias circuits. See pin 9 schematic. PC Power Control. When this pin is "low," all circuits are shut off. A "low" is vece typically 0.5V or less at room temperature, A shunt bypass capacitor is required. During normal operation this pin is the power control. Control ec range varies from about 2V for OdBm to 3.6V for +35dBm RF output To RF power, The maximum power that can be achieved depends on the Stages actual output matching; see the application information for more details. BIASGND SS lt] GND —[Saneaspna— RF OUT _| AF Output and power supply for the output stage. Bias voltage for the wor final stage is provided through this wide output pin. An external match- ing network is required to provide the optimum load impedance. 4 OS b45-[ —@np—|Saneaspn2 | 16 | BIAS GND | Bias return for the reference diode. See pin 9 schematic. Rev A1 971105 2-55

Theory of Operation and Application Information The RF2123 is a two-stage device with 30 dB gain at losses in a bias choke will degrade efficiency and full power. Therefore, the drive required to fully satu- power. rate the output is +6dBm. Based upon HBT (Hetero- junction Bipolar Transistor) technology, the part The part will operate over a 4.3V to 7.5V range. Under requires only a single positive 6V supply to operate to nominal conditions, the power at 5.3V will be greater rr) full specification. Bias control is provided through a sin- than +32dBm at +90°C. As the voltage is increased, @ | gle pin interface, and the final stage ground is however, the output power will increase. Thus, in a i | achieved through the four large pins on both sides of system design, the ALC (Automatic Level Control) = the package. First stage ground is brought out through Loop will back down the power to the desired level. 2 a separate ground pin for isolation from the output. This must occur during operation, or the device may be Ff These grounds should be connected directly with vias damaged from too much power dissipation. At 7.5V, % | to the PCB ground plane. The output is brought out over +35.5dBm may be produced; however, this level a through the wide output pin, and forms the RF output of power is not recommended for this package. signal path. . ; The HBT breakdown voltage is >20V, so nominally at The amplifier operates in near Class C bias mode. The 6V there should be no issue with overvoltage. Under final stage is "deep AB", meaning the quiescent current extreme conditions, however, which can occur in a cel- is very low. As the RF drive is increased, the final stage lular handset environment, the supply voltage could be self-biases, causing the bias point to shift up and, at much higher. These conditions may correspond to full power, draws about 900mA. The optimum load for operation in a battery charger, especially with the bat- the output stage is approximately 5Q. This is the load tery removed, which "unloads" the supply circuit. To at the output collector, and is created by the series add to this worst-case scenario, the RF drive may be at inductance formed by the output bond wires, leads, full power during transmit, and the output VSWR could and microstrip, and 2 shunt capacitors external to the be extremely high, corresponding to a broken or part. With this match, a 50Q terminal impedance is removed antenna. Under all of the above conditions, achieved. The input is internally matched to 50 with the peak RF voltages could well exceed two times the just a blocking capacitor needed. This data sheet supply voltage, forcing the device into breakdown. The defines the configuration for GSM operation. RF2123 includes overvoltage protection diodes at the output, which begin clipping the waveform peaks at The input is DC coupled; thus, a blocking cap must be approximately 15V. This protects the device's output inserted in series. Also, the first stage bias may be from breaking down under these worst-case condi- adjusted by a resistive divider with high value resistors tions, and provides a rugged, robust component for the on this pin to Vpc and ground. For nominal operation, system designer. For optimum reliability, it is recom- however, no external adjustment is necessary as inter- mended that the supply voltage to the part under oper- nal resistors set the bias point optimally. ation be limited to 7.5V. VCC1 provides supply voltage to the first stage, as well High current conditions are also potentially dangerous as provides some frequency selectivity to tune to the to any RF device. High currents lead to high channel operating band. Essentially, the bias is fed to this pin temperatures and may force early failures. The through a short microstrip. A bypass capacitor sets the RF2123 includes temperature compensation circuits in inductance seen by the part, so placement of the the bias network to stabilize the RF transistors, thus bypass cap can affect the frequency of the gain peak. limiting the current through the amplifier and protecting This supply should be bypassed individually with the devices from damage. The same mechanism 100pF capacitors before being combined with Veg for works to compensate the currents due to ambient tem- the output stage to prevent feedback and oscillations. perature variations. The RF OUT pin provides the output power. Bias for the final stage is fed to this output line, and the feed must be capable of supporting the approximately 1A of current required. Care should be taken to keep the losses low in the bias feed and output components. A narrow microstrip line is recommended because DC 2-56 Rev A1 971105