PTMA180402EL INFINEON | Alldatasheet

Document overview

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  • PDF pages: 11

Technical content

Features

  • Designed for wide RF and modulation bandwidths and low memory effects
  • On-chip matching, integrated input DC block, 50-ohm input and > 5-ohm output
  • Typical single-carrier CDMA performance at

1960 MHz, 28 V

  • Average output power = 4 W - Linear gain = 30 dB - Efficiency = 14% - Adjacent channel power = –53 dBc
  • Typical 2-tone performance, 1960 MHz, 28 V - Output power (PEP) = 50 W at IM3 = –30 dBc - Efficiency = 33%
  • Capable of handling 10:1 VSWR @ 28 V, 40 W (CW) output power
  • Integrated ESD protection. Meets HBM Class 1B (minimum), per JESD22-A114F
  • High-performance, thermally-enhanced packages, Pb-free and RoHS compliant, with solder-friendly plating *See Infineon distributor for future availability.

Data Sheet 2 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution RF Characteristics CDMA Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ1 = 110 mA, IDQ2 = 335 mA, POUT = 4 W average, ƒ = 1960 MHz Characteristic Symbol Min Typ Max Unit Gain Gps 28.5 30 — dB Drain Efficiency η D 13 14 — % Adjacent Channel Power Ratio ACPR — –53 –50 dBc DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, VGS = 0 V IDSS — — 1.0 µA VDS = 63 V, VGS = 0 V IDSS — — 10.0 µA Final Stage On-state Resistance VGS = 10 V, VDS = 0.1 V RDS(on) — 0.21 — Ω Operating Gate Voltage VDS = 28 V, IDQ1 = 160 mA, IDQ2 = 330 mA VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, VDS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 175 W Above 25°C derate by 1.0 W/°C Storage Temperature Range TSTG –40 to +150 °C Overall Thermal Resistance (TCASE = 70°C) 1st Stage Rθ JC 5.0 °C/W POUT = 40 W, IDQ1 = 160 mA, IDQ2 = 330 mA 2nd Stage Rθ JC 1.1 °C/W

Ordering Information

Type and Version Package Type Package Description Shipping Marking PTMA180402EL V1 H-33265-8 Themally-enhanced, slotted flange Tray PTMA180402EL PTMA180402FL V1 H-34265-8 Themally-enhanced, earless flange Tray PTMA180402FL

Data Sheet 3 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution *See Infineon distributor for future availability. Typical Performance (data taken in a production test fixture) Two-tone at Selected Frequencies VDD = 28 V, IDQ1 = 130 mA, IDQ2 = 330 mA 30 35 40 45 Output Power, avg. (dBm) PAE (%) -60 -55 -50 -45 -40 -35 -30 -25 -20 IMD3 (dBc) Efficiency IMD3 ƒ = 1930 MHz ƒ = 1960 MHz ƒ = 1990 MHz CW Performance VDD = 28 V, IDQ1 = 110 mA, IDQ2 = 330 mA 30 35 40 45 50 Output Power (dBm) Gain (dB) Gain Efficiency ƒ = 1930 MHz ƒ = 1960 MHz ƒ = 1990 MHz Power Added Efficiency (%) IS-95 at Selected Frequencies VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 330 mA -65 -60 -55 -50 -45 -40 -35 0 2 4 6 8 10 Output Power (W) ACPR (dBc) ACPR Efficiency Power Added Efficiency (%) ƒ = 1930 MHz ƒ = 1960 MHz ƒ = 1990 MHz IS-95 at Selected Temperatures VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 330 mA, ƒ = 1960 MHz 0 2 4 6 8 10 Output Power, avg. (W) Gain (dB), Power Added Efficiency (%) -65 -60 -55 -50 -45 -40 Gain PAE +25ºC –25ºC +90ºC ACPR Adj. Ch. Power Ratio (dBc)

Data Sheet 4 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution WCDMA Performance VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 330 mA, Test Mode 1 w/64 DPCH, PAR = 7.5 dB -55 -50 -45 -40 -35 -30 1 3 5 7 9 11 Output Power (W) ACPR (dBc) ACPR Efficiency Power Added Efficiency (%) ƒ = 1930 MHz ƒ = 1960 MHz ƒ = 1990 MHz EDGE EVM Performance VDD = 28 V, IDQ1 = 160 mA, IDQ2 = 330 mA, ƒ = 1960 MHz 30 32 34 36 38 40 42 44 Output Power (dBm) Drain Efficiency (%) EVM RMS (average %) . EVM Efficiency Typical Performance (cont.) Gate – Source Voltage vs. Temperature VDD = 28 V, IDQ1 = 110 mA, IDQ2 = 335 mA 0.85 0.90 0.95 1.00 1.05 1.10 1.15 -30 -10 10 30 50 70 90 Temperature (°C) Normalized Gate – Source Voltage (threshold), V Slope = –1.3 mV/°C EDGE Modulation Spectrum Performance VDD = 28 V, IDQ! = 160 mA, IDQ2 = 330 mA, ƒ = 1960 MHz -85 -75 -65 -55 -45 -35 30 32 34 36 38 40 42 44 Output Power (dBm) ACPR (dB) . Efficiency (%) 600 kHz 400 kHz Efficiency

Data Sheet 5 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution Typical Performance (cont.) Six-carrier TD-SCDMA Drive-up VDD = 28 V, IDQ1 = 230 mA, IDQ2 = 335 mA, ƒ = 2017.5 MHz -55 -50 -45 -40 -35 -30 31 32 33 34 35 36 37 38 39 Output Power (dBm) ACPR (dBc) Efficiency (%) Adj Lower Adj Upper Alt Lower Alt Upper Effciency Broadband Circuit Impedance Frequency Z Load W MHz R jX 1700 8.89 –3.62 1800 7.27 –2.99 1900 6.26 –2.13 2000 5.59 –1.19 2100 5.14 –0.27 2200 4.89 0.67 0.1 0.3 0.5 0.2 0.4 0.1 AVELENGTHS T W AVELENGTHS TOW ARD LOAD - 0.0

1700 MHz

2200 MHz

Z0 = 50 Ω Z LoadD S IN

Data Sheet 6 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution VD2 l1 PTMA18040J1 J2 VD1 10µF 100µF 50V 0.1µF 12pF C19 12pF C22 10µF C20 0.1µF C23 100µF 50V C31 12pF C24 12pF C25 0.1µF C27 10µF C28 100µF 50V DUT 4 8 C30 2.7pF l2 l4 l5 l6 l7 VG1 10µF 0.1µF 12pF C11 1µF C12 0.1µF C13 12pF G2V 1µF 1µF C10 10µF C21 1µF C26 1µF C14 12pF C15 0.1µF C16 1µF C17 10µF C18 100µF 50V C29 2.2pF Reference Circuit Reference circuit schematic for ƒ = 1930 – 1990 MHz Circuit Assembly Information DUT PTMA180402EL or PTMA180402FL LDMOS IC PCB 0.76 mm [.030"] thick, εr = 3.48 Rogers RO4350 1 oz. copper Microstrip Electrical Characteristics at 1960 MHz Dimensions: L x W (mm) Dimensions: L x W (in.)

Data Sheet 7 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution Reference Circuit (cont.) Reference circuit asembly diagram* (not to scale) * Component Description Suggested P/N or Comment Manufacturer C1, C18, C23, C28 Electrolytic capacitor, 100 µF, 50 V Digi-Key PCE3718CT-ND C2, C6, C10, C17, C22, C27 Ceramic capacitor, 10 µF Murata GRM422Y5V106Z050AL C3, C7, C11, C16, C21, C26 Ceramic capacitor, 1 µF Digi-Key 445-1411-2-ND C4, C8, C12, C15, C20, C25 Capacitor, 0.1 µF Digi-Key 399-1267-2-ND C5, C9, C13, C14, C19, C24, Ceramic capacitor, 12 pF ATC 600S120JT C31 C29 Ceramic capacitor, 2.2 pF ATC 600S2R2CT C30 Ceramic capacitor, 2.7 pF ATC 600S2R7BT *Gerber files for this circuit available on request

Data Sheet 8 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution Package Specifications Package H-33265-8 Outline Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Pins: S = source; see page 11 for complete list and diagram. 4. Gold plating less than 0.25 micron [10 microinch]. 5. All tolerances ± 0.127 [.005] unless specified otherwise. 6. Primary dimensions are mm. Alternate dimensions are inches. 15.24±0.51 [.600±.020] 2.54±0.51 [.100±.020] (45° X 2.03 [.08]) CL 1.02 [.040] 0.038 [.0015] -A- 20.32 [.800] 10.16 [.400] SPH 1.57 [.062] 3.68±.38 [.145±.015] 10.16 [.400] WINDOW FRAME & LID 7.11 [.280] 4X R 0.63 [.025] MAX WINDOW FRAME 4X R 0.13 [.05] MAX LID 9.55 [.376] REF 2X 2.21 [.087] 0.76 [.030] 6X 0.406 [.016] 2X 3.48 [.137] 2X 4.57 [.180] 9.78 [.385] FLANGE 2X R1.59 [R.063] S h-33+34265_POs_33265-8_0801 1 2 3 54 6 7 15.24 [.600] LC CL 4X R1.52 [R.060]

Data Sheet 9 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution Package Specifications (cont.) Package H-34265-8 Outline Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Pins: S = source; see page 11 for complete list and diagram. 4. Gold plating less than 0.25 micron [10 microinch]. 5. All tolerances ± 0.127 [.005] unless specified otherwise. 6. Primary dimensions are mm. Alternate dimensions are inches. 15.24±0.51 [.600±.020] 2.54±0.51 [.100±.020] (45° X 2.03 [.08]) 1.02 [.040] 0.038 [.0015] -A- 10.16 [.400] 10.16 [.400] SPH 1.57 [.062] 3.68±.38 [.145±.015] 7.11 [.280] 4X R 0.63 [.025] MAX FLANGE 4X R 0.13 [.05] MAX LID 9.55 [.376] REF 2X 2.21 [.087] 0.76 [.030] 6X 0.406 [.016] 2X 3.48 [.137] 2X 4.57 [.180] S h-33+34265_POs_34265-8_0801 1 2 3 54 6 7 LC CL10.16 [.400] SQ FLANGE & LID CL

Data Sheet 10 of 11 Rev. 08, 2009-08-31 PTMA180402EL PTMA180402FL Confidential, Limited Internal Distribution Package Specifications (cont.) Package H-3X265-8 Pin Diagram Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Pin # Function S (flange, see Package Outlines) Source

1 Drain 1

2 FET_D

3 FET_G

4 RF In

5 Gate 1

6 Gate 2

8 RFOut/D2

a180402efl PD pinout 2007 12 12

Data Sheet 11 of 11 Rev. 08, 2009-08-31 PTMA180402EL/FL Confidential, Limited Internal Distribution Revision History: 2009-08-31 Data Sheet Previous Version: 2009-04-01, Data Sheet Page Subjects (major changes since last revision)

1 Revised VSWR rating

GOLDMOS® is a registered trademark of Infineon Technologies AG. Edition 2009-08-31 Published by Infineon Technologies AG

81726 Munich, Germany

© 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( www.infineon.com/rfpower ). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: highpowerRF@infineon.com To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International