PE94302 PEREGRINE | Alldatasheet

Document overview

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Technical content

Features

  • Attenuation: 0.5 dB steps to 31.5 dB
  • Flexible parallel and serial programming interfaces
  • Unique power-up state selection
  • Positive CMOS control logic
  • High attenuation accuracy and linearity over temperature and frequency
  • Very low power consumption
  • Single-supply operation
  • 50 Ω impedance Control Logic Interface Parallel Control Power-Up Control Serial Control RF Input RF Output Switched Attenuator Array

Table 1. Electrical Specifications @ +25°C, VDD = 3.0 V

  1. Maximum Operating Power = +12 dBm
  2. Specs are guaranteed to 2.2 GHz, Characterized to 4.0 GHz

©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70/0186-01 │ UltraCMOS™ RFIC Solutions Table 2. Pin Descriptions Table 3. Absolute Maximum Ratings exceeding the rate specified in Table 3. Table 4. DC Electrical Specifications Figure 3. Pin Configuration (Top View) devices are immune to latch-up.

Description

Attenuation control bit, 16dB Ground connection RF port (Note 1). Ground connection Serial interface data input Ground connection Serial interface clock input. Latch Enable input (Note 2). Power supply pin. Ground connection Power-up selection bit, MSB. Ground connection Power-up selection bit, LSB. Negative supply voltage Power reset Ground connection Parallel/Serial mode select. Ground connection RF port (Note 1). Ground connection Attenuation control bit, 8 dB. Attenuation control bit, 4 dB. Attenuation control bit, 2 dB. Ground connection Ground connection Ground connection Attenuation control bit, 1 dB. Attenuation control bit, 0.5 dB. Ground connection PE94302 C16 GND RF1 GND GND GND GND GND GND GND GND GND GND Data CLK LE VDD PUP1 PUP2 VSS POR P/S RF2 C0.5 Note 1: Both RF ports must be held at 0 VDC or DC blocked with an external series capacitor. 2: Latch Enable (LE) has an internal 100 kΩ resistor to VDD. Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability.

©2005 Peregrine Semiconductor Corp. All rights reserved.

250 M Hz

500 M Hz

1000 M Hz

1500 M Hz

2000 M Hz

Figure 5. Attenuation Error Vs. Attenuation Figure 4. Insertion Loss Vs. Frequency

©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70/0186-01 │ UltraCMOS™ RFIC Solutions Table 10. Ordering Information PE94302-28CQFP-50B Engineering Samples 28-lead CQFP

50 Count Trays

PE94302-28CQFP-50B Production Units 28-lead CQFP Figure 6. Package Drawing DIELECTIC RUN INTO CASTELLATIONS SHALL BE ACCEPTABLE. GOLD SPECKLES ON DIELECTRIC COAT SHALL BE ACCEPTABLE. VISUAL ANOMALIES IN CASTELLATION METALLIZATION ACCEPTABLE. TEXT AND ITS LOCATIONS ON LEAD FRAME ARE VENDOR’S OPTION. SLIGHT PATTERN MISMATCH WITH DRAWING DUE TO DIELECTRIC COAT MISALIGNMENT SHALL BE ACCEPTABLE. SEAL RING & HEAT SINK ARE CONNECTED TO GND. LEAD INTEGRITY (ADHESION/ ALIGNMENT/ COPRANARITY), CASTELLATION QUALITY ARE BEST EFFORT BASIS.

Document No. 70/0186-01 │www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Sales Offices The Americas Peregrine Semiconductor Corp.

9450 Carroll Park Drive

San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor Europe Commercial Products: Bâtiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Space and Defense Products:

180 Rue Jean de Guiramand

13852 Aix-En-Provence cedex 3, France

Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. South Asia Pacific Peregrine Semiconductor 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652