PE43204 PEREGRINE | Alldatasheet
Document overview
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Technical content
Features
- HaRP™-enhanced UltraCMOS™ device
- Fast switching speed: Typical 26 ns
- High Linearity: Typical +61 dBm IP3
- Small α-Error
- Best in class 2000 V HBM ESD tolerance
- Attenuation: 6, 12, and 18 dB States
- Parallel Control
- CMOS Compatible
- Packaged in a 12-lead 3x3x0.85 mm QFN
Figure 1. Package Type
Table 1. Electrical Specifications @ +25°C, VDD = 3.3 V
50 MHz to < 2000 MHz
2000 MHz – 3000 MHz
Figure 4. Attenuation Error vs. Frequency Figure 3. Attenuation vs. Attenuation Setting Figure 5. Insertion Loss vs. Temperature Figure 6. Input Return Loss vs Attenuation
Table 2. Pin Descriptions must be grounded for proper device operation. Figure 13. Pin Configuration (Top View)
1 GND Ground
2 RF1 2 RF1 port
3 NC 1 No Connect
4 NC 1 No Connect
5 NC 1 No Connect
6 NC 1 No Connect
7 NC 1 No Connect
8 RF2 2 RF2 port
9 GND Ground
10 C2 Attenuation control bit, 12 dB
11 C1 Attenuation control bit, 6 dB
devices are immune to latch-up. Table 4. Operating Ranges Table 5. Absolute Maximum Ratings maximum for extended periods may reduce reliability. Table 3. Attenuation Word Truth Table
- All RF pins must be DC blocked with an external series
the 12-lead 3x3 QFN package is MSL1. The PE43204 has a maximum 25 kHz switching rate. DSA can be toggled across attenuation states.
Figure 16. Package Drawing
©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0257-03 │ UltraCMOS™ RFIC Solutions Sales Offices The Americas Peregrine Semiconductor Corporation
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