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Technical content

Features

 Single-pin or complementary CMOS logic control inputs  Low insertion loss: 0.35 dB at 1000 MHz, 0.5 dB at 2000 MHz  Isolation of 30 dB at 1000 MHz, 20 dB at 2000 MHz  Typical input 1 dB compression point of +33.5 dBm  1.8V minimum power supply voltage  SC-70 package Figure 2. Package

  1. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50Ω test set-up, measured with
  2. A tuning capacitor must be added to the application board to optimize the insertion loss and return loss performance. See Figure 6 for details

Table 1. Electrical Specifications @ +25°C, VDD = 3V (ZS = ZL = 50Ω )

2000 MHz

Table 2. Pin Descriptions devices are immune to latch-up. Figure 3. Pin Configuration (Top View)

1 RF1 4 RF Port1

2 GND

3 RF2 4 RF Port2

4 CTRL Switch control input, CMOS logic level.

5 RFC

4 RF Common

6 CTRL or VDD

supply connection is required. pin is not required in this mode. Table 4. Absolute Maximum Ratings Table 3. Operating Ranges Figure 4. Maximum Input Power The PE42421 has a maximum 25 kHz switching rate.

Table 5. Single-pin Control Logic Truth Table Table 6. Complementary-pin Control Logic

Figure 15. Package Drawing

0.50 MIN

0.40 MIN

0.10 A B

Figure 16. Top Marking Specification

Table 7. Ordering Information Figure 17. Tape and Reel Specifications specifications for product development. Specifications and features may change in any manner without notice. of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. are trademarks of Peregrine Semiconductor Corp. For sales and contact information please visit www.psemi.com.