MTN3418S3 CYSTEKEC | Alldatasheet

Document overview

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  • PDF pages: 7

Technical content

Features

  • Low on-resistance
  • High ESD
  • High speed switching
  • Low-voltage drive(4V)
  • Easily designed drive circuits
  • Easy to use in parallel
  • Pb-free package Symbol Outline

Ordering Information

(Pb-free lead plating and halogen-free package) 3000 pcs / Tape & Reel MTN3418S3 SOT-323 D G S G:Gate S:Source D:Drain G S D BVDSS 30V ID 1.9A RDSON(max) 110mΩ

CYStech Electronics Corp. Spec. No. : C726S3 Issued Date : 2011.12.20 Revised Date : 2013.09.09 Page No. : 2/7 MTN3418S3 CYStek Product Specification Absolute Maximum Ratings (Ta=25°C) Parameter Symbol Limits Unit Drain-Source V oltage VDSS 30 V Gate-Source V oltage VGSS ±20 V Continuous ID 1.9 A Drain Current Pulsed IDP 7.6 *1 A Total Power Dissipation (Ta=25°C) 200 Total Power Dissipation (Tc=25°C) PD 400 mW ESD susceptibility 750 *2 V Channel Temperature TCH +150 °C Storage Temperature Tstg -55~+150 °C Note : *1. Pulse Width ≤ 300μs, Duty cycle ≤2% *2. Human body model, 1.5kΩ in series with 100pF Electrical Characteristics (Ta=25°C) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS* 30 - - V VGS=0, ID=10μA VGS(th) 1 - 2.5 V VDS=VGS, ID=250μA IGSS - - ±5 μA VGS=±20V , VDS=0 IDSS - - 500 nA VDS=30V , VGS=0 - 133 150 ID=950mA, VGS=4V RDS(ON)* - 90 110 mΩ ID=1.9A, VGS=10V GFS 400 - - mS VDS=10V, ID=500mA Dynamic Ciss - 215 - Coss - 54 - Crss - 34 - pF VDS=10V , VGS=0, f=1MHz Source-Drain Diode *VSD - - 1 V VGS=0V , ISD=1A *Pulse Test : Pulse Width ≤380μs, Duty Cycle≤2%

CYStech Electronics Corp. Spec. No. : C726S3 Issued Date : 2011.12.20 Revised Date : 2013.09.09 Page No. : 3/7 MTN3418S3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 Drain-Source Voltage -VDS(V) Drain Current - ID(A) VGS=2.5V 10V Static Drain-Source On-resistance vs Ambient Temperature 100 150 200 250 300 0 50 100 150 200 Ambient Temperature-Ta(°C) Static Drain-Source On-state Resistance-RDS(on)(mΩ) ID=0.7A, VGS=10V ID=0.4A, VGS=4V Static Drain-Source On-State resistance vs Drain Current 100 1000 1 10 100 1000 10000 Drain Current-ID(mA) Static Drain-Source On-State Resistance-RDS(on)(mΩ) VGS=4V VGS=10 Drain Current vs Gate-Source Voltage 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 00 . 511 . 522 . 533 . 54 Gate-Source Voltage-VGS(V) Drain Current-ID(on)(A) Ta=75°C Ta=25°C Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 150 200 250 300 350 400 450 500 02468 1 0 1 2 Gate-Source Voltage-VGS(V) Static Drain-Source On-State Resistance-RDS(ON)(mΩ) ID=1.9A 0.4A 0.7A Ta=25°C Forward Drain Current vs Source-Drain Voltage 100 1000 10000 Source Drain Voltage -VSD(V) Forward Current-IF(mA) VGS=0V

CYStech Electronics Corp. Spec. No. : C726S3 Issued Date : 2011.12.20 Revised Date : 2013.09.09 Page No. : 4/7 MTN3418S3 CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Reverse Voltage 100 1000 0 5 10 15 20 25 30 Drain-to-Source Voltage-VDS(V) Capacitance-(pF) Ciss Coss Crss f=1MHz Forward Transfer Admittance vs Drain Current 0.1 1 10 100 1000 10000 Drain Current---ID(mA) Forward Transfer Admittance---GFS(S) VGS=0V 75°C 25°C Maximum Safe Operating Area 0.01 0.1 0.1 1 10 100 Drain-Source Voltage -VDS(V) Drain Current --- ID(A) Operation in this area is limited by RDS(ON) Ta=25°C, Single pulse, mounted on a ceramic board(900mm²×0.8mm) DC 100ms 10ms 1ms 100μs Power Derating Curve 100 150 200 250 0 50 100 150 200 Ambient Temperature---TA(℃) Power Dissipation---PD(mW) Gate Threshold Voltage vs Ambient Temperature 0.8 1.2 1.4 1.6 1.8 2.2 2.4 -50 0 50 100 150 200 Junction Temperature-Tj(°C) Gate SourceThreshold Voltage-VGS(th)(V) ID=250μA ID=1mA

CYStech Electronics Corp. Spec. No. : C726S3 Issued Date : 2011.12.20 Revised Date : 2013.09.09 Page No. : 5/7 MTN3418S3 CYStek Product Specification Reel Dimension Carrier Tape Dimension

CYStech Electronics Corp. Spec. No. : C726S3 Issued Date : 2011.12.20 Revised Date : 2013.09.09 Page No. : 6/7 MTN3418S3 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3°C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) 183°C 60-150 seconds 217°C 60-150 seconds − Time (tL) Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6°C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C726S3 Issued Date : 2011.12.20 Revised Date : 2013.09.09 Page No. : 7/7 MTN3418S3 CYStek Product Specification SOT-323 Dimension Style: Pin 1.Gate 2.Source 3.Drain 3-Lead SOT-323 Plastic Surface Mounted Package CYStek Package Code: S3 Marking: Date Code Device Code TEKT XX D 2.000 2.200 0.079 0.087 θ 0° 8° 0° 8° E 1.150 1.350 0.045 0.053 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material:

  • Lead: Pure tin plated.
  • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.