MTN3400AN3 CYSTEKEC | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 9
Technical content
Features
- Low on-resistance
- Low gate charge
- Excellent thermal and electrical capabilities
- Compact and low profile SOT-23 package
- Pb-free lead plating and halogen-free package Equivalent Circuit Outline
Ordering Information
(Pb-free lead plating and halogen-free package) 3000 pcs / tape & reel MTN3400AN3 SOT-23 G：Gate S：Source D：Drain BVDSS 30V ID@VGS=10V , TA=25°C 3.7A RDSON(TYP) VGS=10V , ID=2.4A 38mΩ VGS=4.5V , ID=1.8A 43mΩ VGS=2.5V , ID=1.5A 63mΩ Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T1 : 3000 pcs / tape & reel,7” reel Product rank, zero for no rank products Product name D G S
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 2/ 9 MTN3400AN3 CYStek Product Specification Absolute Maximum Ratings (Ta=25C) Parameter Symbol Limits Unit Drain-Source V oltage VDS 30 V Gate-Source V oltage VGS ±12 Continuous Drain Current @ TA=25C, VGS=10V (Note 3) ID 3.7 A Continuous Drain Current @ TA=70C, VGS=10V (Note 3) 3.0 Pulsed Drain Current (Note 1, 2) IDM 20 Maximum Power Dissipation @ TA=25℃ PD 1.25 W Linear Derating Factor 0.01 W/C Operating Junction and Storage Temperature Tj, Tstg -55~+150 C Note : 1. Pulse width limited by maximum junction temperature. 2. Pulse width≤ 300μs, duty cycle≤2%. Thermal Performance Parameter Symbol Limit Unit Thermal Resistance, Junction-to-Ambient, max (Note) RθJA 100 C/W Thermal Resistance, Junction-to-Case, max RθJC 75 Note : Surface mounted on 1 in² copper pad of FR-4 board, t≤5s ; 270C/W when mounted on minimum copper pad. Electrical Characteristics (Ta=25C) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 30 - - V VGS=0V , ID=250μA VGS(th) 0.4 - 1.4 VDS=VGS, ID=250μA GFS - 2.1 - S VDS=10V , ID=1A IGSS - - ±100 nA VGS=±12V, VDS=0V IDSS - - 1 μA VDS=24V , VGS=0V IDSS - - 5 VDS=24V , VGS=0V , Tj=55C *RDS(ON) - 38 53 VGS=10V , ID=2.4A - 43 60 VGS=4.5V , ID=1.8A - 63 95 VGS=2.5V , ID=1.5A Dynamic Ciss - 315 - pF VDS=15V , VGS=0V , f=1MHz Coss - 46 - Crss - 33 - *td(ON) - 3.6 - ns VDS=15V , VGS=10V , RG=6Ω, ID=3.4A *tr - 16.6 - *td(OFF) - 24.4 - *tf - 4.2 -
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 3/ 9 MTN3400AN3 CYStek Product Specification *Qg - 4.4 9 nC VDS=15V , ID=2.4A, VGS=4.5V *Qgs - 1.5 - *Qgd - 0.9 - Rg - 2.1 - f=1MHz Source-Drain Diode *VSD - 0.83 1.2 V VGS=0V , IS=1.6A *IS - - 2.5 A VD=VG=0V , VS=1.0V *trr - 7.7 - ns IS=1A, VGS=0V , dI/dt=100A/μs *Qrr - 3.3 - nC *Pulse Test : Pulse Width 300μs, Duty Cycle2% Recommended Soldering Footprint
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 4/ 9 MTN3400AN3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 0 1 2 3 4 5 VDS, Drain-Source Voltage(V) ID, Drain Current(A) 10V,9V,8V,8V,6V,5V,4V,3V VGS=2V 2.5V Brekdown Voltage vs Ambient Temperature 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) BVDSS, Normalized Drain-Source Breakdown Voltage ID=250μA, VGS=0V Static Drain-Source On-State resistance vs Drain Current 100 1000 0.01 0.1 1 10 100 ID, Drain Current(A) RDS(on), Static Drain-Source On-State Resistance(mΩ) VGS=10V VGS=2.5V VGS=4.5V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 0 2 4 6 8 10 IDR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C VGS=0V Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 120 140 160 180 200 0 2 4 6 8 10 VGS, Gate-Source Voltage(V) RDS(on), Static Drain-Source On- State Resistance(mΩ) ID=2.4A Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.8 1.2 1.6 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) RDS(on), Normalized Static Drain- Source On-State Resistance VGS=10V, ID=2.4A RDS(ON)@Tj=25°C : 38mΩ typ
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 5/ 9 MTN3400AN3 CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 0 5 10 15 20 25 30 VDS, Drain-Source Voltage(V) Parasitic Capacitance(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.2 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) VGS(th), Normalized Threshold Voltage ID=250μA ID=1mA Forward Transfer Admittance vs Drain Current 0.01 0.1 0.001 0.01 0.1 1 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) VDS=10V Pulsed Ta=25°C Gate Charge Characteristics 0 2 4 6 8 10 12 Qg, Total Gate Charge(nC) VGS, Gate-Source Voltage(V) VDS=15V ID=2.4A Maximum Safe Operating Area 0.01 0.1 100 0.01 0.1 1 10 100 VDS, Drain-Source Voltage(V) ID, Drain Current(A) DC 10ms 100ms 1ms 100μs TA=25°C, Tj=150°C,VGS=10V RθJA=100°C/W, Single Pulse RDS(ON) Limited Maximum Drain Current vs JunctionTemperature 0.5 1.5 2.5 3.5 4.5 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) ID, Maximum Drain Current(A)TA=25°C, Tjmax=150°C, VGS=10V RDSON=100°C/W, Single Pulse
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 6/ 9 MTN3400AN3 CYStek Product Specification Typical Characteristics(Cont.) Typical Transfer Characteristics 0 1 2 3 4 5 VGS, Gate-Source Voltage(V) ID, Drain Current(A) VDS=5V Power Derating Curve 0.2 0.4 0.6 0.8 1.2 1.4 0 50 100 150 200 TA, Ambient Temperature(℃) PD, Power Dissipation(W) Mounted on FR-4 board with 1 in² pad area Transient Thermal Response Curves 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJA(t)=r(t)*RθJA 2.Duty Factor, D=t1/t2 3.TJM-TA=PDM*RθJA(t) 4.RθJA=100°C/W
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 7/ 9 MTN3400AN3 CYStek Product Specification Reel Dimension Carrier Tape Dimension
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 8/ 9 MTN3400AN3 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3C/second max. 3C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100C 150C 60-120 seconds 150C 200C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183C 60-150 seconds 217C 60-150 seconds Peak Temperature(TP) 240 +0/-5 C 260 +0/-5 C Time within 5C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6C/second max. 6C/second max. Time 25 C to peak temperature 6 minutes max. 8 minutes max. Note :1. All temperatures refer to topside of the package, measured on the package body surface. 2.For devices mounted on FR-4 PCB of 1.6mm or equivalent grade PCB. If other grade PCB is used, care should be taken to match the coefficients of thermal expansion between components and PCB. If they are not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the assembly cools.
CYStech Electronics Corp. Spec. No. : C961N3 Issued Date : 2018.09.20 Revised Date : Page No. : 9/ 9 MTN3400AN3 CYStek Product Specification SOT-23 Dimension *: Typical DIM Inches Millimeters DIM Inches Millimeters Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: Lead: Pure tin plated. Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. CYStek reserves the right to make changes to its products without notice. CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Style: Pin 1.Gate 2.Source 3.Drain Marking: 3-Lead SOT-23 Plastic Surface Mounted Package CYStek Package Code: N3 Date Code: Year+Month Year: 7→2017, 8→2018 9→2019, …, etc. 9→9, A→10, B→11, C →12 Product Code