MTN2402KN3 CYSTEKEC | Alldatasheet

Document overview

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Technical content

Features

  • Simple drive requirement
  • Small package outline
  • Pb-free lead plating and halogen-free package Symbol Outline Absolute Maximum Ratings (Ta=25°C) Parameter Symbol Limits Unit Drain-Source V oltage VDS 20 Gate-Source V oltage VGS ±12 V Continuous Drain Current @ TA=25°C , VGS=4.5V 2 Continuous Drain Current @ TA=70°C, VGS=4.5V ID 1.6 Pulsed Drain Current (Notes 1, 2) IDM 8 A PD 1.25 (Note 3) W Maximum Power Dissipation@ TA=25℃ Linear Derating Factor 0.01 W/°C ESD susceptibility 1000 (Note 4) V Operating Junction and Storage Temperature Tj, Tstg -55~+150 °C Note : 1. Pulse width limited by maximum junction temperature. 2. Pulse width≤ 300μs, duty cycle≤2%. 3. Surface mounted on 1 in² copper pad of FR-4 board, t≤5s. 4. Human body model, 1.5kΩ in series with 100pF. MTN2402KN3 SOT-23 G：Gate S：Source D：Drain G S D

CYStech Electronics Corp. Spec. No. : C837N3 Issued Date : 2012.09.13 Revised Date : Page No. : 2/8 MTN2402KN3 CYStek Product Specification Thermal Performance Parameter Symbol Limit Unit Thermal Resistance, Junction-to-Ambient(PCB mounted) Rth,ja 100 °C/W Note : Surface mounted on 1 in² copper pad of FR-4 board, t≤5s; 270°C/W when mounted on minimum copper pad. Electrical Characteristics (Tj=25°C, unless otherwise noted) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 20 - - V VGS=0, ID=250μA VGS(th) 0.5 1.0 1.5 V VDS=VGS, ID=250μA IGSS - - ±10 VGS=±12V , VDS=0 - - 1 VDS=20V , VGS=0 IDSS - - 10 μA VDS=16V , VGS=0 (Tj=70°C) - 170 250 VGS=4.5V , ID=600mA *RDS(ON) - 284 350 mΩ VGS=2.5V , ID=500mA *GFS - 1.3 - S VDS=10V , ID=500mA Dynamic Ciss - 91 - Coss - 19 - Crss - 14 - pF VDS=15V , VGS=0, f=1MHz td(ON) - 5.7 - tr - 6.5 - td(OFF) - 8.1 - tf - 2.2 - ns VDS=10V , ID=1A, VGS=4.5V , RG=6Ω Qg - 2.7 - Qgs - 0.35 - Qgd - 0.98 - nC VDS=16V , ID=2A, VGS=4.5V Source-Drain Diode *IS - - 1 *ISM - - 4 A *VSD - 0.81 1.2 V VGS=0V , IS=600mA *trr - 22 - ns *Qrr - 14 - nC IF=1A, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%

Ordering Information

(Pb-free lead plating and halogen-free package) 3000 pcs / Tape & Reel

CYStech Electronics Corp. Spec. No. : C837N3 Issued Date : 2012.09.13 Revised Date : Page No. : 3/8 MTN2402KN3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 0123456789 1 0 VDS, Drain-Source Voltage(V) ID, Drain Current(A) VGS=2V VGS=3V VGS=3.5V VGS=1.5V VGS=2.5V VGS=4V 5V, 4.5V Brekdown Voltage vs Ambient Temperature 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) BVDSS, Normalized Drain-Source Breakdown Voltage ID=250μA, VGS=0V Static Drain-Source On-State resistance vs Drain Current 100 1000 0.01 0.1 1 10 ID, Drain Current(A) RDS(on), Static Drain-Source On-State Resistance(mΩ) VGS=2.5V VGS=1.8V VGS=4.5V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 00 . 511 . 522 . 533 . 54 I DR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C VGS=0V Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 150 200 250 300 350 400 450 500 550 600 012345 V GS, Gate-Source Voltage(V) RDS(on), Static Drain-Source On- State Resistance(mΩ) ID=600mA Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.6 0.8 1.2 1.4 1.6 -60 -20 20 60 100 140 180 Tj, Junction Temperature(°C) RDS(on), Normalized Static Drain- Source On-State Resistance VGS=4.5V, ID=600mA RDS(ON)@Tj=25°C : 170mΩ

CYStech Electronics Corp. Spec. No. : C837N3 Issued Date : 2012.09.13 Revised Date : Page No. : 4/8 MTN2402KN3 CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 0.1 1 10 100 VDS, Drain-Source Voltage(V) Capacitance---(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.4 0.6 0.8 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 Tj, Junction Temperature(°C) VGS(th), Normalized Threshold Voltage ID=250μA Forward Transfer Admittance vs Drain Current 0.01 0.1 0.001 0.01 0.1 1 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) VDS=10V Pulsed Ta=25°C Gate Charge Characteristics 0123 Qg, Total Gate Charge(nC) VGS, Gate-Source Voltage(V) VDS=16V ID=2A Maximum Safe Operating Area 0.01 0.1 0.01 0.1 1 10 100 VDS, Drain-Source Voltage(V) ID, Drain Current(A) DC 10ms 100ms 1ms 100μs 1sTA=25°C, Tj=150°C, VGS=4.5V, RθJA=100°C/W Single Pulse RDS(ON) Limited Maximum Drain Current vs JunctionTemperature 0.5 1.5 2.5 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) ID, Maximum Drain Current(A)TA=25°C, VGS=4.5V, RθJA=100°C/W

CYStech Electronics Corp. Spec. No. : C837N3 Issued Date : 2012.09.13 Revised Date : Page No. : 5/8 MTN2402KN3 CYStek Product Specification Typical Characteristics(Cont.) Typical Transfer Characteristics 0123456 V GS, Gate-Source Voltage(V) ID, Drain Current(A) VDS=5V Power Derating Curve 0.2 0.4 0.6 0.8 1.2 1.4 0 50 100 150 200 TA, Ambient Temperature(℃) PD, Power Dissipation(W) Mounted on FR-4 board with 1 in² pad area Transient Thermal Response Curves 0.001 0.01 0.1 t1, Square Wave Pulse Duration(s) Normalized Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJA(t)=r(t)*RθJA 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*ZθJC(t) 4.RθJA=100°C/W

CYStech Electronics Corp. Spec. No. : C837N3 Issued Date : 2012.09.13 Revised Date : Page No. : 6/8 MTN2402KN3 CYStek Product Specification Reel Dimension Carrier Tape Dimension

CYStech Electronics Corp. Spec. No. : C837N3 Issued Date : 2012.09.13 Revised Date : Page No. : 7/8 MTN2402KN3 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3°C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6°C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C837N3 Issued Date : 2012.09.13 Revised Date : Page No. : 8/8 MTN2402KN3 CYStek Product Specification SOT-23 Dimension *: Typical H JKD A L GV C B S Style: Pin 1.Gate 2.Source 3.Drain Marking: TE 3-Lead SOT-23 Plastic Surface Mounted Package CYStek Package Code: N3 2402 H 0.0000 0.0040 0.00 0.10 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material:

  • Lead: Pure tin plated.
  • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.