MTE2D0N04E3 CYSTEKEC | Alldatasheet

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Technical content

Features

17.3A • Low On Resistance RDS(ON)@VGS=10V , ID=20A 2.0 mΩ(typ) • Simple Drive Requirement

  • Low Gate Charge
  • Fast Switching Characteristic
  • RoHS compliant package Symbol Outline

Ordering Information

(RoHS compliant) 50 pcs/tube, 20 tubes/box, 4 boxes / carton TO-220 MTE2D0N04E3 G D S G：Gate D：Drain S：Source Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, UB : 50 pcs / tube, 20 tubes/box Product rank, zero for no rank products Product name

CYStech Electronics Corp. Spec. No. : C072E3 Issued Date : 2016.03.04 Revised Date : Page No. : 2/ 8 MTE2D0N04E3 CYStek Product Specification Absolute Maximum Ratings (TC=25°C) Parameter Symbol Limits Unit Drain-Source V oltage (Note 1) VDS 40 Gate-Source V oltage VGS ±30 V Continuous Drain Current @TC=25°C, VGS=10V (silicon limit) (Note 5) 165 Continuous Drain Current @TC=100°C, VGS=10V(silicon limit) (Note 5) 117 Continuous Drain Current @TC=25°C, VGS=10V (package limit) (Note 1) ID Continuous Drain Current @TA=25°C, VGS=10V (Note 2) 17.3 Continuous Drain Current @TA=70°C, VGS=10V (Note 2) IDSM 13.8 Pulsed Drain Current IDM 584 Single Pulse Avalanche Current IAS 50 A Single Pulse Avalanche Energy @ L=1mH, ID=50 Amps, VDD=30V (Note 4) EAS 1250 Repetitive Avalanche Energy (Note 3) EAR 16 mJ TC=25°C (Note 1) 166 TC=100°C (Note 1) PD 83 TA=25°C (Note 2) 2.1 Power Dissipation TA=70°C (Note 2) PDSM 1.3 W Maximum Temperature for Soldering @ Lead at 0.063 in(1.6mm) from case for 10 seconds TL 300 Maximum Temperature for Soldering @ Package Body for 10 seconds TPKG 260 Operating Junction and Storage Temperature Tj, Tstg -55~+175 *Drain current limited by maximum junction temperature Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-case, max RθJC 0.9 Thermal Resistance, Junction-to-ambient, max (Note 2) RθJA 60 °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. 3. Pulse width limited by junction temperature TJ(MAX)=175°C. 4. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 100% tested by conditions of VDD=30V, ID=20A, L=1mH, VGS=10V. 5. Calculated continuous drain current based on maximum allowable junction temperature. 6. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum. 7. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient.

CYStech Electronics Corp. Spec. No. : C072E3 Issued Date : 2016.03.04 Revised Date : Page No. : 3/ 8 MTE2D0N04E3 CYStek Product Specification Characteristics (Tj=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 40 - - V VGS=0V , ID=250μA ∆BVDSS/∆Tj - 32 - mV/°C Reference to 25°C, ID=250μA VGS(th) 2 - 4 V VDS = VGS, ID=250μA *GFS - 31.5 - S VDS =10V , ID=20A IGSS - - ±100 nA VGS=±30V - - 1 VDS =40V , VGS =0V IDSS - - 5 μA VDS =32V , VGS =0V , Tj=55°C *RDS(ON) - 2.0 2.6 mΩ VGS =10V , ID=20A Dynamic *Qg - 114 - *Qgs - 33 - *Qgd - 37 - nC VDS=20V , VGS=10V , ID=84A *td(ON) - 41.8 - *tr - 30.4 - *td(OFF) - 71.8 - *tf - 24 - ns VDS=20V , ID=20A, VGS=10V , RGS=2.7Ω Ciss - 5867 - Coss - 862 - Crss - 398 - pF VGS=0V , VDS=25V , f=1MHz Rg - 0.6 - Ω f=1MHz Source-Drain Diode *IS - - 84 *ISM - - 584 A *VSD - 0.69 1 V IS=1A, VGS=0V *trr - 18 - ns *Qrr - 36 - nC VGS=0V , IF=20A, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%

CYStech Electronics Corp. Spec. No. : C072E3 Issued Date : 2016.03.04 Revised Date : Page No. : 4/ 8 MTE2D0N04E3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 100 120 140 160 012345 V DS, Drain-Source Voltage(V) ID, Drain Current(A) 10V, 9V, 8V, 7V VGS=5.5V Brekdown Voltage vs Ambient Temperature 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) BVDSS, Normalized Drain-Source Breakdown Voltage ID=250μA, VGS=0V Static Drain-Source On-State resistance vs Drain Current 100 0.1 1 10 100 ID, Drain Current(A) RDS(ON), Static Drain-Source On-State Resistance(mΩ) VGS=10V VGS=4.5V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 048 1 2 1 6 2 I DR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C Static Drain-Source On-State Resistance vs Gate-Source Voltage 02468 1 0 Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.8 1.2 1.6 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) RDS(ON), Normalized Static Drain- Source On-State Resistance VGS=10V, ID=20A RDS( ON)@Tj=25°C :2mΩ typ. VGS, Gate-Source Voltage(V) RDS(ON), Static Drain-Source On- State Resistance(mΩ) ID=20A

CYStech Electronics Corp. Spec. No. : C072E3 Issued Date : 2016.03.04 Revised Date : Page No. : 5/ 8 MTE2D0N04E3 CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 10000 0 5 10 15 20 25 30 VDS, Drain-Source Voltage(V) Capacitance---(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.2 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) VGS(th), NormalizedThreshold Voltage ID=250μA ID=1mA Forward Transfer Admittance vs Drain Current 0.01 0.1 100 0.001 0.01 0.1 1 10 100 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) VDS=10V Pulsed Ta=25°C Gate Charge Characteristics 0 20 40 60 80 100 120 140 Total Gate Charge---Qg(nC) VGS, Gate-Source Voltage(V) ID=84A VDS=20V VDS=32V Maximum Safe Operating Area 0.1 100 1000 0.1 1 10 100 VDS, Drain-Source Voltage(V) ID, Drain Current(A) DC 10ms 100ms 1ms 100μs 10μs RDS( ON) Limited TC=25°C, Tj=175°C, VGS=10V, RθJC=0.9°C/W Single Pulse Maximum Drain Current vs Case Temperature 100 120 140 160 180 200 25 50 75 100 125 150 175 200 T C, Case Temperature(°C) ID, Maximum Drain Current(A) VGS=10V, RθJC=0.9°C/W Silicon Limit Package Limit

CYStech Electronics Corp. Spec. No. : C072E3 Issued Date : 2016.03.04 Revised Date : Page No. : 6/ 8 MTE2D0N04E3 CYStek Product Specification Typical Characteristics(Cont.) Typical Transfer Characteristics 100 120 140 160 02468 1 0 V GS, Gate-Source Voltage(V) ID, Drain Current (A) VDS=10V Single Pulse Maximum Power Dissipation 500 1000 1500 2000 2500 3000 1E-05 0.0001 0.001 0.01 0.1 1 10 Pulse Width(s) Power (W) TJ(MAX)=175°C TC=25°C RθJC=0.9°C/W Transient Thermal Response Curves 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Effective Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=0.9 °C/W

CYStech Electronics Corp. Spec. No. : C072E3 Issued Date : 2016.03.04 Revised Date : Page No. : 7/ 8 MTE2D0N04E3 CYStek Product Specification Recommended wave soldering condition Soldering Time Product Peak Temperature Pb-free devices 5 +1/-1 seconds 260 +0/-5 °C Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3°C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183°C 217°C 60-150 seconds 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6°C/second max. 6 minutes max. Time 25 °C to peak temperature 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C072E3 Issued Date : 2016.03.04 Revised Date : Page No. : 8/ 8 MTE2D0N04E3 CYStek Product Specification TO-220 Dimension *: Typical Millimeters Inches Millimeters Inches DIM Min. Marking: Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material:

  • Lead: Pure tin plated.
  • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Style: Pin 1.Gate 2.Drain 3.Source 4.Drain 3-Lead TO-220 Plastic Package CYStek Package Code: E3 Device Name Date Code 1 2 3 E2D0 N04 □□□□