MTE130N20F3 CYSTEKEC | Alldatasheet

Document overview

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  • PDF pages: 9

Technical content

Features

  • Simple Drive Requirement
  • Low Gate Charge
  • Fast Switching Characteristic
  • RoHS compliant package Symbol Outline TO-263 G D S MTE130N20F3 G：Gate D：Drain S：Source

Ordering Information

(Pb-free lead plating and RoHS compliant package) 800 pcs / Tape & Reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T7 : 800 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 2/ 9 MTE130N20F3 CYStek Product Specification Absolute Maximum Ratings (TC=25°C) Parameter Symbol Limits Unit Drain-Source V oltage (Note 1) VDS 200 Gate-Source V oltage VGS ±20 V Continuous Drain Current @TC=25°C, VGS=10V (Note 1) 18* Continuous Drain Current @TC=100°C, VGS=10V (Note 1) ID 12.7* Continuous Drain Current @TA=25°C, VGS=10V (Note 2) 3.1 Continuous Drain Current @TA=70°C, VGS=10V (Note 2) IDSM 2.5 Pulsed Drain Current @ VGS=10V (Note 3) IDM 36* Avalanche Current@ L=0.1mH (Note 3) IAS 8 A Single Pulse Avalanche Energy @ L=1mH, ID=8 Amps, VDD=50V (Note 4) EAS 32 mJ TC=25°C (Note 1) 71 TC=100°C (Note 1) PD 35.5 TA=25°C (Note 2) 2 Power Dissipation TA=70°C (Note 2) PDSM 1.3 W Maximum Temperature for Soldering @ Lead at 0.063 in(1.6mm) from case for 10 seconds TL 300 Maximum Temperature for Soldering @ Package Body for 10 seconds TPKG 260 Operating Junction and Storage Temperature Tj, Tstg -55~+175 *Drain current limited by maximum junction temperature Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-case, max RθJC 2.1 Thermal Resistance, Junction-to-ambient, max (Note 2) RθJA 62.5 °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. 3. Pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 4.100% tested by conditions of L=0.1mH, VGS=10V , IAS=2A, VDD=50V

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 3/ 9 MTE130N20F3 CYStek Product Specification Characteristics (Tj=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 200 - - V VGS=0V , ID=250μA ∆BVDSS/∆Tj - 0.2 - V/°C Reference to 25°C, ID=250μA VGS(th) 2.0 - 4.0 V VDS = VGS, ID=250μA *GFS - 10.5 - S VDS =10V , ID=9A IGSS - - ±100 nA VGS=±20V - - 1 VDS =180V , VGS =0V IDSS - - 10 μA VDS =180V , VGS =0V , Tj=125°C *RDS(ON) - 139 180 mΩ VGS =10V , ID=9A Dynamic *Qg - 17.9 - *Qgs - 4.4 - *Qgd - 7.2 - nC VDS=160V , ID=11A, VGS=10V *td(ON) - 13.4 - *tr - 25.2 - *td(OFF) - 25.8 - *tf - 35.8 - ns VDS=100V , ID=11A, VGS=10V , RG=2.5Ω Ciss - 676 - Coss - 42 - Crss - 19 - pF VGS=0V , VDS=100V , f=1MHz Rg - 4.4 - Ω VDS=0V, f=1MHz Source-Drain Diode *IS - - 18 *ISM - - 36 A *VSD - 0.87 1.5 V IS=18A, VGS=0V *trr - 75 - ns *Qrr - 226 - nC VGS=0V , IF=11A, dIF/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 4/ 9 MTE130N20F3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 0369 1 2 1 Brekdown Voltage vs Ambient Temperature 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) BVDSS, Normalized Drain-Source Breakdown Voltage 10V,9V,8V,7V VDS, Drain-Source Voltage(V) ID, Drain Current (A) 5.5V ID=250μA, VGS=0V V =4V 5VGS Static Drain-Source On-State resistance vs Drain Current 100 1000 0.01 0.1 1 10 100 ID, Drain Current(A) RDS(on), Static Drain-Source On-State Resistance(mΩ) VGS=6V VGS=10V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 02468 1 0 IDR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) VGS=0V Tj=25°C Tj=150°C Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 200 300 400 500 600 700 800 900 1000 02468 1 V GS, Gate-Source Voltage(V) RDS(on), Static Drain-Source On- State Resistance(mΩ) ID=9A Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.8 1.2 1.6 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) RDS(on), Normalized Static Drain- Source On-State Resistance VGS=10V, ID=9A RDS( ON)@Tj=25°C : 139mΩtyp.

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 5/ 9 MTE130N20F3 CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 10000 0 20 40 60 80 100 VDS, Drain-Source Voltage(V) Capacitance---(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.2 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) VGS(th), Normalized Threshold Voltage ID=250μA ID=1mA Forward Transfer Admittance vs Drain Current 0.01 0.1 100 0.001 0.01 0.1 1 10 100 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) Ta=25°C Pulsed VDS=10V VDS=15V Gate Charge Characteristics 0 4 8 12 16 20 24 Qg, Total Gate Charge(nC) VGS, Gate-Source Voltage(V) ID=11A VDS=100V VDS=40V VDS=160V Maximum Safe Operating Area 0.01 0.1 100 0.1 1 10 100 1000 VDS, Drain-Source Voltage(V) ID, Drain Current(A) TC=25°C, Tj=175°C VGS=10V, RθJC=2.1°C/W Single Pulse DC 100ms RDSON Limited 10μs 100μs 1ms 10ms Maximum Drain Current vs Case Temperature 25 50 75 100 125 150 175 T C, Case Temperature(°C) ID, Maximum Drain Current(A)VGS=10V, RθJC=2.1°C/W

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 6/ 9 MTE130N20F3 CYStek Product Specification Typical Characteristics(Cont.) Typical Transfer Characteristics 02468 1 0 V GS, Gate-Source Voltage(V) ID, Drain Current(A) VDS=10V Single Pulse Power Rating, Junction to Case 200 400 600 800 1000 1200 1400 1600 1800 2000 0.0001 0.001 0.01 0.1 1 10 Pulse Width(s) Power (W) TJ(MAX)=175°C TC=25°C RθJC=2.1°C/W Transient Thermal Response Curves 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Effective Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=2.1°C/W

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 7/ 9 MTE130N20F3 CYStek Product Specification Reel Dimension Carrier Tape Dimension

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 8/ 9 MTE130N20F3 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3°C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6°C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C966F3 Issued Date : 2016.12.19 Revised Date : Page No. : 9/ 9 MTE130N20F3 CYStek Product Specification TO-263 Dimension c2 1.22 1.32 0.048 0.052 θ 0° 8° 0° 8° D 9.05 9.25 0.356 0.364 Θ1 5° 9° 5° 9° D1 6.60 - 0.260 - Θ2 1° 5° 1° 5° Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material :

  • Lead : Pure tin plated.
  • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Marking : Style : Pin 1.Gate 2.Drain E130 N20 3.Source 3-Lead Plastic Surface Mounted Package CYStek Package Code : F3 □□□□ Device Name Date Code Date Code : (From left to right) First Code : Year code, the last digit of Christinr year. For example, 2014→4, 2015→, 2016→6, …, etc. Second Code : Month code, Jan→A, Feb→B, Mar→C, Apr→D, May→E, Jun→F, Jul→G, A u g→H, Sep→J, Oct→K, Nov→L, Dec→M Third and fourth codes : production serial number, 01~99