MTE115P10J3 CYSTEKEC | Alldatasheet

Document overview

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Technical content

Features

  • Low Gate Charge
  • Simple Drive Requirement
  • Pb-free lead plating & halogen-free package Equivalent Circuit Outline MTE115P10J3 TO-252(DPAK) G D S G：Gate D：Drain S：Source

Ordering Information

TO-252 MTE115P10J3-0-T3-G (Pb-free lead plating & halogen-free package) 2500 pcs / Tape & Reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T3 : 2500 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Symbol Limits Unit Drain-Source V oltage VDS -100 Gate-Source V oltage VGS ±20 V Continuous Drain Current @ TJ=175°C, TC=25°C, VGS=-10V (Note 1) -14 Continuous Drain Current @ TJ=175°C,TC=100°C, VGS=-10V (Note 1) ID -9.9 Continuous Drain Current @TA=25°C, VGS=-10V (Note 2) -3.3 Continuous Drain Current @TA=70°C, VGS=-10V (Note 2) IDSM -2.6 Pulsed Drain Current (Note 3) IDM -56 Avalanche Current (Note 3) IAS -14 A Avalanche Energy @ L=0.7mH, ID=-14A, RG=25Ω (Note 2) EAS 68 mJ TC=25°C (Note 1) 50 TC=100°C (Note 1) PD 25 TA=25°C (Note 2) 2.5 Total Power Dissipation TA=70°C (Note 2) PDSM 1.6 W Operating Junction and Storage Temperature Range Tj, Tstg -55~+175 °C Thermal Data Parameter Symbol Typical Maximum Unit Thermal Resistance, Junction-to-case RθJC 2.7 3 Thermal Resistance, Junction-to-ambient, t≤10s (Note 2) 15 18 Thermal Resistance, Junction-to-ambient, steady state RθJA 40 50 °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design. 3. Pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C.

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification Characteristics (Tc=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS -100 - - VGS=0V , ID=-250μA VGS(th) -2 - -4 V VDS =VGS, ID=-250μA IGSS - - ±100 nA VGS=±20V , VDS=0V - - -1 VDS =-80V , VGS =0V IDSS - - -25 μA VDS =-80V , VGS =0V , TJ=125°C ID(ON) *1 -14 - - A VDS =-5V , VGS =-10V - 106 135 VGS =-10V , ID=-10A RDS(ON) *1 - 137 180 mΩ VGS =-6V , ID=-10A GFS *1 - 13 - S VDS =-5V , ID=-10A Dynamic Qg *1, 2 - 19 28.5 Qgs *1, 2 - 5.2 - Qgd *1, 2 - 6.1 - nC ID=-7A, VDS=-80V , VGS=-10V td(ON) *1, 2 - 12 18 tr *1, 2 - 16.2 24.3 tf *1, 2 - 65 97.5 ns VDS=-20V , ID=-1A, VGS=-10V , RG=6Ω Ciss - 1028 - Coss - 116 - Crss - 48 - pF VGS=0V , VDS=-25V , f=1MHz Rg - 11 - Ω VDS=0V , f=1MHz Source-Drain Diode Ratings and Characteristics IS *1 - - -14 ISM *1 - - -56 A VSD *1 - -0.86 -1.2 V IS=-10A, VGS=0V trr - 31.7 47.5 ns Qrr - 53 - nC IF=-10A, dIF/dt=100A/μs Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature. Recommended soldering footprint

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 0 2 4 6 8 10 12 14 16 18 20 -VDS, Drain-Source Voltage(V) -ID, Drain Current(A) 10V 5.5V -VGS=5V 6.5V -VGS=4.5V Brekdown Voltage vs Ambient Temperature 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) -BVDSS, Normalized Drain-Source Breakdown Voltage ID=-250μA, VGS=0V Static Drain-Source On-State resistance vs Drain Current 100 150 200 250 300 350 400 450 500 0.01 0.1 1 10 100 D, Drain Current(A) RDS(ON), Static Drain-Source On-State Resistance(mΩ) VGS=-6V -10VVGS=-4.5V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 02468 1 -IDR, Reverse Drain Current(A) -VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C VGS=0V Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 150 200 250 300 350 400 450 500 02468 1 0 Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.8 1.2 1.6 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) RDS(ON), Normalized Static Drain- Source On-State Resistance VGS=-10V, ID=-10A RDS(ON)@Tj=25°C : 106mΩ typ -VGS, Gate-Source Voltage(V) RDS(ON), Static Drain-Source On- State Resistance(mΩ) ID=-10A

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification Typical Characteristics (Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 10000 01 0 2 0 30 Threshold Voltage vs Junction Tempearture 0.2 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) -VGS(th), Normalized Threshold VoltageID=-250μA ID=-1mA -VDS, Drain-Source Voltage(V) Capacitance---(pF) Ciss Coss Crss f=1MHz Maximum Safe Operating Area 0.01 0.1 100 0.1 1 10 100 1000 -VDS, Drain-Source Voltage(V) -ID, Drain Current (A) RDS( ON) Limited DC 10ms 100ms 1ms 100μs TC=25°C, Tj=175°C, VGS=-10V, RθJC=3°C/W, single pulse Gate Charge Characteristics 0 4 8 1 21 62 02 4 Qg, Total Gate Charge(nC) -VGS, Gate-Source Voltage(V) ID=-7A VDS=-20V VDS=-50V VDS=-80V Maximum Drain Current vs Case Temperature 25 50 75 100 125 150 175 200 T C, Case Temperature(°C) -ID, Maximum Drain Current(A)VGS=-10V, Tj(max)=175°C, RθJC=3°C/W, single pulse Forward Transfer Admittance vs Drain Current 0.01 0.1 100 0.001 0.01 0.1 1 10 100 -ID, Drain Current(A) GFS, Forward Transfer Admittance(S) VDS=-10V Pulsed Ta=25°C

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification Typical Characteristics (Cont.) Typical Transfer Characteristics 02468 1 0 -VGS, Gate-Source Voltage(V) -ID, Drain Current(A) VDS=-10V Single Pulse Maximum Power Dissipation 500 1000 1500 2000 2500 3000 3500 4000 4500 5000 0.0001 0.001 0.01 0.1 1 10 Pulse Width(s) Peak Transient Power (W) TJ(MAX)=175°C TC=25°C RθJC=3°C/W Transient Thermal Response Curves 0.001 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Effective Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=3°C/W

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification Reel Dimension Carrier Tape Dimension

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification Recommended wave soldering condition Soldering Time Product Peak Temperature Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3°C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds Time maintained above: −Temperature (TL) 217°C − Time (tL) 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak 10-30 seconds 20-40 seconds temperature(tp) Ramp down rate 6°C/second max. 6°C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C166J3 Issued Date : 2015.06.08 Revised Date : 2015.06.11 MTE115P10J3 CYStek Product Specification TO-252 Dimension Inches Marking: Device Name Date Code E115 P10 □□□□ 1 2 3 Style: Pin 1.Gate 2.Drain 3.Source 4.Drain 3-Lead TO-252 Plastic Surface Mount Package CYStek Package Code: J3 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material:

  • Lead : Pure tin plated.
  • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.