MTE020N10RF3 CYSTEKEC | Alldatasheet
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Low On Resistance Simple Drive Requirement Low Gate Charge Fast Switching Characteristic RoHS compliant package Symbol Outline
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MTE020N10RF3-0-T7-X TO-263 (Pb-free lead plating and RoHS compliant package) 800 pcs / Tape & Reel TO-263 MTE020N10RF3 G：Gate D：Drain S：Source BVDSS 100V ID@TC=25C, VGS=10V 42A RDS(ON)@VGS=10V , ID=20A 21 mΩ(typ) G D S Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T7 : 800 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 2/ 9 MTE020N10RF3 CYStek Product Specification Absolute Maximum Ratings (TC=25C) Parameter Symbol Limits Unit Drain-Source V oltage (Note 1) VDS 100 V Gate-Source V oltage VGS ±25 Continuous Drain Current @TC=25C, VGS=10V (Note 1) ID 42* A Continuous Drain Current @TC=100C, VGS=10V (Note 1) 29.7* Continuous Drain Current @TA=25C, VGS=10V (Note 2) IDSM 6.2 Continuous Drain Current @TA=70C, VGS=10V (Note 2) 5 Pulsed Drain Current @ VGS=10V (Note 3) IDM 100* Single Pulse Avalanche Current @ L=0.1mH (Note 3) IAS 32 Single Pulse Avalanche Energy @ L=1mH, ID=15 Amps, VDD=25V (Note 4) EAS 112 mJ Repetitive Avalanche Energy (Note 3) EAR 10 Power Dissipation TC=25C (Note 1) PD 100 W TC=100C (Note 1) 50 TA=25C (Note 2) PDSM 2.1 TA=70C (Note 2) 1.4 Operating Junction and Storage Temperature Tj, Tstg -55~+175 *Drain current limited by maximum junction temperature Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-case, max RθJC 1.5 C/W Thermal Resistance, Junction-to-ambient, max (Note 2) RθJA 58 Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. 3. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 4. 100% tested by conditions of L=0.1mH, IAS=20A, VGS=10V , VDD=25V
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 3/ 9 MTE020N10RF3 CYStek Product Specification Characteristics (Tj=25C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 100 - - V VGS=0V, ID=250μA ∆BVDSS/∆Tj - 0.1 - V/C Reference to 25C, ID=250μA VGS(th) 2.0 - 4.0 V VDS = VGS, ID=250μA *GFS - 11.8 - S VDS =10V, ID=20A IGSS - - ±100 nA VGS=±25V , VDS=0V IDSS - - 1 μA VDS =80V , VGS =0V IDSS - - 25 VDS =80V , VGS =0V , Tj=125C *RDS(ON) - 21 30 mΩ VGS =10V, ID=20A Dynamic *Qg - 15.5 - nC VDD=50V , ID=20A,VGS=10V *Qgs - 5.4 - *Qgd - 4.1 - *td(ON) - 13.8 - ns VDD=50V , ID=20A, VGS=10V , RG=3Ω *tr - 16.8 - *td(OFF) - 22.6 - *tf - 7.2 - Ciss - 965 - pF VGS=0V , VDS=50V , f=1MHz Coss - 161 - Crss -- 22 - Rg - 1.1 - Ω f=1MHz Source-Drain Diode *IS - - 42 A *ISM - - 150 *VSD - 0.74 1 V IS=1A, VGS=0V *trr - 27 - ns VGS=0V , IF=20A, dIF/dt=100A/μs *Qrr - 30 - nC *Pulse Test : Pulse Width 300μs, Duty Cycle2%
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 4/ 9 MTE020N10RF3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 100 0 1 2 3 4 5 VDS, Drain-Source Voltage(V) ID, Drain Current (A) 10V VGS=5V 5.5V 6.5V 8V9V Brekdown Voltage vs Ambient Temperature 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) BVDSS, Normalized Drain-Source Breakdown Voltage ID=250μA, VGS=0V Static Drain-Source On-State resistance vs Drain Current 100 0.01 0.1 1 10 100 ID, Drain Current(A) RDS(on), Static Drain-Source On-State Resistance(mΩ) VGS=10V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 0 2 4 6 8 10 IDR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C VGS=0V Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 0 2 4 6 8 10 VGS, Gate-Source Voltage(V) RDS(on), Static Drain-Source On- State Resistance(mΩ) ID=20A Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.8 1.2 1.6 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) RDS(on), Normalized Static Drain- Source On-State Resistance VGS=10V, ID=20A RDS(ON)@Tj=25°C : 21mΩ
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 5/ 9 MTE020N10RF3 CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 10000 0 5 10 15 20 25 30 35 40 45 50 VDS, Drain-Source Voltage(V) Capacitance---(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.2 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) VGS(th), Normalized Threshold Voltage ID=250μA ID=1mA Forward Transfer Admittance vs Drain Current 0.01 0.1 100 0.001 0.01 0.1 1 10 100 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) Ta=25°C Pulsed VDS=10V VDS=15V Gate Charge Characteristics 0 2 4 6 8 10 12 14 16 18 20 Qg, Total Gate Charge(nC) VGS, Gate-Source Voltage(V) ID=20A VDS=20V, 50V, 80V from left to right Maximum Safe Operating Area 0.01 0.1 100 1000 0.1 1 10 100 1000 VDS, Drain-Source Voltage(V) ID, Drain Current(A) TC=25°C, Tj=175°C VGS=10V, RθJC=1.5°C/W Single Pulse DC 100ms RDSON Limited 10μs 100μs 1ms 10ms Maximum Drain Current vs Case Temperature 25 50 75 100 125 150 175 200 TC, Case Temperature(°C) ID, Maximum Drain Current(A)VGS=10V, RθJC=1.5°C/W
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 6/ 9 MTE020N10RF3 CYStek Product Specification Typical Characteristics(Cont.) Typical Transfer Characteristics 100 0 2 4 6 8 10 12 VGS, Gate-Source Voltage(V) ID, Drain Current(A) VDS=5V Single Pulse Power Rating, Junction to Case 100 200 300 400 500 600 700 800 900 1000 0.0001 0.001 0.01 0.1 1 10 Pulse Width(s) Power (W) TJ(MAX)=175°C TC=25°C RθJC=1.5°C/W Transient Thermal Response Curves 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Effective Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=1.5° C/W
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 7/ 9 MTE020N10RF3 CYStek Product Specification Reel Dimension Carrier Tape Dimension
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 8/ 9 MTE020N10RF3 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3C/second max. 3C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100C 150C 60-120 seconds 150C 200C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183C 60-150 seconds 217C 60-150 seconds Peak Temperature(TP) 240 +0/-5 C 260 +0/-5 C Time within 5C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6C/second max. 6C/second max. Time 25 C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.
CYStech Electronics Corp. Spec. No. : C745F3 Issued Date : 2017.10.26 Revised Date : Page No. : 9/ 9 MTE020N10RF3 CYStek Product Specification TO-263 Dimension DIM Millimeters Inches DIM Millimeters Inches c1 1.170 1.370 0.046 0.054 φ 0° 8° 0° 8° E 8.500 8.900 0.335 0.350 Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material : Lead : Pure tin plated. Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice: All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. CYStek reserves the right to make changes to its products without notice. CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Marking : Style : Pin 1.Gate 2.Drain 3.Source 3-Lead Plastic Surface Mounted Package CYStek Package Code : F3 E020 N10R □□□□ Device Name Date Code Date Code : (From left to right) First Code : Year code, the last digit of Christinr year. For example, 2014→4, 2015→, 2016→6, …, etc. Second Code : Month code, Jan→A, Feb→B, Mar→C, Apr→D, May→E, Jun→F, Jul→G , Aug→H, Sep→J, Oct→K, Nov→L, Dec→M Third and fourth codes : production serial number, 01~99