MTBC7N10K3 CYSTEKEC | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 10
Technical content
Features
- Lower gate charge.
- ESD protected gate.
- Pb-free lead plating and Halogen-free package. Equivalent Circuit Outline
Ordering Information
(Pb-free lead plating and halogen-free package) 2000 pcs / tape & box MTBC7N10K3-0-BM-G TO-92L (Pb-free lead plating and halogen-free package) 500 pcs / bag, 10 bags/box, 10 boxes/carton TO-92L MTBC7N10K3 G：Gate S：Source D：Drain BVDSS 100V ID @TA=25°C, VGS=10V 1A RDSON(TYP)@VGS=10V , ID=1A 389mΩ RDSON(TYP)@VGS=4.5V , ID=1A 413mΩ RDSON(TYP)@VGS=4V , ID=1A 407mΩ Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, TB : 2000 pcs / tape & box ; BM : 500 pcs/bag, 10 bags/box, 10 boxes/carton Product rank, zero for no rank products Product name S D G
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 2/10 MTBC7N10K3 CYStek Product Specification Absolute Maximum Ratings (Tc=25C, unless otherwise noted) Parameter Symbol Limits Unit Drain-Source V oltage VDS 100 V Gate-Source V oltage VGS ±20 Continuous Drain Current TA=25°C, VGS=10V ID 1 A TA=70°C, VGS=10V 0.8 Pulsed Drain Current IDM 4 (Note 1 & 2) Power Dissipation TA=25°C PD 1 W TA=70°C 0.64 Operating Junction and Storage Temperature Tj, Tstg -55 ~ +150 C Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-ambient, max RθJA 125 C/W Note :1. Pulse width limited by maximum junction temperature. 2. Duty cycle ≤ 1%. Electrical Characteristics (TA=25C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 100 - - V VGS=0V , ID=250μA △BVDSS/△Tj - 107 - mV/°C ID=1mA, referenced to 25°C VGS(th) 1 - 2.5 V VDS=10V , ID=1mA △VGS(th)/△Tj - -3 - mV/°C ID=1mA, referenced to 25°C IGSS - - ±10 μA VGS=±16V, VDS=0V IDSS - - 1 VDS=80V , VGS=0V - - 10 VDS=80V , VGS=0V , Tj=125C *RDS(ON) - 389 520 ID=1A, VGS=10V - 407 560 ID=1A, VGS=4.5V - 413 580 ID=1A, VGS=4V *GFS 1 2.4 - S ID=1A, VGS=10V Dynamic Ciss - 103 150 pF VDS=25V , VGS=0V , f=1MHz Coss - 18 27 Crss - 17 24 *td(ON) - 3.6 7.2 ns VDS=50V , ID=0.5A,VGS=10V , RG=10Ω *tr - 16 24 *td(OFF) - 17.2 26 *tf - 18.8 28
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 3/10 MTBC7N10K3 CYStek Product Specification *Qg - 1.6 3.2 nC VDS=50V , ID=1A, VGS=5V *Qgs - 0.8 1.6 *Qgd - 0.5 1.5 Rg - 18 - f=1MHz Source-Drain Diode IS - - 0.8 A VSD - 0.8 1.2 V IS=1A, VGS=0V Pulse test : Pulse width≤300μs, Duty cycle≤2% Independent of operating temperature Pulse width limited by maximum junction temperature
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 4/10 MTBC7N10K3 CYStek Product Specification Typical Characteristics Typical Output Characteristics 0.2 0.4 0.6 0.8 0 0.2 0.4 0.6 0.8 1 VDS, Drain-Source Voltage(V) ID, Drain Current(A) 10V VGS=2V Typical Output Characteristics 0.5 1.5 2.5 3.5 0 1 2 3 4 5 6 7 8 9 10 VDS, Drain-Source Voltage(V) ID, Drain Current(A) 10V,9V,8V,7V,6V,5V,4V,3V VGS=2V Brekdown Voltage vs Ambient Temperature 0.4 0.6 0.8 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) BVDSS(V), Normalized Drain-Source Breakdown Voltage ID=250μA, VGS=0V Typical Transfer Characteristics 0.5 1.5 2.5 3.5 0 1 2 3 4 5 VGS, Gate-Source Voltage(V) ID, Drain Current(A) VDS=10V Static Drain-Source On-State resistance vs Drain Current 100 1000 0.001 0.01 0.1 1 ID, Drain Current(A) RDS(on), Static Drain-Source On-State Resistance(mΩ) top : VGS=2V 4.5V bottom 10V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 0 1 2 3 4 5 IDR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C VGS=0V
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 5/10 MTBC7N10K3 CYStek Product Specification Typical Characteristics(Cont.) Static Drain-Source On-State Resistance vs Gate-Source Voltage 200 400 600 800 1000 0 2 4 6 8 10 VGS, Gate-Source Voltage(V) RDS(on), Static Drain-Source On- State Resistance(mΩ) ID=1A Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.2 2.4 -60 -20 20 60 100 140 180 Tj, Junction Temperature(°C) RDS(on), Normalized Static Drain- Source On-State Resistance VGS=10V, ID=1A RDS(ON)@Tj=25°C : 390mΩ Capacitance vs Drain-to-Source Voltage 100 1000 0 5 10 15 20 25 30 35 40 45 50 VDS, Drain-Source Voltage(V) Capacitance---(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.4 0.6 0.8 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 Tj, Junction Temperature(°C) VGS(th), Normalized Threshold Voltage ID=1mA Forward Transfer Admittance vs Drain Current 0.01 0.1 0.001 0.01 0.1 1 10 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) VDS=10V Pulsed TA=25°C Gate Charge Characteristics 0 0.5 1 1.5 2 2.5 3 Qg, Total Gate Charge(nC) VGS, Gate-Source Voltage(V) VDS=50V ID=1A TA=25°C
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 6/10 MTBC7N10K3 CYStek Product Specification Typical Characteristics(Cont.) Maximum Safe Operating Area 0.001 0.01 0.1 0.1 1 10 100 1000 VDS, Drain-Source Voltage(V) ID, Drain Current(A) DC 10ms 100ms 1ms 100μs TA=25°C, Tj=150°C, VGS=10V, RθJA=125°C/W Single Pulse RDS(ON) Limited Maximum Drain Current vs JunctionTemperature 0.2 0.4 0.6 0.8 1.2 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) ID, Maximum Drain Current(A) TA=25°C, VGS=10V Power Derating Curve 0.2 0.4 0.6 0.8 1.2 0 50 100 150 200 TA, Ambient Temperature(℃) PD, Power Dissipation(W) Single Pulse Maximum Power Dissipation 0.0001 0.001 0.01 0.1 1 10 Pulse Width(s) Peak Transient Power (W) TJ(MAX)=150°C TA=25°C RθJA=125°C/W
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 7/10 MTBC7N10K3 CYStek Product Specification Typical Characteristics(Cont.) Transient Thermal Response Curves 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJA(t)=r(t)*RθJA 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*ZθJC(t) 4.RθJA=125°C/W
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 8/10 MTBC7N10K3 CYStek Product Specification TO-92L Taping Outline DIM Item Millimeters Min. Max. A1 Component body width 4.70 5.10 A Component body height 7.80 8.20 T Component body thickness 3.70 4.10 d Lead wire diameter 0.35 0.55 d1 Lead wire diameter 1 0.60 0.80 P Pitch of component 12.40 13.00 P0 Feed hole pitch 12.50 12.90 P2 Hole center to component center 6.05 6.65 F1, F2 Lead to lead distance 2.20 2.80 △h Component alignment, F-R -1.00 1.00 W Tape width 17.50 19.00 W0 Hole down tape width 5.50 6.50 W1 Hole position 8.50 9.50 W2 Hole down tape position - 1.00 H Height of component from tape center 19.00 21.00 H0 Lead wire clinch height 15.50 16.50 L1 Lead wire (tape portion) 2.50 - D0 Feed hole diameter 3.80 4.20 t1 Taped lead thickness 0.35 0.45 t2 Carrier tape thickness 0.15 0.25 P1 Position of hole 3.55 4.15 △P Component alignment -1.00 1.00
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 9/10 MTBC7N10K3 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3C/second max. 3C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100C 150C 60-120 seconds 150C 200C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183C 60-150 seconds 217C 60-150 seconds Peak Temperature(TP) 240 +0/-5 C 260 +0/-5 C Time within 5C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6C/second max. 6C/second max. Time 25 C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.
CYStech Electronics Corp. Spec. No. : C886K3 Issued Date : 2018.06.13 Revised Date : Page No. : 10/10 MTBC7N10K3 CYStek Product Specification TO-92L Dimension *: Typical DIM Inches Millimeters DIM Inches Millimeters D1 0.157 - 4.000 - Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: Lead: Pure tin plated. Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. CYStek reserves the right to make changes to its products without notice. CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. BC7 N10 □□□□ Marking: Style: Pin 1.Source 2.Drain 3.Gate 3-Lead TO-92L Plastic Package CYStek Package Code: K3 Product Name Date Code: Year+Month+Lot No. Year: 7→2017, 8→2018, etc. Month: A→1, B→2, C→3, D→4, K→10, L→11, M→12 Lot No. : Serial number : 01~99 1 2 3