MSS40 COMSET | Alldatasheet
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29/10/2012 COMSET SEMICONDUCTORS 1 | 4 SEMICONDUCTORS BACK TO BACK SCR MODULE SOT-227 MAIN FEATURES
- IT(RMS) : 55 and 70 A
- VDRM/VRRM : 800 and 1200 V
- IGT : 50 mA MSS 40 - 800 SCR VOLTAGE : MODULE 800 : 800V SERIES 1200 : 1200V CURRENT : 4 0 : 5 5 A 5 0 : 7 0 A The MSS40 / MSS50 Series is based on two back-to-back SCR configurations, providing high noise immunity. They are suitable for high power applications. The compactness of the SOT-227 package allows high power density and optimized power bus connections. Compliance to RoHS. 1 : Thyristor 2 Anode (A2) 2 : Thyristor 2 Gate (G2) 3 : Thyristor 1 Anode (A1) 4 : Thyristor 1 Gate (G1)
29/10/2012 COMSET SEMICONDUCTORS 2 | 4 SEMICONDUCTORS ABSOLUTE MAXIMUM RATINGS Symbol Ratings Value Unit MSS40 MSS50 IT(RMS) RMS on-state current TC = 80 °C 55 - A TC = 85 °C - 70 ITSM Non repetitive surge peak on-state current tp = 16.7ms Tj = 25 °C 420 630 A tp = 20ms 400 600 I2t I2t Value for fusing t p = 10ms T j = 25 °C 800 1800 A 2s Dl/dt Critical rate of rise of on- state current IG = 2xIGT, tr ≤ 100ns F = 120Hz T j = 125 °C 50 A/µs IGM Peak gate current t p = 20µs T j = 125 °C 4 A PG(AV) Average gate power dissipation T j = 125 °C 1 W Tj Operating junction temperature range -40 to +125 °C Tstg Storage junction temperature range -40 to +150 VRGM Maximum peak reverse gate voltage 5 V THERMAL CHARACTERISTICS Symbol Ratings Value Unit Rth(j-c) Junction to case (AC) MSS40 0.6 °C/W MSS50 0.45
29/10/2012 COMSET SEMICONDUCTORS 3 | 4 SEMICONDUCTORS
ELECTRICAL CHARACTERISTICS
TC=25°C unless otherwise noted Symbol Test Conditions Min Typ Max Unit IDRM VDRM = VDRM Rated Tj = 25 °C MSS40 - - 20 µA MSS50 Tj = 125 °C MSS40 - - 10 mA MSS50 IRRM VRRM = VRRM Rated Tj = 25 °C MSS40 - - 20 µA MSS50 Tj = 125 °C MSS40 - - 10 mA MSS50 IGT VD = 12 V, RL = 33 Ω MSS40 5 - 50 mA MSS50 VGT VD = 12 V, RL = 33 Ω MSS40 - - 1.3 V MSS50 VGD VD = VDRM, RL = 3.3 kΩ Tj = 125 °C MSS40 0.2 - - V MSS50 IH IT = 500 mA Gate open MSS40 - - 80 mA MSS50 VTM ITM = 80A tp = 380 µs Tj = 25 °C MSS40 - - 1.7 V ITM = 100A tp = 380 µs MSS50 - - 1.7 IL IG = 1.2xIGT MSS40 - - 120 mA MSS50 dV/dt VD = 67% VDRM Gate open Tj = 125 °C MSS40 1000 - - V/µs MSS50 Vt0 Threshold voltage T j = 125 °C MSS40 - - 0.85 V MSS50 Rd Dynamic resistance T j = 125 °C MSS40 - - 11 mΩ MSS50 - - 7
29/10/2012 COMSET SEMICONDUCTORS 4 | 4 SEMICONDUCTORS MECHANICAL DATA CASE SOT-227 Revised September 2012 Information furnished is believed to be accurate and reliable. However, Comset Semiconductors assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. Data are subject to change without notice. Comset Semiconductors makes no warranty, representation or guarantee re garding the suitability of its products for any particular purpose, nor does Comset Semicond uctors assume any liability aris ing out of the application or us e of any product and specifica lly disclaims any and all liability, including without limitation consequential or in cidental damages. Comset Semiconductors’ products are not au thorized for use as critical components in life support devices or systems. www.comsetsemi.com info@comsetsemi.com