MK2703SITR

MK2703 ICST | Alldatasheet

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Technical content

PLL Audio Clock Synthesizer Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com ICR OCLOC K Block Diagram Description Features The MK2703 is a low cost, low jitter, high performance PLL clock synthesizer designed to replace oscillators and PLL circuits in set-top box and multimedia systems. Using our patented analog Phase-Locked Loop (PLL) techniques, the device uses a 27 MHz crystal or clock input to produce a buffered reference clock and a selectable audio clock. MicroClock manufactures the largest variety of Set-Top Box and multimedia clock synthesizers for all applications. Consult MicroClock to eliminate VCXOs, crystals and oscillators from your board.

• Packaged in 8 pin SOIC
• Uses an inexpensive fundamental crystal, or clock
• Supports MPEG sampling rates of 32 kHz, 44.1 kHz, 48 kHz and 96 kHz
• Patented zero ppm synthesis error in all clocks
• All frequencies are frequency locked
• 25 mA output drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 3.3 V or 5 V operating voltage
• For audio clocks that require lower jitter, use the MK2731-03C
• Industrial temperature version available

27 MHz crystal or

(Capacitors are required for crystal tuning) Crystal Oscillator VDD GND PLL Clock Synthesis and Control Circuitry Output Buffer Audio Clock Output Buffer 27.000 MHz S1:0

PLL Audio Clock Synthesizer Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com ICR OCLOC K Pin Descriptions Key: XI, XO = Crystal connections; I(PU)= Input with internal pull-up resistor; O = output; P = power supply connection Pin Assignment MK2703 Key: 0 = connect pin directly to ground 1 = connect pin directly to VDD 1 8 GND VDD CLK 8 pin SOIC 27M S1 S0 CLK 0 0 8.192 0 1 11.2896 1 0 12.288 1 1 24.576 Audio Clock Output Select Table (MHz) Number Name Type Description 1 X1 XI Crystal Connection. Connect to a 27.0 MHz fundamental crystal or clock. 2 VDD P Connect to +3.3V or +5V. 3 GND P Connect to ground. 4 27M O 27.00 MHz buffered reference clock output. 5 CLK O Audio Clock Output per table above. 6 S1 I(PU) Audio Clock Frequency Select Input #1. Determines CLK output per table above. 7 S0 I(PU) Audio Clock Frequency Select Input #0. Determines CLK output per table above. 8 X2 XO Crystal Connection to a 27.0 MHz crystal, or leave unconnected for clock input.

PLL Audio Clock Synthesizer Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com ICR OCLOC K Parameter Conditions Minimum Typical Maximum Units ABSOLUTE MAXIMUM RATINGS (note 1) ABSOLUTE MAXIMUM RATINGS (note 1) Supply voltage, VDD Referenced to GND 7 V Inputs and Clock Outputs Referenced to GND -0.5 VDD+0.5 V Ambient Operating Temperature MK2703S 0 70 °C MK2703SI -40 85 °C Soldering Temperature Max of 10 seconds 260 °C Storage temperature -65 150 °C DC CHARACTERISTICS (VDD = 3.3 V unless noted)DC CHARACTERISTICS (VDD = 3.3 V unless noted) Operating Voltage, VDD 3.13 5.50 V Input High Voltage, VIH, X1 pin only (VDD/2)+1 VDD/2 V Input Low Voltage, VIL, X1 pin only VDD/2 (VDD/2)-1 V Input High Voltage, VIH 2 V Input Low Voltage, VIL 0.8 V Output High Voltage, VOH IOH=-12mA 2.4 V Output Low Voltage, VOL IOL=12mA 0.4 V Output High Voltage, VOH, CMOS level IOH=-4mA VDD-0.4 V Operating Supply Current, IDD No Load 25 mA Short Circuit Current Each output ±50 mA Input Capacitance S1, S0 5 pF Frequency synthesis error All clocks 0 ppm AC CHARACTERISTICS (VDD = 3.3 V unless noted)AC CHARACTERISTICS (VDD = 3.3 V unless noted) Input Crystal Frequency 27.00 MHz Input Crystal Accuracy ±30 ppm Output Clock Rise Time 0.8 to 2.0V 1.5 ns Output Clock Fall Time 2.0 to 0.8V 1.5 ns Output Clock Duty Cycle At VDD/2 40 60 % Maximum Absolute Jitter, short term ±190 ps Electrical Specifications Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability. External Components The MK2703 requires a minimum number of external components for proper operation. For a crystal input, one load capacitor should be connected from each of the X1 and X2 pins to ground. The value (in pF) of each crystal load capacitor should equal (C L-16)•2, where C L is the crystal’s load (correlation) capacitance in pF. The input crystal must be connected as close to the chip as possible. The input crystal should be a parallel resonant, fundamental, AT cut 27 MHz. For a clock input, connect to X1 and leave X2 unconnected. Decoupling capacitors of 0.01µF should be connected between VDD and GND on pins 2 and 3, as close to the MK2703 as possible. A series termination resistor of 33 Ω may be used for the clock output.

PLL Audio Clock Synthesizer Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com ICR OCLOC K While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc. (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.

Ordering Information

Part/Order Number Marking Shipping packaging Package Temperature MK2703S MK2703S tubes 8 pin SOIC 0 to 70°C MK2703STR MK2703S tape and reel 8 pin SOIC 0 to 70°C MK2703SI MK2703I tubes 8 pin SOIC -40 to 85°C MK2703SITR MK2703I tape and reel 8 pin SOIC -40 to 85°C 8 pin SOIC Inches Inches Millimeters Millimeters Symbol Min Max Min Max A 0.0532 0.0688 1.35 1.75 A1 0.0040 0.0098 0.10 0.24 B 0.0130 0.0200 0.33 0.51 C 0.0075 0.0098 0.19 0.24 D 0.1890 0.1968 4.80 5.00 E 0.1497 0.1574 3.80 4.00 e .050 BSC .050 BSC 1.27 BSC 1.27 BSC H 0.2284 0.2440 5.80 6.20 h 0.0099 0.0195 0.25 0.50 L 0.0160 0.0500 0.41 1.27 B D E H e A1 C A h x 45° L INDEX AREA 1 2 Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC Publication No. 95.)