MAS9128A MICRONAS | Alldatasheet

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DA9128A.002 July 12, 1998 0$6 /’29ROWDJH5HJXODWRU,&

  • /c3/c55/c75/c85/c72/c72/c3/c79/c82/c90/c3/c71/c85/c82/c83/c82/c88/c87/c3/c89/c82/c79/c87/c68/c74/c72/c3/c85/c72/c74/c88/c79/c68/c87/c82/c85/c86
  • /c3/c53/c72/c74/c88/c79/c68/c87/c82/c85/c3/c72/c81/c68/c69/c79/c72/c18/c71/c76/c86/c68/c69/c79/c72/c3/c70/c82/c81/c87/c85/c82/c79
  • /c3/c51/c82/c90/c72/c85/c3/c86/c68/c89/c76/c81/c74/c3/c86/c79/c72/c72/c83/c3/c80/c82/c71/c72 /c39/c40/c54/c38/c53/c44/c51/c55/c44/c50/c49 The MAS9128A is voltage regulator IC with three 2.85V LDO regulators providing voltage regulation for the handset terminal. The output voltages of the three regulators can be modified through a mask option. Two enable/disable pins control the state of the regulators. In order to save power the device goes into sleep mode when all regulators are disabled. An internal thermal protection circuit prevents the device from overheating. The maximum output current is limited internally. /c41/c40/c36/c55/c56/c53/c40/c54 /c36/c51/c51/c47/c44/c38/c36/c55/c44/c50/c49
  • 2.85V regulators at 100mA, 70mA and 50mA
  • Output accuracy <±3%
  • Fast dynamic response
  • Low output noise
  • Low supply current: 150µA per regulator
  • SO8 package
  • Mobile phones
  • Cordless phones
  • Battery powered systems /c37/c47/c50/c38/c46/c3/c39/c44/c36/c42/c53/c36/c48 Bandgap Reference LDO_B (70mA) OUTB VREF ENA GNDVCC ENBC LDO_A (100mA) OUTA LDO_C (50mA) OUTC Temperature Protection

DA9128A.002 July 12, 1998 /c51/c44/c49/c3/c38/c50/c49/c41/c44/c42/c56/c53/c36/c55/c44/c50/c49 4 5 SO8 OUTA OUTB OUTC ENA ENBC GND VCC VREF /c51/c44/c49/c3/c39/c40/c54/c38/c53/c44/c51/c55/c44/c50/c49 /c51/c76/c81/c3/c49/c68/c80/c72 /c51/c76/c81 /c55/c92/c83/c72 /c41/c88/c81/c70/c87/c76/c82/c81 OUTA 1 O 2.85V/100mA regulator output OUTC 2 O 2.85V/50mA regulator output ENBC 3 I Enable for regulators B and C ENA 4 I Enable for regulator A VREF 5 O Reference voltage GND 6 P Ground VCC 7 P Positive supply voltage OUTA 8 O 2.85V/70mA regulator output

DA9128A.002 July 12, 1998 /c36/c37/c54/c50/c47/c56/c55/c40/c3/c48/c36/c59/c44/c48/c56/c48/c3/c53/c36/c55/c44/c49/c42/c54 (All voltages with respect to ground.) /c51/c68/c85/c68/c80/c72/c87/c72/c85 /c54/c92/c80/c69/c82/c79 /c38/c82/c81/c71/c76/c87/c76/c82/c81/c86 /c48/c76/c81 /c48/c68/c91 /c56/c81/c76/c87 Supply Voltage V CC -0.3 13.0 V Logic input voltage V EN -0.3 V CC +0.3 Max. Junction Temperature T J 150 0C Thermal resistance R JA 163 0C/W Lead temperature for 10 seconds 230 0C Storage Temperature T S -55 +150 0C ESD Rating Note 1: Stresses beyond those listed may cause permanent damage to the device. The device may not operate under these conditions, but will not be destroyed. /c53/c40/c38/c50/c48/c48/c40/c49/c39/c40/c39/c3/c50/c51/c40/c53/c36/c55/c44/c50/c49/c3/c38/c50/c49/c39/c44/c55/c44/c50/c49/c54 /c51/c68/c85/c68/c80/c72/c87/c72/c85 /c54/c92/c80/c69/c82/c79 /c38/c82/c81/c71/c76/c87/c76/c82/c81/c86 /c48/c76/c81 /c55/c92/c83 /c48/c68/c91 /c56/c81/c76/c87 Supply Voltage V CC 3.1 6.5 V Operating Temperature T AMB -20 +70 0C /c40/c47/c40/c38/c55/c53/c44/c38/c36/c47/c3/c38/c43/c36/c53/c36/c38/c55/c40/c53/c44/c54/c55/c44/c38/c54 /c51/c68/c85/c68/c80/c72/c87/c72/c85 /c54/c92/c80/c69/c82/c79 /c38/c82/c81/c71/c76/c87/c76/c82/c81/c86 /c48/c76/c81 /c55/c92/c83 /c48/c68/c91 /c56/c81/c76/c87 Threshold high T H 130 150 170 0C Threshold low T L 120 140 160 0C Continuos power dissipation in operation TAMB = 250C 644 mW TAMB = 700C 368 mW NOTE 2:A hysteresis of 100C avoids oscillation in case of thermal shutdown. After the regulator temperature has dropped by this value, it will turn on again automatically. ◆ /c39/c76/c74/c76/c87/c68/c79/c3/c44/c81/c83/c88/c87/c86/c3/c11/c40/c49/c36/c15/c3/c40/c49/c37/c38/c12 (TAM B = -20 C to +70 C, unless otherwise noted. Typical value for TJ is 27 C.) /c51/c68/c85/c68/c80/c72/c87/c72/c85 /c54/c92/c80/c69/c82/c79 /c38/c82/c81/c71/c76/c87/c76/c82/c81/c86 /c48/c76/c81 /c55/c92/c83 /c48/c68/c91 /c56/c81/c76/c87 Input high voltage V IH 2.2 V Input low voltage V IL 0.40 V

DA9128A.002 July 12, 1998 /c40/c47/c40/c38/c55/c53/c44/c38/c36/c47/c3/c38/c43/c36/c53/c36/c38/c55/c40/c53/c44/c54/c55/c44/c38/c54 ◆ /c53/c72/c74/c88/c79/c68/c87/c82/c85/c3/c50/c88/c87/c83/c88/c87/c86/c3/c11/c47/c39/c50/c66/c36/c15/c3/c47/c39/c50/c66/c37/c15/c3/c47/c39/c50/c66/c38/c12 (TAM B = -20 C to +70 C, unless otherwise noted. Typical value for TJ is 27 C Cin=1µF Cout= 1µF,ceramic) /c51/c68/c85/c68/c80/c72/c87/c72/c85 /c54/c92/c80/c69/c82/c79 /c38/c82/c81/c71/c76/c87/c76/c82/c81/c86 /c48/c76/c81 /c55/c92/c83 /c48/c68/c91 /c56/c81/c76/c87 Output voltage V OU T 3.1V < VCC < 6.5V, 0mA < IOU T < IMAX 2.7 2.85 3.0 V Short circuit current LDO_A I MAXA 310 mA LDO_B I MAXB 220 mA LDO_C I MAXC 170 mA Load Current LDO_A I OUT A 0 100 mA LDO_B I OUTB 07 0 m A LDO_C I OUTC 05 0 m A Line regulation 1Vpp at V CC , max. load 1.1 10 mV Load regulation 0mA < I OU T < IMAX LDO_A 94 5 m V LDO_B 63 1 m V LDO_C 52 2 m V Load transient T AMB = 25oC 10uA to ½ load in 1us (4) -60 mV 100uA to max. Load in 1us (4) -70 mV 10uA to max. Load in 1us (5) -85 mV PSRR f ≤ 10kHz, 1Vpp at VCC = 4.5V CREF = 10nF 50 60 dB Quiescent current per regulator (3) IQR ON, max. load 170 uA IQR ON, IOU T = 100uA 150 uA IQR OFF <1 uA Total quiescent current IQ ENA = ENBC = 0V IOU T = 0 VCC = 6.5V <1 30 µA Noise 10Hz < f < 100kHz typical load, no capacitor at VREF 190 uVrms 10Hz < f < 100kHz typical load, 10nF cap. at VREF 50 uVrms Settling time Enables OFF to ON 2.7V < VOU T < 3.0V 10nF cap. at VREF 0.5 1.0 ms Output capacitor C OU T 0.8 1.0 2.6 uF ESR 0.01 0.1 1 Ohm NOTE 3:To get the real quiescent current of the device, the quiescent current of the reference voltage generator (140uA typ.) has to be added together once for all regulators. NOTE 4:V OUT does not drop below 2.7V for more than 1us. NOTE 5:VOUT does not drop below 2.5V for more than 1us or below 2.7V for more than 50us.

DA9128A.002 July 12, 1998 /c41/c56/c49/c38/c55/c44/c50/c49/c54 ◆ /c54/c88/c83/c83/c79/c92/c3/c57/c82/c79/c87/c68/c74/c72/c15/c3/c57/c82/c79/c87/c68/c74/c72/c3/c53/c72/c74/c88/c79/c68/c87/c82/c85/c86 The device is supplied with 3.1V to 6.5V battery voltage under normal conditions. An internal band gap voltage reference is used to generate the reference voltage for all three voltage regulators. The reference voltage is routed via an internal 20kOhm Resistor to an external pin where a filter capacitor can be connected in order to reduce the noise level of all three regulators. The startup time of the reference voltage is then determined by the value of the bypass capacitor at pin VREF. /c40/c81/c68/c69/c79/c72/c3/c51/c76/c81/c86 Each regulator can be enabled/disabled by the two enable pins ENA and ENBC. Pin ENA controls regulator LDO_A and pin ENBC controls both regulators LDO_B and LDO_C. If both enable pins are forced low, the internal voltage reference and internal bias source are turned off in order to save power. A common enable for all three regulator outputs is designed, but connected to VDD internally for the SOIC8 version of MAS9128A. /c53/c72/c74/c88/c79/c68/c87/c82/c85/c86 The device contains three 2.85V low dropout CMOS regulators with maximum output currents of 100mA, 70mA and 50mA. There is a mask option to modify the output voltage to 2.55V, 2.70V, 2.85V, 3.00V or 3.15V. The IC has thermal protection in order to prevent thermal destruction especially at high ambient temperatures. Maximum output current of each regulator is limited by an internal circuitry. The regulation loop of the regulators is optimized to work with low ESR ceramic buffer capacitors at the output. /c47/c82/c74/c76/c70/c3/c87/c68/c69/c79/c72/c3/c73/c82/c85/c3/c40/c81/c68/c69/c79/c72/c3/c76/c81/c83/c88/c87/c86 /c40/c49/c36 /c40/c49/c37/c38 /c47/c39/c50/c66/c36 /c47/c39/c50/c66/c37 /c47/c39/c50/c66/c38 /c57/c53/c40/c41 1 1 ON ON ON ON 1 0 ON OFF OFF ON 0 1 OFF ON ON ON 0 0 OFF OFF OFF OFF /c36/c51/c51/c47/c44/c38/c36/c55/c44/c50/c49/c3/c44/c49/c41/c50/c53/c48/c36/c55/c44/c50/c49 /c48 /c36 /c54/c28/c20/c21/c27/c36 /c57/c53 /c40/c41 /c50/c56 /c55 /c38 /c50/c56 /c55 /c37/c50/c56/c55 /c36 /c20/c19/c81/c41 /c57/c38 /c38 /c42/c49 /c39 /c40/c49 /c36 /c40 /c49/c37/c38 /c82/c73 /c73 /c82/c81 /c20/c88/c41 /c20/c88/c41/c20/c88/c41 /c21/c17 /c27/c24/c57 /c21/c17 /c27/c24/c57 /c21/c17 /c27/c24/c57 /c20/c88 /c41 /c57/c44 /c49 /c3 /c22/c17 /c20/c57/c17 /c17 /c25/c17 /c24 /c57

DA9128A.002 July 12, 1998 /c51/c36/c38/c46/c36/c42/c40/c3/c50/c56/c55/c47/c44/c49/c40/c54/c3/c36/c49/c39/c3/c53/c40/c38/c50/c48/c48/c40/c49/c39/c40/c39/c3/c47/c36/c49/c39/c3/c51/c36/c55/c55/c40/c53/c49 0.10 0.25 1.35 1.75SEATING PLANE 4.80 5.00 5.80 6.20 PIN 1 3.80 4.00 0.50 x 45° 0.40 1.27

8 LEAD SO OUTLINE

1.27 BSC 0.33 0.51 0° - 8° 0.25 x 45° 7.47 PIN 1 2.39 1.27 0.71 PAD LAYOUT

DA9128A.002 July 12, 1998 /c50/c53/c39/c40/c53/c44/c49/c42/c3/c44/c49/c41/c50/c53/c48/c36/c55/c44/c50/c49 /c78 MAS9128AS LDO Voltage Regulator IC SO8 MAS9128AS-T LDO Voltage Regulator IC SO8 Tape and Reel /c47/c50/c38/c36/c47/c3/c39/c44/c54/c55/c53/c44/c37/c56/c55/c50/c53 /c48/c44/c38/c53/c50/c49/c36/c54/c3/c38/c50/c49/c55/c36/c38/c55/c54 Micronas Semiconductor GmbH Lohweg 29 D-85375 NEUFAHRN, GERMANY Tel. (08165) 9521 0 Tel. Int. + 49 8165 9521 0 Telefax + 49 8165 9521 99 Micronas Semiconductor SA Ch. Chapons-des-Prés CH-2022 BEVAIX, SWITZERLAND tel. (032) 847 0111 Tel. Int. +41 32 847 0111 Telefax +41 32 846 1930 Micronas Oy Kamreerintie 2, P.O.Box 51 FIN-02771 ESPOO, FINLAND Tel. (09) 80521 Tel. Int. +358 9 80521 Telefax +358 9 8053213 /c49/c50/c55/c44/c38/c40 Micronas reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micronas assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micronas makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.