MAS6180 MAS | Alldatasheet

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Technical content

1 (9) DA6180.001

27 December, 2006

  • Single Band Receiver IC
  • High Sensitivity
  • Very Low Power Consumption
  • Wide Supply Voltage Range
  • Power Down Control
  • Control for AGC On
  • High Selectivity by Crystal Filter
  • Fast Startup Feature

DESCRIPTION

The MAS6180 AM-Receiver chip is a highly sensitive, simple to use AM receiver specially intended to receive time signals in the frequency range from 40 kHz to 100 kHz. Only a few external components are required fo r time signal receiver. The circuit has preamplifier, wide range automatic gain control, demodulator and outpu t comparator built in. The output signal can be processed directly by an additional digital circuit ry to extract the data from the received signal. The cont rol for AGC (automatic gain control) can be used to switch AGC on or off if necessary. MAS6180 has options for compensating shunt capacitances of different crystals (See ordering information on page 9). FEATURES APPLICATIONS

  • Single Band Receiver IC
  • Highly Sensitive AM Receiver, 0.4 µ VRMS typ.
  • Wide Supply Voltage Range from 1.1 V to 3.6 V
  • Very Low Power Consumption
  • Power Down Control
  • Fast Startup
  • Only a Few External Components Necessary
  • Control for AGC On
  • Wide Frequency Range from 40 kHz to 100 kHz
  • High Selectivity by Quartz Crystal Filter
  • Crystal Compensation Capacitance Options
  • Differential Input
  • Single Band Time Signal Receiver WWVB (USA), JJY (Japan), DCF77 (Germany), MSF (UK), HGB (Switzerland) and BPC (China) BLOCK DIAGRAM AGC Amplifier Power Supply/Biasing Demodulator Comparator RFIP RFIM VDD VSS PDN AGC DEC OUT QOP QI QOM AON VDD VDD

2 (9) DA6180.001 1370 µµµµ m 1070 µµ µµ m QOM MAS6180Ax, x = 1, 2, 5 VSS pad bonded first! DIE size = 1.07 mm x 1.37 mm; PAD size = 80 µ m x 80 µ m Note: Because the substrate of the die is internally conn ected to VSS, the die has to be connected to VSS or left floating. Please make sure that VSS is the first pa d to be bonded. Pick-and-place and all component as sembly are recommended to be performed in ESD protected area. Note: Coordinates are pad center points where origin has been located in bottom-left corner of the silicon die. Pad Identification Name X-coordinate Y-coordinate N ote Power Supply Voltage VDD 152 µ m 1137 µ m Positive Quartz Filter Output for Crystal QOP 152 µ m 1002 µ m Negative Quartz Filter Output for Crystal QOM 152 µ m 815 µ m 1 Quartz Filter Input for Crystal and External Compensation Capacitor QI 152 µ m 629 µ m AGC Capacitor AGC 152 µ m 443 µ m Receiver Output OUT 152 µ m 257 µ m 2 Demodulator Capacitor DEC 915 µ m 265 µ m AGC On Control AON 915 µ m 451 µ m 3 Power Down PDN 915 µ m 636 µ m 4 Positive Receiver Input RFIP 915 µ m 824 µ m 5 Negative Receiver Input RFIM 915 µ m 1010 µ m 5 Power Supply Ground VSS 915 µ m 1158 µ m Notes: 1) External crystal compensation capacitor pin QOM is connected only in MAS6180A5 version. It is left unconnected in MAS6180A1 and A2 versions which have internal compensation capacitor. 2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated) - the output is a current source/sink with |I OUT | > 5 µ A - at power down the output is pulled to VSS (pull do wn switch) 3) AON = VSS means AGC off (hold current gain level ); AON = VDD means AGC on (working) - Internal pull-up with current < 1 µ A which is switched off at power down 4) PDN = VSS means receiver on; PDN = VDD means re ceiver off Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up (PDN=VSS) i.e. at the falling edge of PDN signal. 5) Receiver inputs RFIP and RFIM have both 600 k Ω biasing resistors towards VDD

3 (9) DA6180.001 All Voltages with Respect to Ground Parameter Symbol Conditions Min Max Unit Supply Voltage V DD -VSS - 0.3 5.5 V Input Voltage V IN V SS -0.3 V DD +0.3 V ESD Rating V ESD For all pins, Human Body Model (HBM), ESD Association Standard Test Method ESD-STM5.1- 1998, C ESD = 100 pF, Rs = 1500 Ω ), ±2 kV Latchup Current Limit I LUT For all pins, test according to Micro Analog Systems specification ESQ0141. See note below. ±100 mA Operating Temperature T OP -40 +85 ° C Storage Temperature T ST - 55 +150 ° C Stresses beyond those listed may cause permanent damage to the device. The device may not operate under these conditions, but it will not be destroyed. Note: In latchup testing the supply voltages are connect ed normally to the tested device. Then pulsed test current is fed to each input separately and device current consumption is observ ed. If the device current consumption increases sud denly due to test current pulses and the abnormally high current consumption continu es after test current pulses are cut off then the d evice has gone to latch up. Current pulse is turned on for 10 ms and off for 20 ms.

ELECTRICAL CHARACTERISTICS

Operating Conditions: VDD = 1.5V, Temperature = 25°C, unless otherwise specified. Parameter Symbol Conditions Min Typ Max Unit Operating Voltage V DD 1.10 3.6 V Current Consumption I DD VDD=1.5 V, Vin=0 µ Vrms VDD=1.5 V, Vin=20 mVrms VDD=3.6 V, Vin=0 µ Vrms VDD=3.6 V, Vin=20 mVrms µ A Stand-By Current I DDoff See note below. 0.1 µ A Input Frequency Range f IN 40 100 kHz Minimum Input Voltage V IN min 0.4 1 µ Vrms Maximum Input Voltage V IN max 20 mVrms Receiver Input Resistance Receiver Input Capacitance RRFI CRFI Differential Input, f=40 kHz..77.5 kHz 600 0.5 kΩ pF Input Levels |l IN |<0.5 µ A VIL VIH VDD -0.35 0.35 V Output Current V OL <0.2 V DD ;V OH >0.8 V DD |I OUT | 5 µ A Output Pulse T 100ms 1 µ Vrms ≤ V IN ≤ 20 mVrms 50 140 ms T 200ms 1 µ Vrms ≤ V IN ≤ 20 mVrms 150 230 ms T 500ms 1 µ Vrms ≤ V IN ≤ 20 mVrms 400 500 600 ms T 800ms 1 µ Vrms ≤ V IN ≤ 20 mVrms 700 800 900 ms Startup Time T Start Fast Start-up, Vin=0.4 µ Vrms Fast Start-up, Vin=20 mVrms 1.3 3.5 s Output Delay Time T Delay 50 100 ms Note: Stand-by current consumption may increase if V IH and V IL differ from VDD and 0 respectively.

Figure 1. Application circuit of internal compensation capacitance option version MAS6180A1 and A2. Figure 2. Application circuit of external compensation capacitance option version MAS6180A5.

Figure 3. Dual band application circuit of external compensation capacitance option version MAS6180A5. PMOS switch transistor is used since RFIM input is biased close to VDD voltage.

capacitance. See Compensation Capacitance Options on table 2. Table 1. Time-Signal System Frequencies configuration since the noise band width of crystal filter with two parallel crystals is double. Table 3 below presents some crystal manufacturers having suitable crystals for timesignal receiver application. Table 3. Crystal Manufacturers and Crystal Types in Alphaphetical Order for Timesignal Receiver Application

startup it is shortened typically to few seconds. AON control pin has internal pull up which turns AG C circuit on all the time if AON pin is left unconn ected. time released since due to leakage the AGC can change slowly when in hold. determining receiver performance. Recommended antenna impedance at resonance is around 150 k Ω . signal-to-noise ratio is at maximum is achieved in between. extensive tuning accuracy requirements and possible tuning drifts by the temperature. defined by ratio of resonance frequency f 0 and antenna bandwidth B (equation 2). Table 4 below presents some antenna manufacturers for time signal application. Table 4. Antenna Manufacturers and Antenna Types in Alphaphetical Order for Time Signal Application

8 (9) DA6180.001 MAS6180 SAMPLES IN SBDIL 20 PACKAGE Top Marking Definitions: YYWW = Year Week XXXXX.X = Lot Number ZZ =Sample Version VDD 2 QOP 4 QOM 5 QI 7 AGC 8 OUT 10

20 VSS

18 RFIM

17 RFIP

14 PDN

13 AON

12 DEC

XXXXX.X PIN DESCRIPTION Pin Name Pin Type Function Note 1 NC VDD 2 P Positive Power Supply 3 NC QOP 4 AO Positive Quartz Filter Output for Crystal QOM 5 NC Negative Quartz Filter Output for External Compensation Capacitor or Second Crystal

6 NC 2

QI 7 AI Quartz Filter Input for Crystal and Externa l Compensation Capacitor AGC 8 AO AGC Capacitor 9 NC OUT 10 DO Receiver Output 3 11 NC DEC 12 AO Demodulator Capacitor AON 13 DI AGC On Control 4 PDN 14 DI Power Down Input 5 15 NC 16 NC RFIP 17 AI Positive Receiver Input 6 RFIM 18 AI Negative Receiver Input 6 19 NC VSS 20 G Power Supply Ground A = Analog, D = Digital, P = Power, G = Ground, I = Input, O = Output, NC = Not Connected Notes: 1) External crystal compensation capacitor pin QOM is connected only in MAS6180A5 version. It is left unconnected in MAS6180A1 and A2 versions which have internal compensation capacitor. 2) Pin 6 between QOM and QI must be connected to VS S to eliminate DIL package lead frame parasitic capacitances disturbing the crystal filter performa nce. All other NC (Not Connected) type pins are als o recommended to be connected to VSS to minimize noise coupling. 3) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated) - the output is a current source/sink with |I OUT | > 5 µ A - at power down the output is pulled to VSS (pull do wn switch) 4) AON = VSS means AGC off (hold current gain level ); AON = VDD means AGC on (working) - Internal pull-up with current < 1 µ A which is switched off at power down 5) PDN = VSS means receiver on; PDN = VDD means re ceiver off - Fast start-up is triggered when the receiver is af ter power down (PDN=VDD) controlled to power up (PDN=VSS) i.e. at the falling edge of PDN signal. 6) Receiver inputs RFIP and RFIM have both 600 k Ω biasing resistors towards VDD

9 (9) DA6180.001

ORDERING INFORMATION

Product Code Product Description Capacitance Option MAS6180A1TC00 Single Band AM-Receiver IC with Differential Input EWS-tested wafer, diameter 150 mm, thickness 400 µm. C C = 0.75 pF MAS6180A2TC00 Single Band AM-Receiver IC with Differential Input EWS-tested wafer, diameter 150 mm, thickness 400 µm. C C = 1.3 pF MAS6180A5TC00 Single Band AM-Receiver IC with Differential Input EWS-tested wafer, diameter 150 mm, thickness 400 µm. External compensation capacitor Contact Micro Analog Systems Oy for other wafer thickness options. N The formation of product code An example for MAS6180A1TC00: MAS6180 A 1 TC 00 Product name Design version Capacitance option: C C = 0.75 pF Package type: TC = 400 µ m thick EWS tested wafer Delivery format: 00 = bare wafer 05 = dies on tray LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O. Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data shee t in order to improve the design or performance and to supply the best possible product s. Micro Analog Systems Oy assumes no responsibilit y for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specifi ed in this data sheet, and makes no claim that the circuits are free from patent infrin gement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.