M902-01

M902-01 ICST | Alldatasheet

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M902-01 Datasheet Rev 2.1 Revised 24Jun2004 Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400 M902-01 VCSO BASED GBE CLOCK GENERATOR Integrated Circuit Systems, Inc. Product Data Sheet GENERAL DESCRIPTION The M902-01 is a PLL (Phase Locked Loop) based clock generator that uses an internal VCSO (Voltage Controlled SAW Oscillator) to produce a very low jitter output clock. It is ideal for Gigabit Ethernet. The output clock (frequency of 156.25 or 187.50MHz for example) is provided from two LVPECL clock output pairs. (Specify frequency at time of order.) The accuracy of the output frequency is assured by the internal PLL, which phase-locks the internal VCSO to the reference input frequency ( 25 or 30MHz for example). The input reference can either be an external crystal, utilizing the internal crystal oscillator, or a stable external clock source such as a packaged crystal oscillator.

FEATURES

◆ Output clock frequency from 125MHz to 190MHz (Consult factory for frequency availability) ◆ Two identical LVPECL output pairs ◆ Integrated SAW (surface acoustic wave) delay line ◆ Low jitter 0.5ps rms (over 12kHz-20MHz) ◆ Ideal for Gigabit Ethernet clock reference ◆ Output-to-output skew < 100ps ◆ External XTAL or LVCMOS reference input ◆ Selectable external feed-through clock input ◆ STOP clock control (Logic 1 stops output clocks) ◆ Industrial temperature grade available ◆ Single 3.3V power supply ◆ Small 9 x 9 mm SMT (surface mount) package PIN ASSIGNMENT (9 x 9 mm SMT) Figure 1: Pin Assignment SIMPLIFIED BLOCK DIAGRAM Figure 2: Simplified Block Diagram Example Output Frequency Configurations Ref Clock Frequency (MHz) PLL Ratio Output Frequency 1 (MHz) Note 1: Specify output clock frequency at time of order Application

125.00 GbE

25 156.25 10GbE 30 187.50 12GbE Table 1: Example Output Frequency Configurations M902-01 (Top View) XTAL_1 / REF_IN GND STOP EXT_CLK EN_EXT_CLK NC NC NC VCC NC NC nFOUT1 FOUT1 GND nFOUT0 FOUT0 VCC GND XTAL_2 NC NC NC NC VCC DNC DNC DNC nOP_IN OP_OUT VC nVC nOP_OUT OP_IN GND GND GND M902-01 XTAL OSC O External Crystal or Reference Clock Input (e.g., 25 or 30MHz) LVPECL Output Clock Pairs (e.g., 156.25 or 187.50MHz) Divider External Clock Input External Clock Select Output Clock STOP Control VSCO Frequency Multiplying PLL External Loop Filter M902-01 VCSO Based GbE Clock Generator

M902-01 Datasheet Rev 2.1 2 of 8 Revised 24Jun2004 Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400 Integrated Circuit Systems, Inc. M902-01 VCSO BASED GBE CLOCK GENERATOR Product Data Sheet DETAILED BLOCK DIAGRAM Figure 3: Detailed Block Diagram PIN DESCRIPTIONS Number Name I/O Configuration Description 1, 2, 3, 10, 14, 26 GND Ground Power supply ground connections. OP_IN nOP_IN Input External loop filter connections. See Figure 5, External Loop Filter, on pg. 4. nOP_OUT OP_OUT Output nVC VC Input 11, 19, 33 VCC Power Power supply connection, connect to + 3.3V. FOUT0 nFOUT0 Output No internal terminator Clock output pairs, differential LVPECL output (156.25 MHz for the M902-01-156.2500)15 FOUT1 nFOUT1 17, 18 NC No internal connection20, 21, 22 29, 30, 31, 32

23 EN_EXT_CLK

Input Internal pull-down resistor 1 Note 1: For typical value of internal pull-down re sistor, see DC Characteristics, Pull-down on pg. 6. Logic 1 enables the EXT_CLK input. Use Logic 0 for normal operation.

24 EXT_CLK Input External clock feed-through: 0 to 200 MHz

25 STOP Input Internal pull-down resistor 1 Logic 1 stops clock outputs. Use Logic 0 for normal operation. 27 XTAL_1 / REF_IN Input External crystal connection. Also accepts LVCMOS/LVTTL compatible clock source. 28 XTAL_2 Input External crystal connection. Leave unconnected when driving pin 27 with external clock reference. 34, 35, 36 DNC Do Not Connect. Table 2: Pin Descriptions M902-01 XTAL_2 XTAL_1 / REF_IN XTAL OSC EXT_CLK EN_EXT_CLK STOP R Divider R = 4 Phase Detector VCSO SAW Delay Line Phase Shifter VCSO CPOST CPOST VCnVC RPOST nOP_OUTOP_OUT RPOST RLOOP RLOOP CLOOP CLOOP RIN RIN OP_IN nOP_IN Loop Filter Amplifier External Loop Filter Components M Divider M = 25 Phase Locked Loop (PLL) O FOUT1 nFOUT1 FOUT0 nFOUT0

M902-01 Datasheet Rev 2.1 3 of 8 Revised 24Jun2004 Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400 M902-01 VCSO BASED GBE CLOCK GENERATOR Product Data Sheet Integrated Circuit Systems, Inc. FUNCTIONAL DESCRIPTION The M902-01 is a PLL (Phase Locked Loop) based clock generator that generates output clocks synchronized to an input reference clock. The M902-01 combines the flexibility of a VCSO (Voltage Controlled SAW Oscillator) with the stability of a crystal oscillator. Input Reference The input reference can either be an external, discrete crystal or a stable external clock source such as a packaged (temperature-compensated) crystal oscillator.

• If an external crystal is used with the on-chip crystal oscillator circuit (XTAL OSC), the external crystal should be a parallel-resonant, fundamental mode crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input pins. External crystal load trim capacitors are also required. (See “Crystal Specifications” on pg. 4.)
• If an external LVCMOS/LVTTL clock source is used, apply it to the XTAL_1 / REF_IN input pin. In either case, the reference clock is supplied to the phase detector of the PLL. The M902-01 includes a reference divider that divides the input reference frequency by a fixed value “R” and provides the result to the phase detector. The EX_CLK pin is available for a clock feed-through mode for testing. See “External Clock Feed-through” on pg. 3. The PLL The PLL (Phase Locked Loop) includes the phase detector, the VCSO, a feedback divider (labeled “M Divider”), and a reference divider (“R Divider”). The feedback divider divides the VCSO output frequency by a fixed value “M” to match the reference frequency provided to the phase detector by the reference divider. By controlling the frequency and phase of the VCSO, the phase detector precisely locks the frequency and phase of the feedback divider output to that of the reference divider output. The relationship between the VCSO output frequency, the M Divider, the R Divider and the input reference frequency is defined as follows: For the M902-01-156.2500 (see “Ordering Information” on pg. 8):
• VCSO output frequency = 156.25MHz
• Input reference frequency = 25MHz
• M=25
• R= 4 Therefore, for the M902-01-156.2500: 25156.25MHz = 25MHz The product of the input crystal frequency and falls within the lock range of the VCSO. External Clock Feed-through The EXT_CLK pin provides an input for an external single-ended clock that directly drives the LVPECL clock outputs. This pin is intended for system debugging and performance evaluation.. STOP Clock The STOP pin puts the output clock into a static condition. EN_EXT_CLK Logic 1 enables the EXT_CLK input. Use Logic 0 for normal operation. EXT_CLK Apply an external LVCMOS/LVTTL clock source for 0 to 200 MHz feed-through operation. Leave inactive for normal operation.1 Note 1: In applications where EXT_CLK is active while the SAW PLL signal path is enabled, it is necessary to gate the EXT_CLK to minimize jitter in the LVPECL output pairs. See the PCB Design Guidelines for ICS SAW PLLs application note at www.icst.com/products/appnotes/M000-AN-001.PCBdesign.pdfLogic 1 Output clocks are static Logic 0 Output clocks enabled for normal operation Fvcso Fxtal M R-----×= M R-----

M902-01 Datasheet Rev 2.1 5 of 8 Revised 24Jun2004 Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400 M902-01 VCSO BASED GBE CLOCK GENERATOR Product Data Sheet Integrated Circuit Systems, Inc. PLL Simulator Tool Available A free PC software utility is available on the ICS website (www.icst.com). The M2000 Timing Modules PLL Simulator is a downloadable application that simulates PLL jitter and wander transfer characteristics. This enables the user to set appropriate external loop component values in a given application. Refer to the SAW PLL Simulator Software web page at www.icst.com/products/calculators/m2000filterSWdesc.htm for additional information. The ICS web site (www.icst.com) also has application notes on:

• PCB layout guidelines (including special detailed instructions for preventing issues such as external reference crosstalk)
• Any new special device application details that may become available
• Instructions for using PLL simulator software
• Guidelines for PCB fabrication (including recom- mended PCB footprint, solder mask, and furnace profile) Refer to the SAW PLL Application Notes web page at www.icst.com/products/appnotes/SawPllAppNotes.htm for application notes and any additional product information that may become available. ABSOLUTE MAXIMUM RATINGS1 Symbol Parameter Rating Unit VI Input Voltage -0.5 to VCC +0.5 V VO Output Voltage -0.5 to VCC +0.5 V I O Output Current 25 mA VCC Power Supply Voltage 4.6 V TS Storage Temperature -45 to +100 oC Table 5: Absolute Maximum Ratings Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. RECOMMENDED CONDITIONS OF OPERATION Symbol Parameter Min Typ Max Unit VCC Positive Supply Voltage 3.135 3.3 3.465 V TA Ambient Operating Temperature Commercial 0 +70 oC Industrial -40 +85 oC Table 6: Recommended Conditions of Operation

M902-01 Datasheet Rev 2.1 6 of 8 Revised 24Jun2004 Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400 Integrated Circuit Systems, Inc. M902-01 VCSO BASED GBE CLOCK GENERATOR Product Data Sheet ELECTRICAL SPECIFICATIONS DC Characteristics Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1, LVPECL outputs terminated with 50Ω to VCC - 2V Symbol Parameter Min Typ Max Unit Power Supply V CC Positive Supply Voltage 3.135 3.3 3.465 V ICC Power Supply Current 300 mA Logic Inputs V IH Input High Voltage EN_EXT_CLK, EXT_CLK, STOP 2 Vcc +0.3 V VIL Input Low Voltage - 0.3 0.8 V IIH Input High Current 150 µA IIL Input Low Current - 5.0 µA Reference Clock Input V IH Input High Voltage XTAL_1 / REF_IN (XTAL_2 disconnected) (Vcc / 2 ) +0.5 Vcc +0.3 V VIL Input Low Voltage - 0.3 (Vcc / 2 ) -0.5 V IIH Input High Current 150 µA IIL Input Low Current - 5.0 µA All Inputs C IN Input Capacitance, All Inputs EN_EXT_CLK, EXT_CLK, STOP , XTAL_1 / REF_IN, XTAL_2 4 pF Pull-down R pulldown Internal Pull-down Resistor EN_EXT_CLK, STOP 51 kΩ Differential Output VOH Output High Voltage FOUT, nFOUT (0-1) Vcc -1.4 Vcc -1.0 V VOL Output Low Voltage V cc -2.0 Vcc -1.7 V VP-P Peak to Peak Output Voltage 0.5 0.85 V Table 7: DC Characteristics Note 1: See Ordering Information on pg. 8 AC Characteristics Unless stated otherwise, VCC = 3.3V +5%,TA = 0 oC to +70 oC (commercial)1, TA = -40 oC to +85 oC (industrial)1, Output Frequency=156.25MHz1, LVPECL outputs terminated with 50Ω to VCC - 2V Symbol Parameter Min Typ Max Unit Test Conditions FOUT Output Frequency Range 125 156.25 190 MHz FIN Nominal Input Frequency, XTAL_1 / REF_IN 25 MHz APR VCSO Pull-Range ±100 ±150 ppm Φn Single Side Band Phase Noise 156.25MHz 1kHz Offset - 90 dBc/Hz 10kHz Offset - 110 dBc/Hz 100kHz Offset - 135 dBc/Hz J(t) Jitter (rms) 0.5 1.0 ps 12kHz to 20MHz tDC Output Duty Cycle, High Time 45 50 55 % tR Output Rise Time FOUT, nFOUT (0-1) 350 450 550 ps 20% to 80% tF Output Fall Time FOUT, nFOUT (0-1) 350 450 550 ps 20% to 80% tS Output Skew Between Any Pair 100 ps EXT_CLK Frequency EXT_CLK 0 2 0 0 MHz Table 8: AC Characteristics Note 1: See Ordering Information on pg. 8

M902-01 Datasheet Rev 2.1 7 of 8 Revised 24Jun2004 Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400 M902-01 VCSO BASED GBE CLOCK GENERATOR Product Data Sheet Integrated Circuit Systems, Inc. DEVICE PACKAGE - 9 x 9mm CERAMIC LEADLESS CHIP CARRIER Mechanical Dimensions: Figure 6: Device Package - 9 x 9mm Ceramic Leadless Chip Carrier Refer to the M902-01 product web page at www.icst.com/products/summary/m902-01.htm for recommended PCB footprint, solder mask, furnace profile, and related information.

M902-01 Datasheet Rev 2.1 8 of 8 Revised 24Jun2004 Integrated Circuit Systems, Inc. ● Networking & Communications ● www.icst.com ● tel (508) 852-5400 Integrated Circuit Systems, Inc. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which wou ld result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices o r critical medical instruments. M902-01 VCSO BASED GBE CLOCK GENERATOR Product Data Sheet

ORDERING INFORMATION

Figure 7: Part Numbering Scheme Consult factory for frequency availability. Part Number: M902- 01 - xxx.xxxx Output Frequency (MHz) “ - ” = 0 to +70 oC (commercial) See Table 9, right. Consult ICS for other frequencies. I = - 40 to +85 oC (industrial) Temperature Device Number Example Part Numbers Output Freq. (MHz) Temperature Order Part Number 125.00 commercial M902-01 - 125.0000 industrial M902-01I125.0000 156.25 commercial M902-01 - 156.2500 industrial M902-01I156.2500 187.50 commercial M902-01 - 187.5000 industrial M902-01I187.5000 Table 9: Example Part Numbers