M830D

M830 ICST | Alldatasheet

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Micro Networks 324 Clark Street Worcester, MA 01 606 tel: 508-852-5400 fax: 508-852-8456 www.micronetworks.com M830 Series Preliminary Specifications Micro Networks An Integrated Circuit Systems Company ISO 9001 Registered ISO 9001 Registered The M830 Series CDR module is specifically designed to regenerate the spectral clock component from an incoming NRZ data stream, incorporating forward error correction, and output a low-jitter clock and retimed complementary data. The module utilizes a phase-locked loop architecture incorporating a high-stability, low noise SAW VCO to provide extremely low jitter clock and data outputs. The incoming data is frequency doubled to recover the clock component. The clock signal is then filtered by a microwave band pass filter to remove wide band noise and spurious signal. This signal is further filtered using the narrow band SAW VCO based PLL to minimize the noise close to the carrier. The low jitter clock is then used to retime the data and serves as the module’s clock output. The module provides user- controlled clock phase shifter and output data crossover adjustments to optimize system performance. PLL lock-in range and loop transfer characteristics are optimized for minimal jitter in accordance with ITU and Bellcore standards for SONET/SDH systems. Superior PLL-based jitter performance 8psec p-p jitter 0.9Vp-p complementary data outputs

1 Ul externally adjustable clock phase

200mVp-p input sensitivity Optional adjustable bias @ data input to decision circuit Externally adjustable decision threshold SONET OC-192 and SDH STM Physical Layer and Clock and Data Recovery Applications Incorporating Forward Error Correction Power Supply Voltage ABSOLUTE MAX RATINGSAPPLICATIONS

FEATURES

DESCRIPTION

12.249Gb/s OC-192 Clock & Data Recovery Transmitter Module M830 Series

Micro Networks 324 Clark Street Worcester, MA 01 606 tel: 508-852-5400 fax: 508-852-8456 www.micronetworks.com M830 Series Preliminary Specifications Micro Networks An Integrated Circuit Systems Company SPECIFICATIONS Specifications @ Vcc = +5.0 Volts, Vee = -5.0 Volts, Data in = 231-1 PRBS NRZ, Mark ratio = 1:2, and TA = +25°C unless otherwise specified PARAMETER Min Typ Max Units Condition Data Rate 12.2493 Gb/s NRZ Data Input Level 200 600 mVp-p Single-ended, 50 Ω, AC coupled Data Input Return Loss 10 12 dB 50MHz to 7GHz Data Output Voltage 750 900 1100 mVp-p Data & Data Data Output Jitter 7.5 10 psec p-p 2 7–1 PRBS NRZ Data Output Duty Cycle Distortion 2.5 5 % Data Output Rise Time (20% to 80%) 25 35 psec 50 Ω, AC coupled Data Output Fall Time (80% to 20%) 25 35 psec 50 Ω, AC coupled Data Output Return Loss 10 12 dB 50MHz to 9GHz PLL Loop BW .3 MHz Decision Threshold Control 10 90 % Relative to max Data Input Voltage Ref -0.2 to -0.75V Decision Threshold Control Voltage Range -0.75 -0.2 Volts Internal load of 45 Ω to -0.45V Clock Output Level 800 1200 1400 mVp-p 50 Ω, AC coupled Clock Phase Control 1 UI Clock Phase Control Voltage 0 +15 Volts 10k Ω, minimum load impedance Clock SSB Phase Noise @100Hz Offset -70 dBc/Hz 2 31–1 PRBS NRZ @1kHz Offset -85 dBc/Hz @10kHz Offset -90 dBc/Hz Clock Jitter 7.5 9 psec p-p 2 7–1 PRBS NRZ Spurious Output -50 dBc Harmonic Output -30 dBc Supply Voltage Vcc +4.75 +5.0 +5.25 Volts Vee -5.25 -5.0 -4.75 Volts Supply Current Icc 450 600 mA Iee 300 550 mA

Micro Networks 324 Clark Street Worcester, MA 01 606 tel: 508-852-5400 fax: 508-852-8456 www.micronetworks.com M830 Series Preliminary Specifications Micro Networks An Integrated Circuit Systems Company BLOCK DIAGRAM The M830 clock and data recovery module has a SAW VCO based phase-locked loop architecture. The 1.225GHz fundamental VCO is implemented as a transmission oscillator. The oscillator loop includes the SAW resonator that has a linear phase with frequency characteristic, a linear voltage controlled phase shifter, loop amplifier, and power divider to couple signal from the loop. The oscillator is frequency doubled to 2.450GHz and band pass filtered. The 2.450GHz is then multiplied by five to the final frequency of 12.25GHz. The output of the VCO is power divided to provide an input to the phase detector and a clock signal. The input data is power divided to provide inputs to the decision circuit and the clock recovery circuitry. The input to the clock recovery circuit is amplified and applied to an analog frequency doubler to extract a clock spectral component from the NRZ data input stream. The 12.25GHz doubler output is band pass filtered and amplified. One VCO output and the clock extracted from the input data serve as inputs to a microwave phase detector. The phase detector output is applied to an integrator circuit. The integrator output controls the phase shifter in the SAW VCO, completing the phase- lock loop. The phase-locked loop causes the low noise VCO output to be phase-locked to the clock signal extracted from the NRZ input data, providing a low jitter clock signal. The clock signal is applied to a phase shifter that allows the timing between the input data and clock to be adjusted for optimum performance. The phase shifter output is amplified and band pass filtered to provide a low jitter and low spurious clock. The clock is power divided to provide the clock output of the module and the clock input to the decision circuit. The decision circuit is a high speed D flip-flop. In addition to the clock and data inputs, a user adjustable decision threshold voltage is available. This voltage is used to optimize the retimed data. The CDR threshold and phase shifter do not require adjustment over the temperature and input data level ranges. The clock output of the CDR is a low spurious sinusoidal signal and the complementary data outputs are AC coupled ECL signals. DC coupled ECL compatible data outputs are available.

Micro Networks 324 Clark Street Worcester, MA 01 606 tel: 508-852-5400 fax: 508-852-8456 www.micronetworks.com M830 Series Preliminary Specifications Micro Networks An Integrated Circuit Systems Company Data Output Eye Diagram DATA OUTPUT EYE DIAGRAM Narrow Band Clock Spectrum Wide Band Clock Output Spectrum CLOCK SPECTRUM

Micro Networks 324 Clark Street Worcester, MA 01 606 tel: 508-852-5400 fax: 508-852-8456 www.micronetworks.com M830 Series Preliminary Specifications Micro Networks An Integrated Circuit Systems Company ORDERING INFORMATION & MECHANICAL DIMENSIONS Part Number: M830 X XXXXX.XX X X Series No of Inputs D = Single Input Frequency Temperature Range K = 0 to +70°C Package Type C = Case/Module Package [7.1] 6X .28 [6.8] .27 [6.8] .27 [15.7] .62 [4.6].18 [30.5] 1.20 MAX [3.18] .125 [7.4] .29 [14.0] .55 [36.8] 1.45 [9.1] .36 MOUNTING HOLES [Ø 3.25-3.40] 4X Ø .128-.134 THRU MAX [48.0] 1.89 MAX [19.3] .76 REF [.76] 6X .03 [É”.76] 6X Ø .03 [57.79] 2X 2.275 [2.54] 2X .100 [42.54] 2X 1.675 [2.54] 2X .100 MAX [63.3] 2.49 [37.4] 1.47 [24.1] .95 [10.9] .43 -5V +5V DEC LOC ADJ-5V REF PHASE -5V -5VREFADJ PHASE DEC DATA OUT DATA OUT CLK OUT +5V LOC DATA IN 4X SMA CONN FL HD SCR'S REF 2X LABEL .54 [13.8] .39 [9.8] .23 [5.84] .29 [7.4] Micro Networks makes no assertion or warranty that the circuitry and the uses thereof disclosed herein are non-infringing on any valid US or foreign patents. Micro Networks assumes no liability as a result of the use of said specifications and reserves the right to make changes to specifications without notice. Contact your nearest Micro Networks sales representative office for the latest specifications. Micro Networks An Integrated Circuit Systems Company

324 Clark Street Worcester, MA 01 606 tel: 508-852-5400 fax: 508-852-8456

European Sales Headquarters Hertogsingel 20 621 4 AD Maastricht The Netherlands tel: +31-43-32-7091 2 fax: +31-43-32-707 1 5 www.micronetworks.com Rev. 15.0 PIN DESCRIPTIONS Symbol Name Description DATA IN Data Input AC coupled 50 Ω data input DATA OUT Data Output AC coupled 50 Ω data output (non-inverted) DATA OUT Data Output AC coupled 50 Ω data output (inverted) CLK OUT Clock Output AC coupled 50 Ω clock output (sinusoidal) PHASE ADJ Phase Shift User input to phase shift the recovered clock over Adjust a 100ps range. The control voltage range is 0 to 15V. REF Decision Threshold User input to adjust the decision circuit Adjustment threshold. The control range is -0.2V to -0.75V. LOC DEC Lock Detect TTL output indicating PLL loss of lock. TTL “1” indicates lock. TTL “0” indicates loss of lock. +5V +5V Power Supply Positive power supply input. -5V -5V Power Supply Negative power supply input. GND Power Supply Ground lug to allow connection of power supply Ground Connection returns to case ground.

Micro Networks Corporation Worldwide Headquarters

324 Clark Street Worcester, MA 01 606 USA

tel: 508-852-5400 fax: 508-852-8456 European Sales Headquarters Hertogsingel 20 621 4 AD Maastricht The Netherlands tel: +31-43-32-7091 2 fax: +31-43-32-707 1 5 www.micronetworks.com Micro Networks An Integrated Circuit Systems Company