Power Management

LTM4601

Linear Technology

12A Module Regulators with PLL, Output Tracking and Margining

Manufacturer: Linear Technology

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4601feFor more information www.linear .com/L TM4601 12A µModule Regulators with PLL, Output Tracking and Margining n Telecom and Networking Equipment n Servers n Industrial Equipment n Point of Load Regulation n Complete Switch Mode Power Supply n Wide Input Voltage Range: 4.5V to 20V n 12A DC Typical, 14A Peak Output Current n 0.6V to 5V Output Voltage n Output Voltage T racking and Margining n Parallel Multiple µModule Regulators for Current Sharing n Differential Remote Sensing for Precision Regulation (L TM4601 Only) n PLL Frequency Synchronization n ±1.5% Regulation n Current Foldback Protection (Disabled at Start-Up) n SnPb or RoHS Compliant Finish n UltraFast™ T ransient Response n Current Mode Control n Up to 95% Efficiency at 5VIN, 3.3VOUT n Programmable Soft-Start n Output Overvoltage Protection n Small Footprint, Low Profile (15mm × 15mm × 2.82mm) Surface Mount LGA and (15mm × 15mm × 3.42mm) BGA Packages 1.5V/12A Power Supply with 4.5V to 20V Input Efficiency and Power Loss vs Load Current The LT M®4601 is a complete 12A step-down switch mode DC/DC power supply with onboard switching controller , MOSFETs, inductor and all support components. The µModule ® regulator is housed in small surface mount 15mm × 15mm × 2.82mm LGA and 15mm × 15mm × 3.42mm BGA packages. Operating over an input voltage range of 4.5V to 20V , the L TM4601 supports an output voltage range of 0.6V to 5V as well as output voltage tracking and margining. The high efficiency design deliv- ers 12A continuous current (14A peak). Only bulk input and output capacitors are needed to complete the design. The low profile and light weight package easily mounts in unused space on the back side of PC boards for high density point of load regulation. The µModule regulator can be synchronized with an external clock for reducing undesirable frequency harmonics and allows PolyPhase operation for high load currents. A high switching frequency and adaptive on-time current mode architecture deliver a very fast transient response to line and load changes without sacrificing stability. An onboard differential remote sense amplifier can be used to accurately regulate an output voltage independent of load current. The onboard remote sense amplifier is not available in the L TM4601-1. L, L T , L TC, L TM, Linear Technology, the Linear logo, µModule and PolyPhase are registered trademarks and UltraFast and L TpowerCAD are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210. Typical applicaTion FeaTures DescripTion

applicaTions

VOUT_LCL DIFFVOUT VOSNS+ VOSNS– PGOOD RUN COMP INTV CC DRVCC MPGM TRACK/SSPLLIN LTM4601 ON/OFF 392k RSET 40.2k MARGIN CONTROL C OUT

4601 TA01a

1.5V 12A CLOCK SYNC TRACK/SS CONTROL 100pF CIN VIN fSETPGNDSGND 5% MARGIN VIN 4.5V TO 20V LOAD CURRENT (A) EFFICIENCY (%) POWER LOSS (W)

4601 TA01b

0.5 1.0 2.0 4.0 1.5 2.5 3.0 3.5 12VIN 12VIN 5VIN 5VIN EFFICIENCY POWER LOSS

4601fe For more information www.linear .com/L TM4601 INTVCC, DRVCC, VOUT_LCL, VOUT (VOUT ≤ 3.3V with PLLIN, TRACK/SS, MPGM, MARG0, MARG1, .3V to 5V (Note 1) absoluTe MaxiMuM raTings Operating Temperature Range (Note 2)....–40°C to 85°C 25°C 55°C to 125°C MARG1 DRVCC VFB PGOOD SGND VOSNS+/NC2* DIFFVOUT/NC3* VOUT_LCL VOSNS–/NC1* VIN PGND VOUT fSET MARG0 RUN COMP MPGM PLLIN INTV CC TRACK/SS LGA PACKAGE 118-LEAD (15mm × 15mm × 2.82mm) TOP VIEW TJMAX = 125°C, θJA = 15°C/W , θJC = 6°C/W , θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS WEIGHT = 1.7g *LTM4601-1 ONL Y MARG1 DRVCC VFB PGOOD SGND VOSNS+/NC2* DIFFVOUT/NC3* VOUT_LCL VOSNS–/NC1* VIN PGND VOUT fSET MARG0 RUN COMP MPGM PLLIN INTV CC TRACK/SS BGA PACKAGE 118-LEAD (15mm × 15mm × 3.42mm) TOP VIEW TJMAX = 125°C, θJA = 15.5°C/W , θJC = 6.5°C/W , θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS WEIGHT = 1.9g *LTM4601-1 ONL Y pin conFiguraTion orDer inForMaTion PART NUMBER PAD OR BALL FINISH PART MARKING* PACKAGE TYPE MSL RATING TEMPERATURE RANGE (Note 2)DEVICE FINISH CODE L TM4601EV#PBF Au (RoHS) L TM4601V e4 LGA 3 –40°C to 85°C L TM4601IV#PBF Au (RoHS) L TM4601V e4 LGA 3 –40°C to 85°C L TM4601EV-1#PBF Au (RoHS) L TM4601V-1 e4 LGA 3 –40°C to 85°C L TM4601IV-1#PBF Au (RoHS) L TM4601V-1 e4 LGA 3 –40°C to 85°C L TM4601EY#PBF SAC305 (RoHS) L TM4601Y e1 BGA 3 –40°C to 85°C L TM4601IY#PBF SAC305 (RoHS) L TM4601Y e1 BGA 3 –40°C to 85°C L TM4601EY-1#PBF SAC305 (RoHS) L TM4601Y-1 e1 BGA 3 –40°C to 85°C L TM4601IY-1#PBF SAC305 (RoHS) L TM4601Y-1 e1 BGA 3 –40°C to 85°C L TM4601IY SnPb (63/37) L TM4601Y e0 BGA 3 –40°C to 85°C L TM4601IY-1 SnPb (63/37) L TM4601Y-1 e0 BGA 3 –40°C to 85°C

4601feFor more information www.linear .com/L TM4601

elecTrical characTerisTics

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN(DC) Input DC Voltage l 4.5 20 V VOUT(DC) Output Voltage CIN = 10µF ×3, COUT = 200µF , RSET = 40.2k VIN = 5V , VOUT = 1.5V , IOUT = 0A VIN = 12V , VOUT = 1.5V , IOUT = 0A l l 1.478 1.478 1.5 1.5 1.522 1.522 V V Input Specifications V IN(UVLO) Undervoltage Lockout Threshold I OUT = 0A 3.2 4 V IINRUSH(VIN) Input Inrush Current at Start-Up I OUT = 0A. VOUT = 1.5V VIN = 5V VIN = 12V 0.6 0.7 A A I Q(VIN,NOLOAD) Input Supply Bias Current VIN = 12V , No Switching VIN = 12V , VOUT = 1.5V , Switching Continuous VIN = 5V , No Switching VIN = 5V , VOUT = 1.5V , Switching Continuous Shutdown, RUN = 0, VIN = 12V 3.8 2.5 mA mA mA mA µA I S(VIN) Input Supply Current VIN = 12V , VOUT = 1.5V , IOUT = 12A VIN = 12V , VOUT = 3.3V , IOUT = 12A VIN = 5V , VOUT = 1.5V , IOUT = 12A 1.81 3.63 4.29 A A A INTV CC VIN = 12V , RUN > 2V No Load 4.7 5 5.3 V Output Specifications IOUTDC Output Continuous Current Range V IN = 12V , VOUT = 1.5V (Note 6) 0 12 A ΔVOUT(LINE) VOUT Line Regulation Accuracy VOUT = 1.5V , IOUT = 0A, VIN from 4.5V to 20V l 0.3 % ΔVOUT(LOAD) VOUT Load Regulation Accuracy V OUT = 1.5V , 0A to 12A (Note 6) VIN = 12V , with Remote Sense Amplifier VIN = 12V (L TM4601-1) l l 0.25 VOUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 2× 100µF X5R Ceramic VIN = 12V , VOUT = 1.5V VIN = 5V , VOUT = 1.5V mV P-P mVP-P fS Output Ripple Voltage Frequency I OUT = 5A, VIN = 12V , VOUT = 1.5V 850 kHz ΔVOUT(START) Turn-On Overshoot COUT = 200µF , VOUT = 1.5V , IOUT = 0A, TRACK/SS = 10nF VIN = 12V VIN = 5V mV mV t START Turn-On Time COUT = 200µF , VOUT = 1.5V , TRACK/SS = Open, IOUT = 1A Resistive Load VIN = 12V VIN = 5V 0.5 0.5 ms ms The l denotes the specifications which apply over the –40°C to 85°C temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V , per typical application (front page) configuration. Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container . Pad or ball finish code is per IPC/JEDEC J-STD-609.

Terminal Finish Part Marking: www.linear .com/leadfree
Recommended LGA and BGA PCB Assembly and Manufacturing Procedures: www.linear .com/umodule/pcbassembly
LGA and BGA Package and Tray Drawings: www .linear .com/packaging orDer inForMaTion

4601fe For more information www.linear .com/L TM4601 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ΔVOUTLS Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, COUT = 2 × 22µF Ceramic, 470µF 4V Sanyo POSCAP VIN = 12V VIN = 5V mV mV t SETTLE Settling Time for Dynamic Load Step Load: 0% to 50%, or 50% to 0% of Full Load VIN = 12V µs IOUTPK Output Current Limit COUT = 200µF Ceramic VIN = 12V , VOUT = 1.5V VIN = 5V , VOUT = 1.5V A A Remote Sense Amp (Note 3) (L TM4601 Only , Not Supported in the L TM4601-1) VOSNS+, VOSNS– CM Range Common Mode Input Voltage Range VIN = 12V , RUN > 2V 0 INTVCC – 1 V DIFFVOUT Range Output Voltage Range VIN = 12V , DIFFVOUT Load = 100k 0 INTVCC – 1 V VOS Input Offset Voltage Magnitude 1.25 mV AV Differential Gain 1 V/V GBP Gain Bandwidth Product 3 MHz SR Slew Rate 2 V/µs RIN Input Resistance VOSNS+ to GND 20 kW CMRR Common Mode Rejection Mode 100 dB Control Stage VFB Error Amplifier Input Voltage Accuracy IOUT = 0A, VOUT = 1.5V l 0.594 0.6 0.606 V VRUN RUN Pin On/Off Threshold 1 1.5 1.9 V ITRACK/SS Soft-Start Charging Current V TRACK/SS = 0V –1.0 –1.5 –2.0 µA tON(MIN) Minimum On Time (Note 4) 50 100 ns tOFF(MIN) Minimum Off Time (Note 4) 250 400 ns RPLLIN PLLIN Input Resistance 50 kW IDRVCC Current into DRVCC Pin VOUT = 1.5V , IOUT = 1A, DRVCC = 5V 18 25 mA RFBHI Resistor Between VOUT_LCL and VFB 60.098 60.4 60.702 kW VMPGM Margin Reference Voltage 1.18 V VMARG0, VMARG1 MARG0, MARG1 Voltage Thresholds 1.4 V PGOOD Output ΔVFBH PGOOD Upper Threshold VFB Rising 7 10 13 % ΔVFBL PGOOD Lower Threshold VFB Falling –7 –10 –13 % ΔVFB(HYS) PGOOD Hysteresis VFB Returning 1.5 % Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L TM4601 is tested under pulsed load conditions such that T J ≈ TA. The L TM4601E/L TM4601E-1 are guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The L TM4601I/L TM4601I-1 are guaranteed over the –40°C to 85°C operating temperature range. Note 3: Remote sense amplifier recommended for ≤3.3V output. Note 4: 100% tested at wafer level only. Note 5: Limit current into RUN pin to less than 1mA. Note 6: See output current derating curves for different V IN, VOUT and TA. elecTrical characTerisTics The l denotes the specifications which apply over the –40°C to 85°C temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V , per typical application (front page) configuration.

4601feFor more information www.linear .com/L TM4601 Efficiency vs Load Current with 5VIN Efficiency vs Load Current with 12VIN Efficiency vs Load Current with 20VIN 1.2V T ransient Response 1.5V T ransient Response 2.5V T ransient Response 3.3V T ransient Response 1.8V T ransient Response Typical perForMance characTerisTics (See Figure 18 for all curves) VOUT 50mV/DIV 20µs/DIV 4601 G04 0A TO 6A LOAD STEP 1.2V AT 6A/µs LOAD STEP COUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601 G05 0A TO 6A LOAD STEP 1.5V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601 G06 0A TO 6A LOAD STEP 1.8V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601 G07 0A TO 6A LOAD STEP 2.5V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601 G08 0A TO 6A LOAD STEP 3.3V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF LOAD CURRENT (A) EFFICIENCY (%)75

4601 G01

0.6VOUT 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT LOAD CURRENT (A) EFFICIENCY (%) 100 5 10

4601 G02

0.6VOUT 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT 5VOUT LOAD CURRENT (A) 100

4601 G03

EFFICIENCY (%) 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT 5.0VOUT

4601fe For more information www.linear .com/L TM4601 Start-Up, IOUT = 12A (Resistive Load)Start-Up, IOUT = 0A VIN to VOUT Step-Down Ratio Short-Circuit Protection, IOUT = 0A Short-Circuit Protection, IOUT = 12A T rack, IOUT = 12A Typical perForMance characTerisTics (See Figure 18 for all curves) VOUT 0.5V/DIV 5ms/DIV 4601 G09 IIN 0.5A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF VOUT 0.5V/DIV 2ms/DIV 4601 G10 IIN 1A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF INPUT VOL TAGE (V) OUTPUT VOL TAGE (V) 3.0 4.0 5.5 5.0

4601 G11

2.0 1.0 2.5 3.5 4.5 1.5 0.5 4 2 8 6 12 14 1810 20 3.3V OUTPUT WITH 130k FROM VOUT TO ION 5V OUTPUT WITH 100k RESISTOR ADDED FROM fSET TO GND 5V OUTPUT WITH NO RESISTOR ADDED FROM fSET TO GND 2.5V OUTPUT 1.8V OUTPUT 1.5V OUTPUT 1.2V OUTPUT VOUT 0.5V/DIV 50µs/DIV 4601 G13 IIN 1A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF VFB 0.5V/DIV TRACK/SS 0.5V/DIV 2ms/DIV 4601 G12 VOUT 1V/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF VOUT 0.5V/DIV 50µs/DIV 4601 G14 IIN 1A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF

4601feFor more information www.linear .com/L TM4601 pin FuncTions (See Package Description for Pin Assignment) VIN (Bank 1): Power Input Pins. Apply input voltage be - tween these pins and PGND pins. Recommend placing input decoupling capacitance directly between V IN pins and PGND pins. VOUT (Bank 3): Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing output decoupling capacitance directly between these pins and PGND pins. See Figure 15. PGND (Bank 2): Power ground pins for both input and output returns. V OSNS– (Pin M12): (–) Input to the Remote Sense Ampli- fier . This pin connects to the ground remote sense point. The remote sense amplifier is used for VOUT ≤3.3V . Tie to INTVCC if not used. NC1 (Pin M12): No internal connection on the L TM4601-1. VOSNS+ (Pin J12): (+) Input to the Remote Sense Ampli- fier . This pin connects to the output remote sense point. The remote sense amplifier is used for VOUT ≤3.3V . Tie to ground if not used. NC2 (Pin J12): No internal connection on the L TM4601-1. DIFFV OUT (Pin K12): Output of the Remote Sense Ampli- fier . This pin connects to the VOUT_LCL pin. Leave floating if not used. NC3 (Pin K12): No internal connection on the L TM4601-1. DRV CC (Pin E12): This pin normally connects to INTV CC for powering the internal MOSFET drivers. This pin can be biased up to 6V from an external supply with about 50mA capability, or an external circuit as shown in Figure 16. This improves efficiency at the higher input voltages by reducing power dissipation in the module. INTV CC (Pin A7): This pin is for additional decoupling of the 5V internal regulator . PLLIN (Pin A8): External Clock Synchronization Input to the Phase Detector . This pin is internally terminated to SGND with a 50k resistor . Apply a clock with a high level above 2V and below INTV CC. See the Applications Information section. TRACK/SS (Pin A9): Output Voltage T racking and Soft- Start Pin. When the module is configured as a master output, then a soft-start capacitor is placed from this pin to ground to control the master ramp rate. A soft-start capacitor can also be used for soft-start turn-on of a stand alone regulator . Slave operation is performed by putting a resistor divider from the master output to the ground, and connecting the center point of the divider to this pin. See the Applications Information section. MPGM (Pin A12): Programmable Margining Input. A re- sistor from this pin to ground sets a current that is equal to 1.18V/R. This current multiplied by 10k W will equal a value in millivolts that is a per centage of the 0.6V refer- ence voltage. See the Applications Information section. To parallel L TM4601s, each requires an individual MPGM resistor . Do not tie MPGM pins together . fSET (Pin B12): Frequency Set Internally to 850kHz. An external resistor can be placed from this pin to ground to increase frequency. See the Applications Information section for frequency adjustment. V FB (Pin F12): The Negative Input of the Error Amplifier . Internally, this pin is connected to V OUT_LCL pin with a 60.4k precision resistor . Different output voltages can be programmed with an additional resistor between VFB and SGND pins. See the Applications Information section. MARG0 (Pin C12): This pin is the LSB logic input for the margining function. Together with the MARG1 pin it will determine if margin high, margin low or no margin state is applied. The pin has an internal pull-down resistor of 50k. See the Applications Information section. MARG1 (Pin D12): This pin is the MSB logic input for the margining function. Together with the MARG0 pin it will determine if margin high, margin low or no margin state is applied. The pin has an internal pull-down resistor of 50k. See the Applications Information section.

4601fe For more information www.linear .com/L TM4601 SGND (Pin H12): Signal Ground. This pin connects to PGND at output capacitor point. See Figure 15. COMP (Pin A11): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V with 0.7V corresponding to zero sense voltage (zero current). PGOOD (Pin G12): Output Voltage Power Good Indicator . Open-drain logic output that is pulled to ground when the output voltage is not within ±10% of the regulation point, after a 25µs power bad mask timer expires. RUN (Pin A10): Run Control Pin. A voltage above 1.9V will turn on the module, and when below 1V , will turn off the module. A programmable UVLO function can be accomplished by connecting to a resistor divider from V IN to ground. See Figure 1. This pin has a 5.1V Zener to ground. Maximum pin voltage is 5V . Limit current into the RUN pin to less than 1mA. V OUT_LCL (Pin L12): V OUT connects directly to this pin to bypass the remote sense amplifier , or DIFFVOUT con- nects to this pin when the remote sense amplifier is used. VOUT_LCL can be connected to V OUT on the L TM4601-1, VOUT is internally connected to VOUT_LCL with 50W in the L TM4601-1. pin FuncTions (See Package Description for Pin Assignment)

Figure 1. Simplified L TM4601/L TM4601-1 Block Diagram

4601 F01

4601fe For more information www.linear .com/L TM4601 Power Module Description The L TM4601 is a standalone nonisolated switching mode DC/DC power supply. It can deliver up to 12A of DC output current with some external input and output capacitors. This module provides a precisely regulated output voltage programmable via one external resistor from 0.6V DC to 5.0VDC over a 4.5V to 20V wide input voltage. The typical application schematic is shown in Figure 18. The L TM4601 has an integrated constant on-time current mode regulator , ultralow RDS(ON) FETs with fast switch - ing speed and integrated Schottky diodes. The typical switching frequency is 850kHz at full load. With current mode control and internal feedback loop compensation, the L TM4601 module has sufficient stability margins and good transient performance under a wide range of operat- ing conditions and with a wide range of output capacitors, even all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit. Besides, foldback current limiting is provided in an overcurrent condition while V FB drops. Internal overvolt- age and undervoltage comparators pull the open-drain PGOOD output low if the output feedback voltage exits a ±10% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET Q1 is turned off and bottom FET Q2 is turned on and held on until the over voltage condition clears. Pulling the RUN pin below 1V forces the controller into its shutdown state, turning off both Q1 and Q2. At low load current, the module works in continuous current mode by default to achieve minimum output ripple voltage. When DRV CC pin is connected to INTV CC an integrated 5V linear regulator powers the internal gate drivers. If a 5V external bias supply is applied on the DRVCC pin, then an efficiency improvement will occur due to the reduced power loss in the internal linear regulator . This is especially true at the high end of the input voltage range. The L TM4601 has a very accurate differential remote sense amplifier with very low offset. This provides for very accurate output voltage sensing at the load. The MPGM pin, MARG0 pin and MARG1 pin are used to sup- port voltage margining, where the percentage of margin is programmed by the MPGM pin, and the MARG0 and MARG1 select margining. The PLLIN pin provides frequency synchronization of the device to an external clock. The TRACK/SS pin is used for power supply tracking and soft-start programming. operaTion

mined by the maximum load current and output voltage. for a particular application. down ratio that can be achieved for a given input voltage. The PWM controller has an internal 0.6V reference voltage. Table 1. RSET Standard 1% Resistor Values vs VOUT RPGM resistor on the MPGM pin programs the current.

10k where RPGM is the resistor value to place on the MPGM pin to ground. The margining voltage, V OUT(MARGIN), will be added or subtracted from the nominal output voltage as determined by the state of the MARG0 and MARG1 pins. See the truth table below: MARG1 MARG0 MODE LOW LOW NO MARGIN LOW HIGH MARGIN UP HIGH LOW MARGIN DOWN HIGH HIGH NO MARGIN Input Capacitors L TM4601 module should be connected to a low AC imped- ance DC source. Input capacitors are required to be placed adjacent to the module. In Figure 18, the 10µF ceramic input capacitors are selected for their ability to handle the large RMS current into the converter . An input bulk capacitor of 100µF is optional. This 100µF capacitor is only needed if the input source impedance is compromised by long inductive leads or traces. applicaTions inForMaTion

tion of duty cycle and the number of paralleled phases. current for the external input capacitors. The L TM4601 is designed for low output ripple voltage. voltage droop and overshoot during a 5A/µs transient. capacitance to maximize transient performance. Figure 2. Normalized Input RMS Ripple Current

4601 F02

duty cycle is ~6A in Figure 3. ripple current reduction as a function of paralleled phases. series resistance (ESR) of the output bulk capacitance. Figure 4. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI, Dlr = Each Phase’s Inductor Current Figure 3. Inductor Ripple Current vs Duty Cycle

4601 F03

4601 F04

steady-state operation, but also in response to transients. of its full current limit value. Figure 5. Coincident T racking Schematic Figure 6. Coincident Output T racking Characteristics

4601 F06

4601 F05

4601feFor more information www.linear .com/L TM4601 Run Enable The RUN pin is used to enable the power module. The pin has an internal 5.1V Zener to ground. The pin can be driven with a logic input not to exceed 5V . The RUN pin can also be used as an undervoltage lock out (UVLO) function by connecting a resistor divider from the input supply to the RUN pin: VUVLO = R1+R2 R2 •1.5V See Figure 1, Simplified Block Diagram. Power Good The PGOOD pin is an open-drain pin that can be used to monitor valid output voltage regulation. This pin monitors a ±10% window around the regulation point and tracks with margining. COMP Pin This pin is the external compensation pin. The module has already been internally compensated for most output voltages. Table 2 is provided for most application require- ments. L TpowerCAD is available for other control loop optimization. PLLIN The power module has a phase-locked loop comprised of an internal voltage controlled oscillator and a phase detector . This allows the internal top MOSFET turn-on to be locked to the rising edge of an external clock. The frequency range is ±30% around the operating frequency of 850kHz. A pulse detection circuit is used to detect a clock on the PLLIN pin to turn on the phase-locked loop. The pulse width of the clock has to be at least 400ns and at least 2V in amplitude. The PLLIN pin must be driven from a low impedance source such as a logic gate located close to the pin. During the start-up of the regulator , the phase-locked loop function is disabled. INTV CC and DRVCC Connection An internal low dropout regulator produces an internal 5V supply that powers the control circuitry and DRV CC for driving the internal power MOSFETs. Therefore, if the system does not have a 5V power rail, the L TM4601 can be directly powered by V IN. The gate driver current through the LDO is about 20mA. The internal LDO power dissipation can be calculated as: PLDO_LOSS = 20mA • (VIN – 5V) The L TM4601 also provides the external gate driver volt- age pin DRV CC. If there is a 5V rail in the system, it is recommended to connect DRV CC pin to the external 5V rail. This is especially true for higher input voltages. Do not apply more than 6V to the DRV CC pin. A 5V output can be used to power the DRV CC pin with an external circuit as shown in Figure 16. Parallel Operation of the Module The L TM4601 device is an inherently current mode con- trolled device. Parallel modules will have very good current sharing. This will balance the thermals on the design. The voltage feedback equation changes with the variable N as modules are paralleled: VOUT = 0.6V 60.4k N +RSET RSET N is the number of paralleled modules. Figure 19 shows an L TM4601 and an L TM4601-1 used in a parallel design. The 2nd L TM4601 device does not require the remote sense amplifier , therefore, the L TM4601-1 device is used. An L TM4601 device can be used without the diff amp. V OSNS+ can be tied to ground and the VOSNS– can be tied to INTVCC. DIFFVOUT can float. When using multiple L TM4601-1 devices in parallel with an L TM4601, limit the number to five for a total of six modules in parallel. applicaTions inForMaTion

Figure 7. 1.5V Power Loss Figure 8. 3.3V Power Loss Figure 9. No Heat Sink 5VIN Figure 10. BGA Heat Sink 5VIN the thermal models and the derating curves. µModule regulator below 125°C.

4601 F07

4601 F08

4600 F09

4601 F10

Figure 11. No Heat Sink 12VIN Figure 12. BGA Heat Sink 12VIN Figure 13. 12VIN, 3.3VOUT, No Heat Sink Figure 14. 12VIN, 3.3VOUT, BGA Heat Sink

4601 F11

4601 F12

4601 F13

4601 F14

Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 18), 0A to 6A Load Step

Use large PCB copper areas for high current path, in - cluding VIN, PGND and VOUT. It helps to minimize the PCB conduction loss and thermal stress.
Place high frequency ceramic input and output capaci- tors next to the VIN, PGND and VOUT pins to minimize high frequency noise.
Place a dedicated power ground layer underneath the unit. Refer frequency synchronization source to power ground. To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. Do not put vias directly on pads unless they are capped.
Use a separated SGND copper area for components connected to signal pins. Connect the SGND to PGND underneath the unit. Figure 15 gives a good example of the recommended layout. Frequency Adjustment The L TM4601 is designed to typically operate at 850kHz across most input conditions. The f SET pin is normally left open. The switching frequency has been optimized for maintaining constant output ripple noise over most operating ranges. The 850kHz switching frequency and the 400ns minimum off time can limit operation at higher duty cycles like 5V to 3.3V , and produce excessive induc- tor ripple currents for lower duty cycle applications like 20V to 5V . The 5V OUT and 3.3V OUT drop out curves are modified by adding an external resistor on the fSET pin to allow for lower input voltage operation, or higher input voltage operation. SIGNAL GND VOUT VIN GND COUT CIN CIN COUT

4601 F15

Figure 15. Recommended Layout (LGA and BGA PCB Layouts Are Identical

4601feFor more information www.linear .com/L TM4601 Example for 5V Output L TM4601 minimum on-time = 100ns tON = ((VOUT • 10pF)/IfSET), for VOUT > 4.8V use 4.8V . L TM4601 minimum off-time = 400ns tOFF = t – tON, where t = 1/Frequency Duty Cycle = tON/t or VOUT/VIN Equations for setting frequency: IfSET = (VIN/(3 • RfSET)), for 20V operation, IfSET = 170µA, tON = ((4.8 • 10pF)/IfSET), tON = 282ns, where the internal RfSET is 39.2k. Frequency = (VOUT/(VIN • tON)) = (5V/(20

282ns)) ~ 886kHz. The inductor ripple current begins to get high at the higher input voltages due to a larger voltage across the inductor . This is noted in the Inductor Ripple Current vs Duty Cycle graph (Figure 3) where IL ≈ 10A at 25% duty cycle. The inductor ripple current can be lowered at the higher input voltages by adding an external resistor from f SET to ground to increase the switching frequency. An 8A ripple current is chosen, and the total peak current is equal to 1/2 of the 8A ripple current plus the output current. The 5V output current is limited to 8A, so the total peak current is less than 12A. This is below the 14A peak specified value. A 100k resistor is placed from f SET to ground, and the parallel combination of 100k and 39.2k equates to 28k. The IfSET calculation with 28k and 20V input voltage equals 238µA. This equates to a tON of 200ns. This will increase the switching frequency from ~886kHz to ~1.25MHz for the 20V to 5V conversion. The minimum on-time is above 100ns at 20V input. Since the switching frequency is approximately constant over input and output conditions, then the lower input voltage range is limited to 10V for the 1.25MHz operation due to the 400ns minimum off-time. Equation: tON = (VOUT/VIN)
(1/Frequency) equates to a 400ns on-time, and a 400ns off-time. The V IN to VOUT Step-Down Ratio curve reflects an operating range of 10V to 20V for 1.25MHz operation with a 100k resistor to ground, and an 8V to 16V operation for f SET floating. These modifications are made to provide wider input voltage ranges for the 5V output designs while limiting the inductor ripple current, and maintaining the 400ns minimum off-time. Example for 3.3V Output L TM4601 minimum on-time = 100ns tON = ((VOUT • 10pF)/IfSET) L TM4601 minimum off-time = 400ns tOFF = t – tON, where t = 1/Frequency Duty Cycle (DC) = tON/t or VOUT/VIN Equations for setting frequency: IfSET = (VIN/(3 • RfSET)), for 20V operation, IfSET = 170µA, tON = ((3.3 • 10pf)/IfSET), tON = 195ns, where the internal RfSET is 39.2k. Frequency = (V OUT/(VIN • t ON)) = (3.3V/ (20 • 195ns)) ~ 846kHz. The minimum on-time and mini- mum off-time are within specification at 195ns and 980ns. The 4.5V minimum input for converting 3.3V output will not meet the minimum off-time specification of 400ns. t ON = 868ns, Frequency = 850kHz, tOFF = 315ns. Solution Lower the switching frequency at lower input voltages to allow for higher duty cycles, and meet the 400ns minimum off-time at 4.5V input voltage. The off-time should be about 500ns, which includes a 100ns guard band. The duty cycle for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/t OFF or (1 – 0.73)/500ns = 540kHz. The switching frequency needs to be lowered to 540kHz at 4.5V input. t ON = DC/ frequency, or 1.35µs. The fSET pin voltage is 1/3 of VIN, and the IfSET current equates to 38µA with the internal 39.2k. The IfSET current needs to be 24µA for 540kHz opera - tion. A resistor can be placed from VOUT to fSET to lower the effective I fSET current out of the f SET pin to 24µA. The fSET pin is 4.5V/3 =1.5V and V OUT = 3.3V , therefore 130k will source 14µA into the f SET node and lower the IfSET current to 24µA. This enables the 540kHz operation and the 4.5V to 20V input operation for down converting to 3.3V output. The frequency will scale from 540kHz to 1.1 MHz over this input range. This provides for an effective output current of 8A over the input range. applicaTions inForMaTion

Figure 16. 5V at 8A Design Without Differential Amplifier Figure 17. 3.3V at 10A Design

4601 F16

4601 F17

Figure 19. 2-Phase Parallel, 1.5V at 24A Design Figure 18. Typical 4.5V to 20V , 1.5V at 12A Design

4601 F18

4601 F19

*C5 OPTIONAL TO REDUCE ANY LC RINGING.

4601fe For more information www.linear .com/L TM4601 4-Phase, Four Outputs (3.3V , 2.5V , 1.8V and 1.5V) with Coincident T racking Typical applicaTions VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS– PGOOD MPGM RUN COMP INTV CC DRVCC TRACK/SSPLLIN L TM4601 392k R11 100k R10 100k R18 19.1k C16 22µF 6.3V C14 10µF 25V 3.3V 2.5V AT 12A R23 60.4k C15 470µF 6.3VMARGIN CONTROL CLOCK SYNC 2 C18 100pF REFER TO TABLE 2 V IN fSETPGNDSGND 5% MARGIN +PGOOD 8V TO 16V ON/OFF VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS– PGOOD MPGM RUN COMP INTV CC DRVCC TRACK/SSPLLIN L TM4601 R14 392k R16 100k R15 100k R13 40.2k C16 22µF 6.3V C14 10µF 25V 3.3V R25 60.4k C15 470µF 6.3VMARGIN CONTROL 1.5V AT 12A CLOCK SYNC 4 C24 100pF REFER TO TABLE 2 V IN fSETPGNDSGND 5% MARGIN +PGOOD 8V TO 16V ON/OFF VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS– PGOOD MPGM RUN COMP INTV CC DRVCC TRACK/SSPLLIN L TM4601 392k 100k 100k R12 30.1k 22µF 6.3V 10µF 25V 3.3V R21 60.4k R19 30.1k 470µF 6.3VMARGIN CONTROL 1.8V AT 12A CLOCK SYNC 3 C8 100pF REFER TO TABLE 2 V IN fSETPGNDSGND 5% MARGIN +PGOOD 8V TO 16V ON/OFF R17 59k C26 0.1µF L TC6902 4-PHASE OSCILLATOR 3.3V AT 10A DIV PH OUT1 OUT2 SET MOD GND OUT4 OUT3 VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS– PGOOD MPGM RUN COMP INTV CC DRVCC TRACK/SSPLLIN L TM4601 R27 392k 100k 100k 13.3k 22µF 6.3V 0.15µF 10µF 25V C11 100µF 35V OPT C10 470µF 6.3VMARGIN CONTROL TRACK/SS CONTROL CLOCK SYNC 1 C12 100pF REFER TO TABLE 2 V IN 3.3V fSETPGNDSGND 5% MARGIN +PGOOD 8V TO 16V 8V TO 16V ON/OFF INTERMEDIATE BUS –48V INPUT R24 19.1k R26 40.2k 3.3V 3.3V 3.3V

4601 TA02

7 PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULL Y NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS LAND DESIGNATION PER JESD MO-222, SPP-010 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE PACKAGE TOP VIEW PIN “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW C(0.30) PAD 1 SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW LGA 118 1212 REV B L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DETAIL A 0.0000 0.0000 D 0.630 ±0.025 Ø 118x E b e e b F G 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 6.9850 F G HM L J K E A B C D DETAIL A 0.630 ±0.025 SQ. 118x 118-Lead (15mm × 15mm × 2.82mm) (Reference LTC DWG # 05-08-1801 Rev B) DETAIL B PACKAGE SIDE VIEW bbb Z S Y X eee SYMBOL A b D E e F G aaa bbb eee MIN 2.72 0.60 0.27 2.45 NOM 2.82 0.63 15.00 15.00 1.27 13.97 13.97 0.32 2.50 MAX 2.92 0.66 0.37 2.55 0.15 0.10 0.05 NOTES DIMENSIONS TOTAL NUMBER OF LGA PADS: 118 DETAIL B SUBSTRATEMOLD CAP Z A SEE NOTES

4601fe For more information www.linear .com/L TM4601 package DescripTion Please refer to http://www.linear .com/designtools/packaging/ for the most recent package drawings. NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS BALL DESIGNATION PER JESD MS-028 AND JEP95 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE PACKAGE TOP VIEW PIN “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW PIN 1 SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW BGA 118 1112 REV B L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DETAIL A 0.0000 0.0000 DETAIL A Øb (118 PLACES) DETAIL B SUBSTRATE 0.27 – 0.37 2.45 – 2.55 // bbb Z D A ccc Z DETAIL B PACKAGE SIDE VIEW MOLD CAP Z M X Y Z ddd M Z eee 0.630 ±0.025 Ø 118x SYMBOL A b D E e F G aaa bbb ccc ddd eee MIN 3.22 0.50 2.72 0.60 0.60 NOM 3.42 0.60 2.82 0.75 0.63 15.0 15.0 1.27 13.97 13.97 MAX 3.62 0.70 2.92 0.90 0.66 0.15 0.10 0.20 0.30 0.15 NOTES DIMENSIONS TOTAL NUMBER OF BALLS: 118 E b e e b F G 118-Lead (15mm × 15mm × 3.42mm) (Reference LTC DWG # 05-08-1903 Rev B) 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 6.9850 F G HM L J K E A B C D AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULL Y SEE NOTES

Table 5. Pin Assignment (Arranged by Pin Number)

Table 6. Pin Assignment (Arranged by Pin Function)

4601feFor more information www.linear .com/L TM4601 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER B 01/10 Added Note 5 2, 4 C 03/12 Revised entire data sheet to include the BGA package. 1 to 30 D 02/14 Added SnPb BGA option 1, 2 E 04/14 Added L TM4601-1 BGA package diagram and package information 2 (Revision history begins at Rev B)

4601fe For more information www.linear .com/L TM4601  LINEAR TECHNOLOGY CORPORATION 2007 LT 0414 REV E • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com/L TM4601 package phoTo This product contains technology licensed from Silicon Semiconductor Corporation. PART NUMBER DESCRIPTION COMMENTS L TM4628 26V , Dual 8A, DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 26.5V , 0.6V ≤ VOUT ≤ 5V , Remote Sense Amplifier , Internal Temperature Sensing Output, 15mm × 15mm × 4.32mm LGA L TM4627 20V , 15A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 20V , 0.6V ≤ VOUT ≤ 5V , PLL Input, VOUT T racking, Remote Sense Amplifier , 15mm × 15mm × 4.32mm LGA L TM4611 1.5VIN(MIN), 15A DC/DC Step-Down μModule Regulator 1.5V ≤ VIN ≤ 5.5V , 0.8V ≤ VOUT ≤ 5V , PLL Input, Remote Sense Amplifier , VOUT T racking, 15mm × 15mm × 4.32mm LGA L TM4613 8A EN55022 Class B DC/DC Step-Down μModule Regulator 5V ≤ VIN ≤ 36V , 3.3V ≤ VOUT ≤ 15V , PLL Input, VOUT T racking and Margining, 15mm × 15mm × 4.32mm LGA L TM4601AHV 28V , 12A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 28V , 0.6V ≤ VOUT ≤ 5V , PLL Input, Remote Sense Amplifier , VOUT T racking and Margining, 15mm × 15mm × 2.82mm LGA or 15mm × 15mm × 3.42mm BGA LTM4601A 20V , 12A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 20V , 0.6V ≤ VOUT ≤ 5V , PLL Input, Remote Sense Amplifier , VOUT T racking and Margining, 15mm × 15mm × 2.82mm LGA or 15mm × 15mm × 3.42mm BGA LTM8027 60V , 4A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 60V , 2.5V ≤ VOUT ≤ 24V , CLK Input, 15mm × 15mm × 4.32mm LGA L TM8032 36V , 2A EN55022 Class B DC/DC Step-Down μModule Regulator 3.6V ≤ V IN ≤ 36V , 0.8V ≤ VOUT ≤ 10V , Synchronizable, 9mm × 15mm × 2.82mm LGA or 9mm × 15mm × 3.42mm BGA LTM8061 32V , 2A Step-Down μModule Battery Charger with Programmable Input Current Limit Compatible with Single Cell or Dual Cell Li-Ion or Li-Poly Battery Stacks IN ≤ 32V , C/10 or Adjustable Timer Charge Termination, NTC Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA relaTeD parTs 15mm 15mm 2.82mm 15mm 15mm 3.42mm

Product Information

LTM4601 specifications and overview.

Summary

12A Module Regulators with PLL, Output Tracking and Margining

Description

12A Module Regulators with PLL, Output Tracking and Margining

Source title LTM4601 Datasheet

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