LP6230A POWER | Alldatasheet

Document overview

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  • PDF pages: 7

Technical content

Features

 Up to 92% efficiency  Shut-down current:<1uA  Output voltageUp to 30V  Internal Compensation  1.2MHz fixed frequency switching  High switch on current: 1.4A  Available in MSOP8Package

Applications

 Battery products  Host Products  Panel Typical Application Circuit VDD EN GND FB LP6230A SW L 3.3uHVIN 22uF 10k SS24 30k 22uF Chip Control 1nF Marking Information Device Marking Package Shipping LP6230AMSF LPS LP6230 YWX MSOP-8 3K/REEL

LP6230A–01 Oct.-2013 Email: marketing@lowpowersemi.com www.Lowpowersemi.com Page 2 of 7 Preliminary Datasheet LP6230A Pin Configurations FB EN GND NC NC VDD SW 4 5 8NC Functional Pin Description PIN PIN Name Description 1,7,8 NC No Connection. 2 FB Regulation Feedback Input. Connect to an external resistive voltage divider from the output to FB to set the output voltage. 3 EN Regulator On/off Control Input. A logic high input(VEN>1.4V) turns on the regulator. A logic low input(VEN<0.4V) puts the LP6230A into low current shutdown mode. 4 GND Ground. 5 SW Switching pin. 6 VDD Power Supply pin.

LP6230A–01 Oct.-2013 Email: marketing@lowpowersemi.com www.Lowpowersemi.com Page 3 of 7 Preliminary Datasheet LP6230A Application Circuit VDD EN GND FB LP6230A SW Vout1: 5V 3.3uH VIN 22uF 10k SS24 30k 22uF Chip Control 1nF Vout2: 10VVout3: -5V 1uF 1uF 2.2uF 2.2uF

LP6230A–01 Oct.-2013 Email: marketing@lowpowersemi.com www.Lowpowersemi.com Page 4 of 7 Preliminary Datasheet LP6230A Function Block Diagram FB EN SHUTDOWN CIRCUITRY UVLO SOFT START CONTROL AND DRIVER LOGIC SLOPE COMPENSASIONOSCILLATOR OVP VDD SW GND OTP SHORT CIRCUIT COMP. Error Amp. PWM COMP. CURRENT SENSE AMP. 10μA 0.3V 1.25V Σ Absolute Maximum Ratings Note 1 Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifi cations is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Information

LP6230A–01 Oct.-2013 Email: marketing@lowpowersemi.com www.Lowpowersemi.com Page 5 of 7 Preliminary Datasheet LP6230A

Electrical Characteristics

(Vin=3.3V,Vout=5V,Cin=10uF,Cout=22uF,L1=4.7uH) Parameter Conditions LP6230A Units Min Typ Max Supply Voltage 2.7 5.5 V Output Voltage Range 2.7 30 V Supply Current(Shutdown) VEN=VOUT=0V,VSW=5V 0.1 1 uA Supply Current 430 550 uA Feedback Voltage 1.22 1.25 1.28 V Feedback Input Current VFB=1.25V 50 nA Switching Frequency 1200 KHz Maximum Duty Cycle 93 % EN Input Low Voltage 0.4 V EN Input High Voltage 1.4 V Low-side Current Limit 1.4 A High-side On Resistance Vout=3.3V 0.4 Ω Mosfet voltage 30 V

LP6230A–01 Oct.-2013 Email: marketing@lowpowersemi.com www.Lowpowersemi.com Page 6 of 7 Preliminary Datasheet LP6230A Operation Information The LP6230A uses a fixed frequency, peak current mode boost regulator architecture to regulate voltage at the feedback pin. At the start of each oscillator cycle the MOSFET is turned on through the control circuitry. To prevent sub -harmonic oscillations at duty cycles greater than 50 percent, a stabilizing ramp is added to the output of the current sense amplifier and the result is fed into the negative input of the PWM comparator. When this voltage equals The output voltage of the error amplifier the power MOSFET is turned off. The voltage at the output of the error amplifier is an amplified version of the difference between the 1.25V bandga p reference voltage and the feedback voltage. In this way the peak current level keeps the output in regulation. If the feedback voltage starts to drop, the output of the error amplifier increases. These results in more current to flow through the power MO SFET, thus increasing the power delivered to the output. TheLP6230A has internal soft start to limit the amount of input current at startup and to also limit the amount of overshoot on the output. Setting the Output Voltage Set the output voltage by selecting the resistive voltage divider ratio. The voltage divider drops the output voltage to the 1.25V feedback voltage. Use a 100K resistor for R2 of the voltage divider. Determine the high -side resistor R1 by the equation: Vout=(R1/R2+1)×VFB Vout=(R1/R2+1)×1.25V Diode Selection To achieve high efficiency, Schottky diode is good choice for low forward drop voltage and fast switching time. The output diode rating should be able to handle the maximum output voltage, average power dissipation and the pulsating diode peak current. Input Capacitor Selection For better input bypassing, low -ESR ceramic capacitors are recommended for performance. A 10μF input capacitor is sufficient for most applications. For a lower output power requirement application, this value can be decreased. Layout Guideline For high frequency switching power supplies, the PCB layout is important step in system application design. In order to let IC achieve good regulation, high efficiency and stability, it is strongly recommended t he power components should be placed as close as possible. The set races should be wide and short. The feedback pin and then works of feedback and compensation should keep away from the power loops, and be shielded with a ground trace or plane to prevent n oise coupling.Input and Output capacitors should be placed close to the IC and connected to ground plane to reduce noise coupling.

LP6230A–01 Oct.-2013 Email: marketing@lowpowersemi.com www.Lowpowersemi.com Page 7 of 7 Preliminary Datasheet LP6230A Packaging Information