LP4067 POWER | Alldatasheet

Document overview

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Technical content

Features

 Input Voltage up to 30V  Battery Maximum Voltage up to 20V  Input Over Voltage Protection：6.3V  Short-circuit protection  Programmable Charge Current up to 800mA  1µA Battery Reverse Current  Protection of Reverse Connection of Battery  No MOSFET, Sense Resistor or Blocking Diode Required  Constant-Current/Constant-Voltage Operation with Thermal Regulation to Maximize Charge Rate Without Risk of Overheating  SOT23-6 Package  RoHS Compliant and 100% Lead (Pb)-Free

Applications

 Portable Media Players/Game  Power Bank  Bluetooth Applications  PDA/MID Marking Information Device Marking Package Shipping LP4067AB6F LP4067 YWX SOT23-6 3K/REEL LP4067TB6F LP4067 TYWX SOT23-6 3K/REEL Marking indication: Y:Production year W:Production week X: Series Number

LP4067-01 Dec.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 8 Preliminary Datasheet LP4067 Functional Pin Description Package Type Pin Configurations LP4067AB6F LP4067TB6F SOT23-6 EN 2GND CHRG ISET BAT VIN TS 2GND VIN ISET CHRG BAT Pin Description NAME No. DESCRIPTION LP4067A LP4067T EN 1 Charge Enable Input (active low). TS 1 Temperature senses voltage input . GND 2 2 GND is the connection to system ground. CHRG 3 5 Open-Drain Charge Status Output. When the battery is charging, the CHRG pin is pulled low by an internal NMOS. When the charge cycle is completed, the pin could be pulled High by an external pull high resistor. VIN 4 3 VIN is the input power source. Connect to a wall adapter. BAT 5 4 BAT is the connection to the battery. Typically a 1 0µF Tantalum capacitor is needed for stability when there is no battery attached. When a battery is attached, only a 1uF ceramic capacitor is required. ISET 6 6 Charge Current Program. The charge current is pro grammed by connecting a 1% resistor(RISET) to ground.

LP4067-01 Dec.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 8 Preliminary Datasheet LP4067 Typical Application Circuit VIN EN ISET BAT CHRG VIN VBAT ON OFF EN LP4067A CIN 10uF CBAT 10uF RISET 5.1KΩ 1KΩLED1 Battery GND VIN ISET GND BAT CHRG VIN LP4067T CIN 10uF CBAT 10uF RISET 5.1KΩ 1KΩ LED1 Battery TS VIN R1 R2 Function Block Diagram VIN BAT Control Logic GND EN CHRG ISET TS

LP4067-01 Dec.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 4 of 8 Preliminary Datasheet LP4067 Absolute Maximum Ratings Note 1 Thermal Information ESD Susceptibility Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

LP4067-01 Dec.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 8 Preliminary Datasheet LP4067

Electrical Characteristics

(TA=25°C, VIN =5V, unless otherwise noted.) SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNITS VIN Input Voltage 4.5 5 5.8 V IIN Input Supply Current IBAT=4.2V 40 uA VFLOAT Regulated Output (Float) Voltage IBAT=40mA, 4.158 4.2 4.242 V VUV VIN Under Voltage Lockout Threshold From VIN Low to High 3.3 V VUV_HYS VIN Under Voltage Lockout Hysteresis 150 mV VOVP Input Voltage OVP VIN Rising 6.3 V VOVP_HYS OVP Hysteresis 400 mV IBAT BAT Pin Current RISET=3.4k, Current Mode 515 mA RISET=17.5k, Current Mode 100 mA VBAT=4.2V 1 uA VIN=float or 0V 1 ITRIKL Trickle Charge Current VBAT<VTRIKL，RISET=10k, Current Mode 10 %IBAT VTRIKL Trickle Charge Threshold Voltage VBAT Rising 2.6 V VTRHYS Trickle Charge Hysteresis Voltage 150 mV ITERM Termination Current Threshold 10 %IBAT VISET ISET Pin Voltage RISET=10k, Current Mode 1 V ICHRG CHRG Pin Weak Pull-Down Current VCHRG=5V 5 uA VCHRG CHRG Pin Output Low Voltage ICHRG=5mA 0.5 V VEN_L EN Logic-Low Voltage Threshold LP4067AB6F 0.4 V VEN_H EN Logic-High Voltage Threshold 1.4 V VTS-L Threshold Voltage of VTS falling LP4067TB6F 30 %VIN VTS-H Threshold Voltage of VTS rising 60 %VIN ΔVRECHRG Recharge Battery Threshold Voltage VFLOAT-VRECHRG 150 mV TLIM Junction Temperature in Constant Temperature Mode 125 °C

LP4067-01 Dec.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 6 of 8 Preliminary Datasheet LP4067

Application Information

The LP4067 has built-in input voltage surge protection as high as 30V. The charger IC will be automatically disabled when the input voltage is lower than 3.3V or higher than 6.3V. A charge cycle begins when the voltage at the V IN pin rises above the 4.5V level, when a battery is connected to the charger output. If the BAT pin is less than 2. 6V, the charger enters trickle charge mode. In this mode, the LP4067 supplies approximately 1/10 the ISET programmed charge current to bring the battery voltage up to a safe level for full current charging. Whe n the BAT pin voltage rises above 2. 6V, the charger enters constant -current mode (CC), where the ISET programmed charge current is supplied to the battery. When the BAT pin approaches the final float voltage, the LP4067 enters constant -voltage mode (CV) and the charge current begins to decrease, and the battery full indication is set when the charge current in the CV mode is reduced to the programmed full battery current (1/10). Charge Termination A charge cycle is terminated when the charge current falls to 1/10th the ISET programmed value after the final float voltage is reached. This condition is detected by using an internal, filtered comparator to monitor the ISET pin. When the ISET pin voltage falls below 100mV for longer than t TERM(typically 1ms), charging is terminated. ISET programming Charge Current The charge current (I BAT) is set by a resistor (RISET) connecting from the ISET pin to GND. The relationship of the charge current and the programming resistance is established by the following equations（VISET=1V）. Automatic Recharge Once the charge cycle is terminated, the LP4067 continuously monitors the voltage on the BAT pin . A charge cycle restarts when the battery voltage falls below 4.05V (which corresponds to approximately 80% to 90% battery capacity). This ensures that the battery is kept at or near a fully charged condition and eliminates the need for periodic charge cycle initiations. Enable Function The LP 4067A features an enable/disable function. An input “Low” signal at EN pin or if this pin is floating will enable the IC. To assure the charger will switch on, the EN turn on control level must below 0.4 volts. The charger IC will go into the shutdown mode when the voltage on the EN pin is greater than 1.4 volts. If the enable function is not needed in a specific application, it may be tied to GND or floating to keep the charge IC in a continuously on state. Charge Status Indicator (CHRG) After application of a 5V source, the input voltage rises above the UVLO and sleep thresholds (VIN>VBAT+VDT), but is less than OVP (VIN<VOVP), then the PG turns on and provides a low impedance path to ground. CHRG has two different states: strong pull -down (~5mA) and high impedance. The strong pull-down state indicates that the LP4067A is in a charge cycle. When the charger is entered CV mode and once the charge current has reduced to the battery full charge current threshold (ITERM), the CHRG pin will become high impedance. Function CHRG Charging Low Charge Finish High

LP4067-01 Dec.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 8 Preliminary Datasheet LP4067 Battery Temperature Detection The LP4067T continuously monitors temperature by measuring the voltage between the TS and GND pins. A negative or a positive temperature coefficient thermistor (NTC, PTC) and an external voltage divider typically develop this voltage. The LP 4067T compares this voltage against its internal V TS-L and VTS-H thresholds to determine if charging is allowed. The temperature sensing circuit is immune to any fluctuation in V IN, since b oth the external voltage divider and the internal thresholds ( VTS-L and VTS-H) are referenced to VIN. The resistor values of R1 and R2 are calculated by the following equations: For NTC Thermistors: ( ) ( ) ( ) ( ) ( ) For PTC Thermistors: ( ) ( ) ( ) ( ) ( ) K1(VTS-L)=30%, K2(VTS-H)=60%. Where RTL is the low temperature resistance and RTH is the h igh temperature resistance of thermistor, as specified by the thermistor manufacturer. R1 or R 2 can be omitted if only one temperature ( low or high) setting is required. Applying a voltage between the VTS-L and V TS-H thresholds to pin TS disables the temperature-sensing feature. Thermal Limiting An internal thermal feedback loop reduces the I SET programmed charge current if the die temperature attempts to rise above a pre set value of approximately 12 5°C. This feature protects the LP4067 from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the LP4067. The charge current can be set according to typical (not worst-case) ambient temperature with the assurance that the charger will automatically reduce the current in worst-case conditions.

LP4067-01 Dec.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 8 of 8 Preliminary Datasheet LP4067 Packaging Information SOT23-6