MNLM193A-X NSC | Alldatasheet
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Original Creation Date: 05/18/95 Last Update Date: 06/14/04 Last Major Revision Date: 09/02/97 MNLM193A-X REV 1B3 MICROCIRCUIT DATA SHEET LOW POWER LOW OFFSET VOLTAGE DUAL COMPARATORS General Description The LM193A consists of two independent precision voltage comparators with an offset voltage specification as low as 2.0mV max for two comparators which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magniture of the power supply voltage. These comparators also have a unique characteristic in that the input common-mode voltage range includes ground, even though operated from a single power supply voltage. Application areas include limit comparators, simple analog to digital converters; pulse, squarewave and time delay generators; wide range VCO; MOS clock timers; multivibrators and high voltage digital logic gates. The LM193A was designed to directly interface with TTL and CMOS. When operated from both plus and minus power supplies, the LM193A will directly interface with MOS logic where their low power drain is a distinct advantage over standard comparators. NS Part Numbers LM193AH-QMLV LM193AH/883 LM193AJ-QMLV LM193AJ/883 Industry Part Number LM193A Prime Die LM193A Controlling Document See Features Page Processing MIL-STD-883, Method 5004 Quality Conformance Inspection MIL-STD-883, Method 5005 Subgrp Description Temp ( C)o
1 Static tests at +25
2 Static tests at +125
3 Static tests at -55
4 Dynamic tests at +25
5 Dynamic tests at +125
6 Dynamic tests at -55
7 Functional tests at +25
8A Functional tests at +125 8B Functional tests at -55
9 Switching tests at +25
10 Switching tests at +125
11 Switching tests at -55
MICROCIRCUIT DATA SHEETMNLM193A-X REV 1B3
Features
- Wide supply - Voltage range 2.0Vdc to 36Vdc - Single or dual supplies +1.0Vdc to +18Vdc - Very low supply current drain (0.4mA) independent of supply voltage - Low input biasing current 25nA Typ - Low input offset current +3nA Typ - Input common-mode voltage range includes ground - Differential input voltage range equal to the power supply voltage - Low output saturation voltage 250mV at 4mA Typ - Output voltage compatible with TTL, DTL, ECL, MOS and CMOS logic systems CONTROLLING DOCUMENTS: LM193AH/883 5962-9452602MGA LM193AH-QMLV 5962-9452602VGA LM193AJ-QMLV 5962-9452602VPA LM193AJ/883 5962-9452602MPA
MICROCIRCUIT DATA SHEETMNLM193A-X REV 1B3 (Absolute Maximum Ratings) (Note 1) Supply Voltage, V+ 36Vdc or +18Vdc Differential Input Voltage (Note 6) 36Vdc Input Voltage -0.3Vdc to +36Vdc Input Current (Vin < -0.3 Vdc) (Note 5) 50mA Maximum Junction Temperature 150 C Power Dissipation (Note 2, 3) 660mWMETAL CAN 780mWCERDIP Output Short-Circuit to Gnd (Note 4) Continuous Operating Temperature Range -55 C to +125 C Thermal Resistance ThetaJA
174 C/W METAL CAN (Still Air)
99 C/W (500LF/Min Air flow)
146 C/W CERDIP (Still Air)
85 C/W (500LF/Min Air flow)
44 C/W METAL CAN
33 C/W CERDIP
+260 C(Soldering, 10 seconds) ESD Tolerance (Note 7) 500V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature ), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 3: The LM193A must be derated based on a 150 C maximum junction temperature. The low bias dissipation and the ON-OFF characteristic of the outputs keeps the chip dissipation very small (PD<100mV), provided the output transistors are allowed to saturate. Note 4: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output current is approximately 20mA independent of the magnitude of V+.
MNLM193A-X REV 1B3 MICROCIRCUIT DATA SHEET (Continued) Note 5: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3Vdc. Note 6: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3Vdc (or 0.3Vdc below the magnitude of the negative power supply, if used). Note 7: Human body model, 1.5K Ohms in series with 100pF.
MNLM193A-X REV 1B3 MICROCIRCUIT DATA SHEET
Electrical Characteristics
(The following conditions apply to all the following parameters, unless otherwise specified.) DC: V+ = 5V, Vcm = 0 SYMBOL PARAMETER CONDITIONS NOTES PIN- NAMEMIN MAX UNITSUB- GROUPS Icc Supply Current Rl = Infinity 1.0 mA 1, 2, V+ = 36V, Rl = Infinity 2.5 mA 1, 2, Icex Output Leakage Current V+ = 30V, Vin+ = 1V, Vo = 30, Vin- = 0 -0.65 0.65 uA 1 -1.0 1.0 uA 2, 3 Isink Output Sink Current Vo = 1.5V, Vin- = 1V, Vin+ = 0 6.0 mA 1 4.0 mA 2, 3 Vsat Output Saturation Voltage Isink = 4mA, Vin- = 1V, Vin+ = 0 0.4 V 1
0.7 V 2, 3
-2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 V+ = 30V, Vcm = 0 -2.0 2.0 mV 1 -4.0 4.0 mV 2, 3 V+ = 30V, Vcm = 28.5V -2.0 2.0 mV 1 V+ = 30V, Vcm = 28.0V -4.0 4.0 mV 2, 3 Iib+ Input Bias Current Vout = 1.5V -100 -1 nA 1 -300 -1 nA 2, 3 Iib- Input Bias Current Vout = 1.5V -100 -1 nA 1 -300 -1 nA 2, 3 Iio Input offset Current Rs = 50 Ohms, Vout = 1.5V -25 25 nA 1 -100 100 nA 2, 3 Vcm Common Mode Voltage V+ = 30V 1 28.5 V 1 1 28 V 2, 3 PSRR Power Supply Rejection Ratio V+ = 5V to 30V, Rs = 50 Ohms 60 dB 1 CMRR Common Mode Rejection Ratio V+ = 30V, Vcm = 0V to 28.5V, Rs = 50 Ohms 60 dB 1 Vdiff Differential Input Voltage V+ = 30V, +Vin = 36V, -Vin = 0V 4 500 nA 1, 2, V+ = 30V, +Vin = 0V, -Vin = +36V 4 500 nA 1, 2, Avs Voltage Gain V+ = 15V, 1V <= Vout <= 11V, RPULLUP = 15K 2 50 V/mV 4 2 25 V/mV 5, 6
MNLM193A-X REV 1B3 MICROCIRCUIT DATA SHEET (The following conditions apply to all the following parameters, unless otherwise specified.) AC: Vcc = 5V, Vcm = 0 SYMBOL PARAMETER CONDITIONS NOTES PIN- NAMEMIN MAX UNITSUB- GROUPS tRLH Response Time V+ = 5V, Vod = 5mV 3 5.0 uS 9 V+ = 5V, Vod = 50mV 3 0.8 uS 9 tRHL Response Time V+ = 5V, Vod = 5mV 3 2.5 uS 9 V+ = 5V, Vod = 50mV 3 0.8 uS 9 DC PARAMETERS: DRIFT VALUES (The following conditions apply to all the following parameters, unless otherwise specified.) DC: V+ = 5V, Vcm = 0. "Delta calculations performed on Jan S and QMLV devices at Group B, Subgroup 5 ONLY." Vio Input Offset Voltage V+ = 30V, Vcm = 0 -1 1 mV 1 Iib+ Input Bias Current -15 15 nA 1 Iib- Input Bias Current -15 15 nA 1 Note 1: Parameter guaranteed by the Vio tests Note 2: Datalog reading in K = V/mV. Note 3: Bench Tested Note 4: The value for Vdiff is not data logged during Read and Record.
MICROCIRCUIT DATA SHEETMNLM193A-X REV 1B3 Graphics and Diagrams GRAPHICS# DESCRIPTION 06048HRA2 CERDIP (J), 8 LEAD (B/I CKT) 09319HRA2 METAL CAN (H), TO-99, 8 LD, .200 DIA P.C.(B/I CKT) H08CRF METAL CAN (H), TO-99, 8LD .200 DIA P.C. (P/P DWG) J08ARL CERDIP (J), 8 LEAD (P/P DWG) P000171A METAL CAN (H), TO-99, 8LD, .200 DIA P.C. (PINOUT) P000172B CERDIP (J), 8 LEAD (PINOUT) See attached graphics following this page.
N MIL/AEROSPACE OPERATIONS
2900 SEMICONDUCTOR DRIVE
SANTA CLARA, CA 95050 IN- A IN+ A OUTPUT A GND IN+ B IN- B OUTPUT B LM193AH, LM193H CONNECTION DIAGRAM TOP VIEW P000171A 8 - PIN METAL CAN
N MIL/AEROSPACE OPERATIONS SANTA CLARA, CA 95050 LM193J, LM193AJ CONNECTION DIAGRAM TOP VIEW P000172B 8 - LEAD DIP 1 8 4 5 OUTPUT A IN- A IN+ A V- IN + B IN- B OUTPUT B
MICROCIRCUIT DATA SHEETMNLM193A-X REV 1B3
Revision History
Rev ECN # Rel Date Originator Changes 1A2 M0002817 01/16/03 Rose Malone Update MDS: MNLM193A-X, Rev. 1A1 to MNLM193A-X, Rev. 1A2. Main Table Adding reference to LM193AJ/883 and SMD number, B/I CKTS and Pin Out for J pkg. 1A3 M0004087 06/14/04 Rose Malone Updated MDS: MNLM193A-X, Rev. 1A2 to MNLM193A-X, Rev. 1A3. Updated Burn-In Ckt from 05363HRA2 to 09319HRA2 in Graphics Section. 1B3 M0004391 06/14/04 Rose Malone Update MDS: MNLM193A-X, Rev. 1A3 to 1B3. Added Note 4 to Vdiff parameter and to note section.