LM193 ARTSCHIP | Alldatasheet

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Technical content

Features

—Voltage range: 2.0V to 36V —Single or dual supplies: ±1.0V to ±18V z Very low supply current drain (0.4mA) — independent of supply voltage z Low input biasing current: 25nA z Low input offset current: ±5nA z Maximum offset voltage: ±3mV z Input common-mode voltage range includes ground z Differential input voltage range equal to the power supply voltage z Low output saturation voltage: 250mV at 4 mA z Output voltage compatible wi th TTL, DTL, ECL, MOS and CMOS logic systems z Available in the 8-Bump (12 mil) micro SMD package z See AN-1112 for micro SMD considerations Squarewave Oscillator 00570938 Non-Inverting Comparator with Hysteresis 00570909

www.artschip.com 2 Schematic and Connection Diagrams 00570902 Metal Can Package TOP VIEW 0 0 5 7 0 9 0 3 micro SMD 00570945 Top View Dual-In-Line/SOIC Package TOP VIEW 0 0 5 7 0 9 0 1 micro SMD Marking 00570946 Top View

www.artschip.com 3 Absolute Maximum Ratings (Note 10) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage, V + 3 6 V Differential Input Voltage (Note 8) 36V Input Voltage -0.3V to +36V Input Current (V IN < - 0 . 3 V ) ( N o t e 3 ) 5 0 m A Power Dissipation (Note 1) Molded DIP 780mW Metal Can 660mW Small Outline Package 510mW Micro SMD package 568mW Output Short-Circuit to Ground ( N o t e 2 ) C o n t i n u o u s Operating Temperature Range L M 3 9 3 0 ¥ to +70¥ L M 2 9 3 - 2 5 ¥ to +85¥ L M 1 9 3 / L M 1 9 3 A - 5 5 ¥ to +125 ¥ -.¥ to + 80 ¥ Storage Temperature Range -60 ¥ to +150 ¥ Lead Temperature ( S o l d e r i n g , 1 0 s e c o n d s ) + 2 6 0¥ Soldering Information Dual-In-Line Package S o l d e r i n g ( 1 0 s e c o n d s ) 2 6 0¥ S m a l l O u t l i n e P a c k a g e 2 1 5¥ Vapor Phase (60 seconds) I n f r a r e d ( 1 5 s e c o n d s ) 2 2 0¥ See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. ESD rating ( 1 . 5 kΩ in series with 100pF) 1300V

Electrical Characteristics

+ =5V, TA = 25 ,¥ unless otherwise stated) LM193A Parameter Conditions M i n T y p M a x Units Input Offset Voltage (Note 9) 1.0 2.0 mV Input Bias Current IIN(+) or IIN(-) with Output In Linear Range, VCM = 0V (Note 5) 2 5 1 0 0 n A Input Offset Current IIN(+)-IIN(-) VCM =0V 3 . 0 2 5 V Input Common Mode Voltage Range V + = 3 0 V ( N o t e 6 ) 0 V + -1.5 V V+ = 5V Supply Current RL=∞ V+ = 36V 0 . 4 1 1 2 . 5 mA mA Voltage Gain RL≥15KΩ, V+ = 15V VO =1V to 11V 5 0 2 0 0 V / m V Large Signal Response Time VIN = TTL Logic Swing, VREF = 1.4V VRL = 5V, RL = 5.1KΩ 3 0 0 n s Response Time VRL = 5V, RL = 5.1KΩ (Note 7) 1 . 3 µ s Output Sink Current VIN(-) =1V, VIN(+) =0, VO ≈1.5V 6 . 0 1 . 6 m A Saturation Voltage VIN(-) =1V, VIN(+) =0, ISINK ≤4mA 2 5 0 4 0 0 m V Output Leakage Current VIN(-) =0, VIN(+) =1V, VO =5V 0 . 1 n A (V+ =5V, TA = 25 ,¥ unless otherwise stated) LM193 LM293,LM393 LM2903 Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Units Input Bias Current V IN(+) or V IN(-) with Output In Linear Range, VCM = 0V (Note5) 2.5 100 25 250 25 250 nA Input Offset Current V IN(+) - VIN(-) VCM = 0 V 3 . 0 2 5 5 . 0 5 0 5 . 0 5 0 n A Input Common Mode Voltage Range V + = 3 0 V ( N o t e 6 ) 0 V + - 1 . 5 0 V + - 1 . 5 0 V + - 1 . 5 V

www.artschip.com 4 Electrical Characteristics (Continued) (V+ =5V, TA = 25¥, unless otherwise stated) LM193 LM293,LM393 LM2903 Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Units V+ = 5V Supply Current R L=∞ V+ = 36V 0 . 4 1 1 2 . 5 0 . 4 1 1 2 . 5 0 . 4 1 . 0 1 2 . 5 mA mA Voltage Gain R L≥15kΩ, V+ = 15V VO=1V to 11V 50 200 50 200 25 100 V/mV Large Signal Response Time VIN = TTL Logic Swing, VREF = 1.4V VRL = 5V, RL=5.1kΩ 300 300 300 ns Response Time V RL = 5V, RL=5.1kΩ (Note 7) 1.3 1.3 1.5 µs Output Sink Current VIN(-) =1V, VIN(+) =0, VO ≤1.5V 6.0 16 6.0 16 6.0 16 mA Saturation Voltage VIN(-) =1V, VIN(+) =0, ISINK ≤4mA 250 400 250 400 250 400 mV Output Leakage Current VIN(-) =0, VIN(+) =1V, VO =5V 0 . 1 0 . 1 0 . 1 nA (V+ =5V) (Note 4) LM193A Parameter Conditions M i n T y p M a x Units Input Offset Voltage (Note 9) 4.0 mV Input Bias Current I IN(+) or IIN(-) with Output In Linear Range, VCM = 0V (Note 5) 300 nA Input Offset Current I IN(+)-IIN(-) ,VCM =0V 100 V Input Common Mode Voltage Range V + = 3 0 V ( N o t e 6 ) 0 V + -2.0 V Saturation Voltage V IN(-) =1V, VIN(+) =0, ISINK ≤4mA 700 mV Output Leakage Current V IN(-) =0, VIN(+) =1V, Vo ≤3 0 V 1 . 0 µ A Differential Input Voltage Keep All V IN’S≥0V (or V -, i f U s e d ) , ( N o t e 8 ) 3 6 V (V+ =5V) (Note 4) LM193 LM293,LM393 LM2903 Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Units Input Offset Voltage (Note 9) 9 9 9 15 mV Input Offset Current IIN(+)-IIN(-) ,VCM =0V 100 150 50 200 nA Input Bias Current IIN(+) or IIN(-) with Output In Linear Range, VCM = 0V (Note 5) 300 400 200 500 nA Input Common Mode Voltage Range V =30V (Note 6) 0 V - 2 . 0 0 V - 2 . 0 0 V -2.0 V Saturation Voltage VIN(-) =1V, VIN(+) =0, ISINK ≤4mA 700 700 400 700 mV Output Leakage Current VIN(-) =0, VIN(+) =1V, Vo =30V 1 . 0 1 . 0 1 . 0 µA Differential Input Voltage Keep All VIN’S≥0V (or V -, if Used), (Note 8) 3 6 3 6 3 6 V Note 1: For operating at high temperatures, the LM393 and LM2903 must be derated based on a 125¥ maximum junction temperature and a thermal resistance of 170 ¥/W which applies for the device soldered in a printed circui t board, operating in a still air ambient. The LM193A/LM293 must be derated based on a 150 ¥ maximum junction temperature. The low bias dissipation and the “ON-OFF” characteristic of the outputs keeps the chip dissipation very small (PD ≤100mW), provided the output transistors are allowed to saturate. Note 2: Short circuits from the output to V can cause excessive heating and ev entual destruction. When consideri ng short circuits to ground, the maximum output current is approximately 20mA independent of the magnitude of V Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamp. In addition to this diode action, these is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driv en negative. This is not destructive and normal output states will re-establish when the input

www.artschip.com 5 voltage, which was negative, again returns to a value greater than -0.3V. Note 4: These specifications are limited to -55 ¥≤ TA ≤ +125¥, for the LM193/LM193A. With the LM293 all temperature specifications are limited to -25¥≤ TA ≤ +85¥ and the LM393 temperature specifications are limited to 0 ¥≤TA≤+70¥ The LM2903 is limited to -40¥≤TA≤+85¥ Note 5: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference or input lines. Note 6: The input common-mode voltage or either input signal voltage shoul d not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is V - 1.5V at 25¥, but either or both inputs can go to 36V without damage, independent of the magnitude of V Note 7: The response time specified is for a 100 mV input step with 5mV overdrive. For la rger overdrive signals 300ns can be obtained, see typical performance characteristics section. Note 8: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3V (or 0.3V below the magnitude of the negative power supply, if used.) Note 9: At output switch point, VO”1.4V, RS=0Ω with V from 5V to 30V; and over the full input common-mode range (0V to V -1.5V), at 25¥. Note 10: Refer to RETS193AX for LM193AH military specifications and to RETS193X for LM193H military specifications.

Ordering Information

Package Temperature Range Part Number NSC Drawing LM193H* LM193H/883 LM193H-MLS LM193AH-MLS LM193AH-QMLV** LM193AH -55¥ to 125 ¥ LM193AH/883 -25¥ to 85 ¥ LM293H 8-Pin Metal Can 0¥ to 70 ¥ LM393H H08C LM193J/883* LM193AJ/883 LM193AJ-QMLV** 8-Pin Ceramic DIP -55¥ to 125 ¥ LM193AJ-MLS JO8A 0¥ to 70 ¥ LM393N 8-Pin Molded Dip -40¥ to 85 ¥ LM2903N N08E LM393D 0¥ to 70 ¥ LM393MX LM2903M 8-Pin SOIC -40¥ to 85 ¥ LM2903MX M08A LM393TL 0¥ to 70 ¥ LM393TLX LM2903ITL 8-Bump (12 mils) micro SMD -40¥ to 85 ¥ LM2903ITLX TLA08AAA Note: * Also available per LM38510/11202 Note: **See STD Mil DWG 5962-94526

www.artschip.com 6 Typical Performance Characteristics LM193/LM293/LM393, LM193A Supply Current V - SUPPLY VOLTAGE (VDC) 0057925 Output Saturation Voltage IO-OUTPUT SINK CURRENT (mA) 0 0 5 7 0 9 2 7 Response Time for Various Input Overdrives —Positive Transitions TIME (µsec) 0 0 5 7 0 9 2 9 Input Current V - SUPPLY VOLTAGE (VDC) 00570926 Response Time for Various Input Overdrives—Negative Transition TIME (µsec) 0 0 5 7 0 9 2 8

www.artschip.com 7 Typical Performance Characteristics LM2903 Supply Current V+, SUPPLY VOLTAGE(VDC) 0 0 5 7 0 9 3 0 Output Saturation Voltage IO, OUTPUT SINK CURRENT (mA) 0 0 5 7 0 9 3 2 Response Time for Various Input Overdrives—Positive Transition TIME (µsec) 0 0 5 7 0 9 3 4 Input Current V+, SUPPLY VOLTAGE(VDC) 0 0 5 7 0 9 3 1 Response Time for Various Input Overdrives—Negative Transition TIME (µsec) 0 0 5 7 0 9 3 3

www.artschip.com 8 Application Hints The LM193 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to the inputs via stray capaci tance. This shows up only during the output voltage transition int ervals as the comparator change states. Power supply bypassing is not required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling. Reducing the input resistors to <10kΩ reduces the feedback signal levels and finally, adding even a small amount (1.0 to 10mV) of positive feedback ( hysteresis ) causes such a rapid transition that oscillations due to stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform, with relatively fast rise and fall times, hysteresis is not required. The bias network of the LM193 series establishes a drain current which is independent of the magnitude of the power supply voltage over the range of from 2.0 VDC to 30 VDC. It is usually unnecessary to use a bypass capacitor across the power supply line. The differential input voltage may be larger than V + without damaging the device (Note 8). Protection should be provided to prevent the input voltages from going negative more than -0.3VDC (at 25¥). An input clamp diode can be used as shown in the applications section. The output of the LM193 series is the uncommitted collector of a grounded-emitter NPN output transistor. Many collectors can be tied together to provide an output OR’ing function. An output pull-up resistor can be connected to any available power supply voltage within the permitted supply voltage range and there is no restriction on this voltage due to the magnitude of the voltage which is applied to the V + terminal of the LM193 package. The output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of current which the output device can sink is limited by t he drive available (which is independent of V +) and the ̀ of this device. When the maximum current limit is reached (approximately 16mA), the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the approximately 60Ω r SAT of the output transistor. The low offset voltage of the output transistor (1.0mV) allows the output to clamp essentially to ground level for small load currents. Typical Applications (V+ =5.0 VDC) Basic Comparator 0 0 5 7 0 9 3 5 Squarewave Oscillator 0 0 5 7 0 9 3 8 Driving CMOS 00570936 Pulse Generator 0 0 5 7 0 9 3 9 *For large ratios of R1/R2, D1 can be omitted. Driving TTL 00570937 Crystal Controlled Oscillator 0 0 5 7 0 9 4 0

www.artschip.com 9 Typical Applications (V+ =5.0 VDC) (Continued) Two – Decade High Frequency VCO 00670941 V* =+30 VDC +250 mVDC ≤ VC ≤ ±50 VDC 700Hz ≤ fO ≤100kHz Basic Comparator 00570906 Inverting Comparator with Hysteresis 0 0 5 7 0 9 1 0 Non-Inverting Comparator with Hysteresis 0 0 5 7 0 9 0 9 Output Strobing *ORLOGIC GATE WITHOUT PULL-UP RESISTOR 00570911

www.artschip.com 10 Typical Applications (V+ =5.0 VDC) (Continued) AND Gate 00570912 Large Fan-in AND Gate 00570914 Comparing Input Voltages of Opposite Polarity 0 0 5 7 0 9 1 6 OR Gate 00570913 Limit Comparator 0 0 5 7 0 9 1 5 ORing The Outputs 0 0 5 7 0 9 1 7

www.artschip.com 11 Typical Applications (V+ =5.0 VDC) (Continued) Zero Crossing Detector (Single Power Supply) 00570921 Bi-Stable Multivibrator 00570924 Zero Crossing Detector 00570943 One Shot Multivibrator 00570922 One-Shot Multivibrator with input Lock Out 00570944

www.artschip.com 12 Typical Applications (V = 5.0 VDC) (Continued) Time Delay Generator 00570907 Split-Supply Applications (V =+15 VDC and V = -15 VDC) MOS Clock Driver 0 0 5 7 0 9 4 2

www.artschip.com 13 Physical Dimensions inches (millimeters) unless otherwise noted Metal Can Package (H) Ceramic Dual-In-Line Package

www.artschip.com 14 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package (N)

www.artschip.com 15 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) DIMENSIONS ARE IN MILLIMETERS LAND PATTERN RECOMMENDATION NOTE: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 2.636n/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION REMAINING PIN ARE NUMBERED COUNTERCLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X

1 IS PACKAGE WIDTH,X2 IS PACKAGE LENGTH AND X3

IS PACKAGE HEIGHT. 6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC. 8-Bump (12 mil) micro SMD Package Ns Package TLA08AAA X1 = 1.514mm X2 = 1.514mm X3 = 0.600mm LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.