LH534A00 SHARP | Alldatasheet
Document overview
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Technical content
LH534A00 CMOS 4M (512K × 8) MROM
FEATURES
- • 524,288 words × 8 bit organization
- • Access time: 120 ns (MAX.)
- • Static operation
- • TTL compatible I/O
- • Three-state outputs
- • Single +5 V power supply
- • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 µW (MAX.)
- • Package: 32-pin, 8 × 20 mm2 TSOP (Type I)
DESCRIPTION
The LH534A00 is a 4M-bit mask-programmable ROM organized as 524,288 × 8 bits. It is fabricated using silicon-gate CMOS process technology. PIN CONNECTIONS 534A00-1 TOP VIEW 10A16 NC OE A14 A17 A18 VCC A13 D 6 D 5 D 3 D 2 D 0
29 D 7
19 A 1
18 A 2
32-PIN TSOP (Type I) A10 CE A11 D 1 Figure 1. Pin Connections for TSOP Package
30 TIMING
Figure 2. LH534A00 Block Diagram
CE OE DATA OUTPUT SUPPLY CURRENT H X High-Z Standby L H High-Z Operating L Output Operating NOTE: X = H or L, High-Z = High-impedance ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RA TING UNIT Supply voltage VCC –0.3 to +7.0 V Input voltage V IN –0.3 to VCC + 0.3 V Output voltage V OUT –0.3 to VCC + 0.3 V Operating temperature Topr –20 to +70 °C Storage temperature Tstg –65 to +150 °C RECOMMENDED OPERATING CONDITIONS (T A = –20°C to +70°C) PARAMETER SYMBOL MIN. TYP . MAX. UNIT Supply voltage V CC 4.5 5.0 5.5 V DC CHAR ACTERISTICS (VCC = 5 V ±10%, TA = –20°C to +70°C) PARAMETER SYMBOL CONDITIONS MIN. MAX. UNIT NOTE Input ‘High’ voltage V IH 2.2 V CC + 0.3 V Input ‘Low’ voltage V IL –0.3 0.8 V Output ‘High’ voltage VOH IOH = –400 µA 2.4 V Output ‘Low’ voltage V OL IOL = 2.0 mA 0.4 V Input leakage current | ILl | V IN = 0 V to VCC 10 µA Output leakage current | ILO |V OUT = 0 V to VCC 10 µA 1 Operating current ICC1 tRC = 120 ns 65 mA 2 ICC2 tRC = 1 µs 50 mA 2 ICC3 tRC = 120 ns 60 mA 3 ICC4 tRC = 1 µs 45 mA 3 Standby current ISB1 CE = VIH 3 mA ISB2 CE = VCC – 0.2 V 100 µA Input capacitance C IN f = 1 MHz TA = 25°C 10 pF Output capacitance C OUT 10 pF NOTES: 1. CE/OE = VIH 2. V IN = VIH or VIL, CE = VIL, outputs open 3. V IN = (VCC – 0.2 V) or 0.2 V, CE = 0.2 V, outputs open CMOS 4M MROM LH534A00
- This is the time required for the outputs to become high-impedance.
the VCC pin and the GND pin. intervals, tAA , tACE , or tOE , have concluded. Figure 3. Timing Diagram
ORDERING INFORMATION
DIMENSIONS IN MM [INCHES] MAXIMUM LIMIT MINIMUM LIMIT 32TSOP (Type I) (TSOP032-P-0820) 20.30 [0.799] 19.70 [0.776] 18.60 [0.732] 18.20 [0.717] 19.00 [0.748] 8.20 [0.323] 7.80 [0.307] 0.15 [0.006] 0.20 [0.008] 0.00 [0.000] 1.20 [0.047] MAX. 0.20 [0.008] 0.10 [0.004] 0.30 [0.012] 0.10 [0.004] 0.50 [0.020] TYP. 32TSOP 1.10 [0.043] 0.90 [0.035] 0.425 [0.017] 32-pin, 8 × 20 mm 2 TSOP (Type I) 32-pin, 8 x 20 mm2 TSOP (Type I) (TSOP032-P-0820) LH534A00 Device Type T Package 534A00-4 Example: LH534A00T (CMOS 4M (512K x 8) Mask-Programmable ROM, 32-pin, 8 x 20 mm2 TSOP (Type I)) CMOS 4M (512K x 8) Mask-Programmable ROM CMOS 4M MROM LH534A00