LH52258A SHARP | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 9

Technical content

LH52258A CMOS 32K × 8 Static RAM

FEATURES

  • • Fast Access Times: 20/25 ns
  • • Low-Power Standby when Deselected
  • • TTL Compatible I/O
  • • 5 V ± 10% Supply
  • • Fully-Static Operation
  • • JEDEC Standard Pinout
  • • Packages: 28-Pin, 300-mil DIP 28-Pin, 300-mil SOJ FUNCTIONAL DESCRIPTION The LH52258A is a high-speed 262,144 bit static RAM organized as 32K × 8. A fast, efficient design is obtained with a CMOS periphery and a matrix constructed with polysilicon load memory cells. This RAM is fully static in operation. The Chip Enable E) control permits Read and Write operations when active (LOW) or places the RAM in a low-power standby mode when inactive (HIGH). Standby power (I SB1 ) drops to its lowest level if E is raised to within 0.2 V of VCC . Write cycles occur when both Chip Enable (E) and Write Enable (W) are LOW. Data is transferred from the DQ pins to the memory location specified by the 15 address lines. The proper use of the Output Enable control ( G) can prevent bus contention. When E is LOW and W is HIGH, a static Read will occur at the memory location specified by the address lines. G must be brought LOW to enable the outputs. Since the device is fully static in operation, new Read cycles can be performed by simply changing the address. High-frequency design techniques should be em- ployed to obtain the best performance from this device. Solid, low-impedance power and ground planes, with high-frequency decoupling capacitors, are recom- mended. Series termination of the inputs should be con- sidered when transmission line effects occur. PIN CONNECTIONS 52258A-1D A A12 VSS VCC W A11 G A10 DQ 7 DQ 6 DQ 5 DQ 3 DQ 0 DQ 4 A13 DQ 1 DQ 2 E 28-PIN DIP 28-PIN SOJ TOP VIEW

Figure 1. Pin Connections for DIP and

Figure 2. LH52258A Block Diagram

ABSOLUTE MAXIMUM RATINGS 1 PARAMETER RATING VCC to VSS Potential –0.5 V to 7 V Input Voltage Range –0.5 V to V CC + 0.5 V DC Output Current 2 ± 40 mA Storage T emperature Range –65 o to 150oC Power Dissipation (Package Limit) 1.0 W NOTES: 1. Stresses greater than those listed under ‘Absolute Maximum R atings’ may cause permanent damage to the device. This is a stress rating for transient conditions only. Functional operation of the device at these or any other conditions above those indicated in the ‘Operating Range’ section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Outputs should not be shorted for more than 30 seconds. No more than one output should be shorted at any time. OPERATING RANGES SYMBOL PARAMETER MIN TYP MAX UNIT TA Temperature, Ambient 07 0 oC VCC Supply Voltage 4.5 5.0 5.5 V VSS Supply Voltage 00 0 V VIL Logic ‘0’ Input Voltage 1 –0.5 0.8 V VIH Logic ‘1’ Input Voltage2.2 V CC + 0.5 V NOTE: 1. Negative undershoot of up to 3.0 V is permitted once per cycle. DC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER TEST CONDITIONS MIN TYP 1 MAX UNIT ICC1 Operating Current 2 tRC = 20 ns G ≥ VIH, E ≤ VIL, IOUT = 0 mA, tCYCLE = 20 ns 95 150 mA ICC1 Operating Current 2 tRC = 25 ns G ≥ VIH, E ≤ VIL, IOUT = 0 mA, tCYCLE = 25 ns 90 140 mA ISB1 Standby Current E ≥ VCC – 0.2 V 0.005 1 mA ISB2 Standby Current E ≥ VIH 61 5 m A ILI Input Leakage Current VCC = 5.5 V , VIN = 0 V to VCC –2 2 µA ILO I/O Leakage Current V CC = 5.5 V , VIN = 0 V to VCC –2 2 µA VOH Output High Voltage I OH = –4.0 mA 2.4 V VOL Output Low Voltage I OL = 8.0 m A 0.4 V VDR Data Retention VoltageE ≥ VCC – 0.2 V 25 . 5 V IDR Data Retention CurrentVCC = 3 V, E ≥ VCC – 0.2 V 250 µA NOTES: 1. Typical values at VCC = 5 V, TA = 25°C. 2. ICC is dependent upon output loading and cycle rates. Specified values are with outputs open, operating at specified cycle times. CMOS 32K × 8 Static RAM LH52258A

AC ELECTRICAL CHARACTERISTICS 1 (Over Operating Range) SYMBOL DESCRIPTION –20 –25 UNITS MIN MAX MIN MAX READ CYCLE tRC Read Cycle Time 20 25 ns tAA Address Access Time 20 25 ns tOH Output Hold from Address Change 44 n s tEA E Low to Valid Data 20 25 ns tELZ E Low to Output Active 2,3 44 n s tEHZ E High to Output High-Z 2,3 01 001 2 n s tGA G Low to Valid Data 10 12 ns tGLZ G Low to Output Active 2,3 00 n s tGHZ G High to Output High-Z 2,3 090 1 0 n s tPU E Low to Power Up Time 3 00 n s tPD E High to Power Down Time 3 25 30 ns WRITE CYCLE tWC Write Cycle Time 20 25 ns tEW E Low to End of Write 15 20 ns tAW Address Valid to End of Write 15 20 ns tAS Address Setup 00 n s tAH Address Hold from End of Write 00 n s tWP W Pulse Width 12 15 ns tDW Input Data Setup Time 10 12 ns tDH Input Data Hold Time 00 n s tWHZ W Low to Output High-Z 2,3 81 0 n s tWLZ W High to Output Active 2,3 00 n s NOTES: 1. AC Electrical Characteristics specified at ‘AC Test Conditions’ levels. 2. Active output to High-Z and High-Z to output active tests specified for a ±500 mV transition from steady state levels into the test load. The test load has 5 pF capacitances. 3. Guaranteed by design but not tested. CMOS 32K × 8 Static RAM LH52258A

28SK-DIP (DIP028-P-0300) DIMENSIONS IN MM [INCHES] MAXIMUM LIMIT MINIMUM LIMIT 11 4 1528 28DIP-1 7.05 [0.278] 6.65 [0.262] 0.51 [0.020] MIN. 4.40 [0.173] 4.00 [0.157] 3.40 [0.134] 3.00 [0.118] 2.54 [0.100] TYP. 0.56 [0.022] 0.36 [0.014] 0.35 [0.014] 0.15 [0.006] DETAIL 35.00 [1.378] 34.40 [1.354] 0° TO 15° 3.65 [0.144] 3.25 [0.128] 7.62 [0.300] TYP. 28-pin, 300-mil DIP PACKAGE DIAGRAMS 28SOJ300 DIMENSIONS IN MM [INCHES] MAXIMUM LIMIT MINIMUM LIMIT 28SOJ (SOJ28-P-300) 1.27 [0.050] TYP. 0.53 [0.021] 0.33 [0.013] DETAIL 7.9 [0.311] 7.5 [0.295] 8.63 [0.340] 8.23 [0.324] 18.7 [0.736] 18.3 [0.720] 1.15 [0.045] 0.85 [0.033] 0.64 [0.025] MIN 7.0 [0.276] 6.6 [0.260] 2.6 [0.102] 2.2 [0.087] 3.7 [0.146] 3.3 [0.130] 0.20 [0.008] 0.8 [0.031] 0.6 [0.024] 0.102 [0.004] 11 4 28 15 28-pin, 300-mil SOJ LH52258A CMOS 32K × 8 Static RAM

25 Access Time (ns)

D 28-pin, 300-mil DIP (DIP28-P-300) K 28-pin, 300-mil SOJ (SOJ28-P-300) LH52258A Device Type X Package - ## Speed 52258AMD CMOS 32K x 8 Static RAM Example: LH52258AK-25 (CMOS 32K x 8 Static RAM, 25 ns, 28-pin, 300-mil SOJ)

ORDERING INFORMATION

CMOS 32K × 8 Static RAM LH52258A