LD1018 LDT | Alldatasheet

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Ver2.0 LD1018

16 Channel Constant Current Driver

16 Channel Constant Current LED Driver

Ver. 2.0 / Mar. 2009 This document is a general product description and is subject to change without notice. LDT Inc. does NOT assume any responsibility for use of circuits described. LD1018

Ver2.0 LD1018 2009.03.251. Change : Supply Voltage Regulation : max ‚ 3% to Max 6% 2. Add : Rext vs Iout (3.3V) Diagram. 3. Add : DC Characteristics (3.3V) 4. Add : AC Characteristics (3.3V) 5. Change :Propagation Delays 2.0 2008.08.12Preliminary Spec.1.0 Transfer DateContentsVersion

Ver2.0 LD1018

DESCRIPTION

The LD1018 is specifically designed for LED display applications. The constant current output can be preset through an external resistor (IOUT = 3mA to 45mA). The device consists of 16bit shift register, latch and constant current output driver. The LD1018 provides a constant output current for driving the LEDs against for the variation of LED forward voltage( Vf ). The LD1018’s excellent current matching characteristics among the output ports and fast output response time will give you the best display quality for LED display system.

FEATURES

  • 16 constant-current output channels
  • Output current : set -up at 3mA to 45mA with an external resistor
  • Pin to pin deviation : max ‚ 1.5%
  • Chip to chip deviation : max ‚ 3%
  • 3.3V/5V CMOS compatible input
  • Delayed output to prevent inrush current
  • Maximum data transfer rate : max 30MHz
  • Fast response of OEB - OUTn (min) : 60ns @VDD=5V, 100ns @VDD=3.3V
  • 3.3V/5V supply voltage
  • Package : LD1018-SP (SOP-24), LD1018-SS (SSOP-24)
  • “Pb_free & Green” Package PIN CONNECTION GND DIN CLOCK STROBE OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 VDD R-EXT DOUT OEB OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8

ORDERING INFORMATION

-40ŠC to 85 ŠC24 SOPLD1018-SP -40ŠC to 85 ŠC24 SSOPLD1018-SS TAPACKAGEPART NUMBER I-REF Q Q OUT0 OUT1 OUT15 Q 16Bit Shift Register R-EXT OEB STROBE DIN CLOCK DOUT 16Bit Data Latch BLOCK DIAGRAM

Ver2.0 LD1018 EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS 1. OEB terminal VDD OEB GND 2. STROBE terminal VDD STROBE GND 3. CLOCK, DIN terminal VDD GND 4. DOUT terminal VDD (DATA) GND CLOCK, DIN DOUT Supply voltageVDD24 Connect the resistor between this pin and GND to set up the constant output current for all the OUTn.REXT23 Serial data output terminal for shifting the data to next chipDOUT22 Output Enable. Active LowOEB21 Constant current outputs for LEDs, n = 0 ~ 15OUTn5 -20 Data is transferred to the output latch at STROBE rising edgeSTROBE4 Shift input clock for serial input data DIN( Rising Edge Clocking)CLOCK3 Serial input dataDIN2 Ground terminalGND1 FUNCTIONPIN NAMEPIN NO

Ver2.0 LD1018 DOUTOUT0 OUT7 OUT15CLOCK STROBE OEB DIN No ChangeDn Dn-7 Dn-15H L Dn No ChangeNo changeL L Dn No ChangeOFF OFF OFF* H Dn Dn Dn-7 Dn-15H L Dn Dn-15No changeL L Dn Dn-15OFF OFF OFF* H Dn Dn-15 [Note] 1) When the state of Dn ~ Dn-15 is “H”, the OUTn is turned ON( “L” : OUTn is turned OFF ). 2) * : Don’t Care

Ver2.0 LD1018 mA725IGNDGND Terminal Current W 1.67 PD SOPPower Dissipation ( On PCB, TA = 25 ) 1.48SSOP SSOP SOP MHz30FCLKCLOCK Frequency V-0.4 ~ VDD + 0.4VINInput Voltage mA60IOUTOutput Current V-0.5 ~ 7.0VOUTOutput Voltage V0 ~ 7.0VDDSupply Voltage -40 ~ 85ToprOperation Temperature /W Rth(j-a) Thermal Resistance ( On PCB, TA = 25 ) -55 ~ 150TstgStorage Temperature UnitRatingSymbolCharacteristic (Ta = 25  unless otherwise noted)

Ver2.0 LD1018 DC CHARACTERISTICS (5.0V) %‚0.2VDS Within 1.0V and 3.0V%/dVDS Output Current vs. Output Voltage Regulation mA21REXT = OPENIDD(off)1 mA5.43REXT = 1.0 ʄ IOUTn = 20mAIDD(off)2 mA5.4 3REXT = 1.0 ʄ IOUTn = 20mAIDD(on)1 mA8 6REXT = 0.5 ʄ IOUT = 40mAIDD(on)2 ʄ400200100RUPPull Up Resistor REXT = 0.5 ʄ IOUT = 40mA mA20REXT = 1.0 ʄIOL1 Output Current1 Pint to Pin %‚1.5REXT = 1.0 ʄ IOUT = 20mAƳIOL1 %‚1.5REXT = 0.5 ʄ IOUT = 40mAƳIOL2 V 1.0VDD-0.8VDDVIH‘H” LevelInput Voltage 0.2VDD-GNDVIL‘L” Level V 0.2VDD-GNDVOLDOUT ‘L” Level Output Voltage VDD-0.8VDDVOH 1.0IOL VDD Within 4.5V and 5.5V REXT = 0.5 ʄ -5.5VOUTOutput Voltage %6.0%/dVDD Output Current vs. Supply Voltage Regulation ʄ400200100RDOWNPull Down Resistor V5.55.03.0VDDSupply Voltage mA 453IOUTOUTn Output Current -1.0IOH DOUT mA40IOL2 Output Current2 Pin to Pin mA86IDD(off)3Supply Current UnitMax.Typ.Min.ConditionSymbolCharacteristics (Ta = 25  unless otherwise noted)

Ver2.0 LD1018 DC CHARACTERISTICS(3.3V) %‚0.2VDS Within 1.0V and 3.0V%/dVDS Output Current vs. Output Voltage Regulation mA21REXT = OPENIDD(off)1 mA5.43REXT = 1.0 ʄ IOUTn = 20mAIDD(off)2 mA5.4 3REXT = 1.0 ʄ IOUTn = 20mAIDD(on)1 mA8 6REXT = 0.5 ʄ IOUT = 40mAIDD(on)2 ʄ400200100RUPPull Up Resistor REXT = 0.5 ʄ IOUT = 40mA mA20REXT = 1.0 ʄIOL1 Output Current1 Pint to Pin %‚1.5REXT = 1.0 ʄ IOUT = 20mAƳIOL1 %‚1.5REXT = 0.5 ʄ IOUT = 40mAƳIOL2 V 1.0VDD-0.8VDDVIH‘H” LevelInput Voltage 0.2VDD-GNDVIL‘L” Level V 0.2VDD-GNDVOLDOUT ‘L” Level Output Voltage VDD-0.8VDDVOH 1.0IOL VDD Within 4.5V and 5.5V REXT = 0.5 ʄ -5.5VOUTOutput Voltage %6.0%/dVDD Output Current vs. Supply Voltage Regulation ʄ400200100RDOWNPull Down Resistor V5.55.03.0VDDSupply Voltage mA 453IOUTOUTn Output Current -1.0IOH DOUT mA40IOL2 Output Current2 Pin to Pin mA86IDD(off)3Supply Current UnitMax.Typ.Min.ConditionSymbolCharacteristics (Ta = 25  unless otherwise noted)

Ver2.0 LD1018 ns2010tW_CLKCLOCK ns11050TpLH1CLOCK-OUTn ns40tW_STBSTROBE ns-60tW_OEBOEB MHz30fCLKMAXMaximum CLOCK Frequency ns--10tsDData Setup Time ns--10thDData Hold Time ns--10tsSSTROBE Setup Time ns--10thSSTROBE Hold Time ns50trMaximum Clock Rise Time ns50tfMaximum Clock Fall Time ns25torMaximum Output Rise Time ns25tofMaximum Output Fall Time Pulse Width ns25-20 VDD = 5.0V VOUT = 1.0V VIH = VDD VIL = GND fCLK = 10MHz REXT = 0.5ʄ IOUTn = 40mA VL = 3.0V CL = 10.0pF RL = 50ʃ tpLHCLOCK-DOUTPropagation Delay Time (Low to High) ns11050tpLH2STROBE-OUTn ns120-30tpLH3OEB-OUTn ns25-20tpHLCLOCK-DOUT ns9040tpHL3OEB-OUTn ns11050tpHL1CLOCK-OUTn Propagation Delay Time (High to Low) UnitMax.Typ.Min.ConditionSymbolCharacteristics AC CHARACTERISTICS (VDD=5.0V) (Ta = 25  unless otherwise noted)

Ver2.0 LD1018 ns2010tW_CLKCLOCK ns16060TpLH1CLOCK-OUTn ns40tW_STBSTROBE ns-80tW_OEBOEB MHz30fCLKMAXMaximum CLOCK Frequency ns--10tsDData Setup Time ns--10thDData Hold Time ns--40tsSSTROBE Setup Time ns--10thSSTROBE Hold Time ns50trMaximum Clock Rise Time ns50tfMaximum Clock Fall Time ns25torMaximum Output Rise Time ns25tofMaximum Output Fall Time Pulse Width ns25-- VDD = 5.0V VOUT = 1.0V VIH = VDD VIL = GND fCLK = 10MHz REXT = 0.5ʄ IOUTn = 40mA VL = 3.0V CL = 10.0pF RL = 50ʃ tpLHCLOCK-DOUTPropagation Delay Time (Low to High) ns16050tpLH2STROBE-OUTn ns120-30tpLH3OEB-OUTn ns25--tpHLCLOCK-DOUT ns18050tpHL3OEB-OUTn ns16060tpHL1CLOCK-OUTn Propagation Delay Time (High to Low) UnitMax.Typ.Min.ConditionSymbolCharacteristics AC CHARACTERISTICS (VDD=3.3V) (Ta = 25  unless otherwise noted)

Ver2.0 LD1018 DC CHARACTERISTIC TEST CIRCUIT AC CHARACTERISTIC TEST CIRCUIT Signal Generator VIH VIL CL VL RL CL VDD LD1018 OUT0 OUT15 DOUT R-EXT GND OEB STROBE DIN CLOCK RL Rext VDD IDD LD1018 OUT0 OUT15 DOUT IOUT R-EXT GND Iref IIH IIL VIH VIL OEB STROBE DIN CLOCK Rext IOH IOL

Ver2.0 LD1018 CLOCK-DOUT, OUTn CLOCK-STROBE OEB-OUTn CLOCK DIN DOUT 10% 50% 90% 10% 50% 90% 50%50% 50% tr tf tW_CLK thDtsD tpLH , tpHL CLOCK DIN STROBE OUTn 50% 50% 50% 50% 50% ON OFF tw_STB th S tsS tpLH1 , tpHL1 tpLH2 , tpHL2 OEB OUTn 10% 50% 90% 10% 50% 90% 50% 50% tpLH3 tpHL3 tW_OEB tor tof

Ver2.0 LD1018 The output current is determined by an external resistor. The relationship between IOUT and REXT is as follows; IOUT[A] = {1.16/(90+REXT)} * 22 When VDD = 5V When VDD = 3.3V IOUT[A] = {1.16/(90+REXT)} * 21 VDD = 5.0V Rext (Ǯ) Rext ȇIout VDD = 3.3V Rext ȇIout Rext (Ǯ)

Ver2.0 LD1018 The LD1018 provides a constant current output characteristics for LED display application. The pin to pin deviation is max +/- 1.5% and chip to chip deviation is max +/- 3%. When VDD = 3.3V 777 7777 777 7065 $VSSFOU ʄ ʄ ʄ ʄ ʄ ʄ IOUT (mA) 7065 $VSSFOU ʄ ʄ ʄ ʄ ʄ ʄ IOUT (mA) When VDD = 5.0V

Ver2.0 LD1018 LED SUPPLY VOLTAGE( VLED ) It is very important to select the proper value of Load Resistor( RL ). Because the optimal VOUT value guarantees the constant output current and long life time of LED driver IC without over power consumption. For example, let’s calculate the Load Resistor value at VLED=5V, Iout=20mA, LED Forward Voltage(Vf)=3V. 1. The full current of LD1018 = 20mA x 16 (channels) = 320mA 2. The power consumption is 320mA x VOUT voltage. - when VOUT = 1V, the power consumption is 320mW. - when VOUT= 2V, the power consumption is 640mW. Therefore, the Load Resistor (RL) = (VLED – VOUT– Vf) / Iout RL = (5V – VOUT – 3V) / 20mA = 50Ǯ (When VOUT = 1V) ↟ ↟ VLED Vf LD1018 VOUT ↟ ↟ VLED Vf LD1018 VOUT RL

Ver2.0 LD1018 PACKAGE POWER DISSIPATION( PD ) The LD1018 provides many package types such as 24-SOP package and 24-SSOP package. The maximum allowable package power dissipation is determined as PD(max) = (Tj – Ta) / R_Theta_JA. When 16 output channels are turned on simultaneously, the actual power dissipation of package is PD(act) = (IDD x VDD) + (IOUT x Duty x VOUT x 16). Therefore, to keep that PD(act) is less than PD(max). The maximum allowable output current as a function of duty cycle is: ( R_Theta_JA = 85C/W ) IOUT = {[(Tj – Ta) / R_Theta_JA] – (IDD x VDD)} / VOUT / Duty / 16 where Tj = 150C 1BDLBHF1PXFS%JTTJQBUJPO "NCJFOU5FNQFSBUVSF $ 1PXFS%JTTJQBUJPO 8 401 4401 *PVU WT %VUZ 4401 %VUZ *PVU N" *PVU WT %VUZ 401 %VUZ *PVU N" ( R_Theta_JA = 75C/W )

Ver2.0 LD1018 APPLICATION CIRCUIT - CASE1 LD1018 OUT0 OUT15 R-EXT CLOCK DOUT VDD OEB STROBE DIN OUT0 OUT15 R-EXT GND GND OUT7 CLOCK DOUT OEB STROBE DIN LD1018 DIN OEB STROBE CLOCK VDD VDD VDD VDD VLED = 5V D00 D07 D015 I15 RL RL RL VLED = 5V D10 D17 D115 I15 RL RL RL Data & Control Signal Connection for 16x2 Static Type Application

Ver2.0 LD1018 D115~D10 D015 ~ D00 ( 1st Data ) D115~D10 D015 ~ D00 (2nd Data) Display On 1st Data Display 2nd

16 Clocks 16 Clocks 16 Clocks 16 Clocks

D115~D10 D015 ~ D00 ( 1st Data ) D115~D10 D015 ~ D00 (2nd Data) 1st Data Display 2nd TIMING DIAGRAM – CASE1 TIMING DIAGRAM – CASE1-1 Timing Diagram for 16x2 Static Type Application Timing Diagram for 16x2 Static Type Application

Ver2.0 LD1018 APPLICATION CIRCUIT – CASE2 Controller R VLED = 5V RL RL RL VDD VDD RL RL RL RL RL RL PNP PNP R R Q15 PNP PNP R R PNP PNP R R D00 D01 D015 D10 D11 D115 D150 D151 D1515 DATA CLK STB ESB DIN CLOCK STROBE OEB VDD DOUTR-EXT GND OUT0 OUT1 OUT15 LD1018 S15 Data & Control Signal Connection for 16x16 Dynamic Type Application

Ver2.0 LD1018 D015 ~ D00 (1st Display Data) OEB D115 ~ D10 ( 2nd Display Data) S15 D1515 ~ D150 (16th Display Data) Row Driver Non Overlap Time (1st Display Data) (2nd Display Data) (16th Display Data)

16 Clocks 16 Clocks 16 Clocks

Timing Diagram for 16x16 Dynamic Type Application

Ver2.0 LD1018 R VLED = 5V RL RL VDD VDD RL RL PNP PNP R R Q15 PNP PNP R R S15 D0000 D0015 D0150 D01515 RL RL D1000 D1015 VDD R RL RL D11515D1150 DATA CLK STB ESB Controller DIN CLOCK STROBE OEB VDD DOUTR-EXT GND OUT0 OUT15 LD1018 DIN CLOCK STROBE OEB VDD DOUTR-EXT GND OUT0 OUT15 LD1018 APPLICATION CIRCUIT – CASE3 Data & Control Signal Connection for 32x16 Dynamic Type Application

Ver2.0 LD1018 D1015 ~ D1000, D0015 ~ D0000 (1st Display Data) OEB S15 (1st Display Data) (16th Display Data)

32 Clocks 32 Clocks

D11515 ~ D1150, D01515 ~ D0150 (16th Display Data) TIMING DIAGRAM - CASE3 Timing Diagram for 32x16 Dynamic Type Application

Ver2.0 LD1018 LD1018-SP (SOP 24)

PACKAGE INFORMATION

Ver2.0 LD1018 LD1018-SS (SSOP 24)