LD1016 LDT | Alldatasheet
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Technical content
Ver1.0 LD1016
16 CHANNEL CONSTANT CURRENT LED DRIVERS
16-CHANNEL CONSTANT Current LED Drivers Ver. 1.0 / Feb. 2003 This document is a general product description and is subject to change without notice. LDT Inc. does NOT assume any responsibility for use of circuits described. LD1016
Ver1.0 LD1016 'JSTU7FSTJPO 5SBOTGFS%BUF$POUFOUT7FSTJPO
Ver1.0 LD1016
DESCRIPTION
FEATURES
▪ $POTUBOU$VSSFOU0VUQVU$IBOOFMT ▪ $POTUBOUPVUQVUDVSSFOUSBOHFN"VQUPN" ▪ 0VUQVUDVSSFOUBEKVTUNFOUUISPVHIBOFYUFSOBMSFTJTUPS ▪ &YDFMMFOU0VUQVU$VSSFOU6OJGPSNJUZ ▪ %FWJBUJPOPGCFUXFFODIBOOFMT .BY ▪ %FWJBUJPOPGCFUXFFO*$ .BY ▪ )JHI4QFFE0QFSBUJPO ▪ .)[DMPDLGSFRVFODZ ▪ 'BTUSFTQPOTFPGPVUQVUDVSSFOU 0&OT .JO ▪ 7$.04$PNQBUJCMF*OQVU ▪ 7BSJFUZPG1BDLBHF5ZQF ▪ 1%*14401401 “1CGSFF”1BDLBHF The LD1016(LD71D0016) is specifically designed for LED display. LD1016 contains a serial buffer and data latches which convert serial input data to parallel output format. At LD1016 output stage, sixteen regulated current ports are designed to provide uniform and constant current for driving LED within a large range of V DS variations. Users may adjust the output current from 5mA to 90mA through an external resistor, REXT which gives users flexibility in controlling the light intensity of LED. The high clock frequency, 25MHz, also satisfies the high speed system requirements. GND DIN CLK STROBE IOUT0 IOUT1 IOUT2 IOUT3 IOUT4 IOUT5 IOUT6 IOUT7 VDD REXT DOUT OEB IOUT15 IOUT14 IOUT13 IOUT12 IOUT11 IOUT10 IOUT9 IOUT8 PIN CONFIGURATION
ORDERING INFORMATION
-40C to 85 CLD71D0016A-SS24-SSOP(300MIL)LD1016-SK -40C to 85 CLD71D0016A-S24-SOP(375MIL)LD1016-SP LD71D0016A-P TOP MARKING -40C to 85 C24-DIP(300MIL)LD1016-PD TAPACKAGE TYPEPART NUMBER
Ver1.0 LD1016 Supply voltage terminalVDD24 Input terminal used to connect an external resistor for setting up output current for all output channelsREXT23 5-20 PIN NO Serial data output to the following DIN of next driver ICDOUT Output enable terminal When OE is low, the output drivers are enabled; when OE is high, all output drivers are turned off OEB Constant current output terminalsI OUT[0:15] Serial data is transferred to the output latch when STOBE is high. The data is latched when STROBE goes lowSTROBE Clock input terminal for data shift to up-edgeCLK Serial data input terminal for shift registerDIN GND terminal for control logic and current sinkGND
Ver1.0 LD1016 DOUT TerminalCLK, DIN Terminal VDD GND CLK, DIN VDD DATA GND OEB Terminal DOUT EQUIVALENT CIRCUIT TIMING DIAGRAM 1 2 3 4 13 14 15 16 CLK DIN ON OFF ON OFF ON OFF ON OFF ON OFF STROBE OE IOUT0 IOUT1 IOUT2 IOUT14 IOUT15 DOUT Don’t care
Ver1.0 LD1016 NOTE: Dn~Dn-15 = “H” then IOUT[0:15] is ON, “L” then IOUT[0:15] is OFF MAXIMUM RATINGS CHARACTERISRIC SYMBOL RATING UNIT Supply Voltage Output Voltage Output current Input Voltage GND Terminal Current Clock Frequency Power Dissipation Operating Temperature Storage Temperature VDD VOUT IOUT[0:15] VIN IGND fCK PD Topr Tstg 0~7.0 -0.5~8.0 -0.4~VDD+0.4 1440 1.78 -40~85 -55~150 V V mA V mA MHz W oC oC Ta = 25oC %O%O %O0''%O %O%O %O•/P$IBOHF%O %065 %*/ 453 $-,
Ver1.0 LD1016 RECOMMENDED OPERATING CONDITION CHARACTERISRIC SYMBOL CONDITION UNIT Supply Voltage VDD V MAX. 5.5 TYP. 5.0 MIN. 4.5- Output Voltage VOUT -8.0--- Output Voltage IOUT mA 90--- IOH -1.0--- IOL 1.0--- IOUT[0:15] DOUT Input Voltage VIN VVDD-0- Data Set Up Time tsetup (D) ns--20- Data Hold Time thold (D) ns--20- STROBE Set up Time tsetup(S) ns--20- STROBE Hold Time thold (S) ns--20- CLK Pulse Width tw CLK ns --15- tw CLK --15- CLK Pulse Width fCK MHz25.0--Cascade Operation Power Dissipation PD W0.74--Ta = 85 o C STROBE Pulse Width tw STB ns --20- tw STB --20- Ta = 25oC
Ver1.0 LD1016
ELECTRICAL CHARACTERISTICS
Test Circuit for Electrical Characteristics VDD IDD LD1016 IOUT0 IOUT15 DOUT IOL REXT GND Iref IIN IIH IIL VIN VIH VIL OE STROBE DIN CHARACTERISRIC SYMBOL TEST CONDITION UNIT Input Voltage VIH V MAX. VDD TYP. MIN. 0.7VDD- TEST CIR- CUIT -“H” Level VIL 0.3VDD-GND--“L” Level Output Voltage VOL V 0.2VDD---- DOUT VOH --0.8VDD-- IOZ 1-VOH = 6.0V- uAOutput Leakage current Output Current1 IOL1 mA43.040.037REXT = 14kW- Delta IOUT IOL1 + 6.0+ 1.5-REXT = 14 kW IOUT = 40mA, VOUT = 1V- % Output Current2 IOL2 mA80.075.070.0REXT = 7.0 kW- Delta IOUT IOL2 + 6.0+ 1.5-REXT = 7.0 kW IOUT = 75mA, VOUT = 1V- % %/VDD 5.01.5-REXT= 14 kW- %/VSupply Voltage Regulation Vref -1.12-REXT=14 kW,Ta =-40~85 o C- VReference Voltage RIN(up) 400200100-- kW Pull up resistor RIN(down) 400200100--Pull down resistor IDD (off) 1 0.60.3-REXT = OPEN, OUTn = OFF- V Supply current IDD (off) 2 1.51.00.5REXT = 14 kW, OUTn = OFF- mA IDD (off) 3 3.02.01.0REXT = 7.0 kW, OUTn = OFF- REXT Ta = 25C
Ver1.0 LD1016 CHARACTERISRIC SYMBOL TEST CONDITION UNIT Propagation Delay Time (“L” to “H”) tPLH ns MAX. TYP. MIN. VDD = 5.0V VOUT = 1.0V VIH = VDD VIL = GND fCK = 10MHz REXT = 10 kW IOUT = 40mA VL = 3.0V CL = 10.0pF RL = 65W TEST CIR- CUIT CLK-DOUT 1500600CK-OUTn 1500600STROBE- OUTn 1500600OE-OUTn Propagation Delay Time (“H” to “L”) tPHL ns 7030- CK-DOUT 1000350CK-OUTn 1000350STROBE- OUTn 1000350OE-OUTn Max. Clock Frequency fCKMAX (*1) MHz2510-- 5020-CLK 4010STROBE - Propagation Delay Time (“H” to “L”) ns tWCK - tW STB - Data Set Up Time tsetup (D) ns 3010-- Data Hold Time thold (D) 3010-- 2010-LH 200HL - STROBE Setup Time nst STB setup - 2010-LH 200HL - STROBE Hold Time nst STB hold - Max. Clock Rise Time tr 10-- - ns Max. Clock Fall Time tf 10-- Min. Output Rise Time tor 1000300- - ns Min. Output Rise Time tof 600150- AC CHARACTERISTICS NOTE: . *1 : Cascade Operation Ta = 25C SW-MATRIX VIH VIL CL VL RL CL VDD LD1016 IOUT0 IOUT15 DOUT REXT GND OE STROBE DIN Test Circuit for AC Characteristics
Ver1.0 LD1016 H L H L H L CLK DIN on off 50% 50% tsetup STROBE IOUT[0:15] tpHLtpLH 50% 50% 50% 50% H L on off OE IOUT[0:15] CLK to DOUT, IOUT[0:15] H L H on L off CLK DIN DOUT IOUT[0:15] tpHL tw tsetup tHold tor tof tpLH 90% 50% 10% 90% 50% 10% 90% 50% 10% 90% 50% 10% 50% 50%50% H L TIMING WAVEFORM CLK to STROBE OE to IOUT[0:15]
Ver1.0 LD1016 6K7K 9K 10K 15K 20K 30K 60K 100 REXT -I OUT IOUT (mA) Resistance of the external resister REXT in W VDS = 1.0V REXT IOUT 9 kΩ 60mA 11 kΩ 50mA 14 kΩ 40mA 19 kΩ 30mA 29 kΩ 20mA 59 kΩ 10mA 7 kΩ 75mA 6 kΩ 85mA Adjusting Output Current The output current of each channel (IOUT) is set by an external resistor REXT. The relationship between IOUT and REXT is shown in the following figure. Also, the output current can be calculated from the equation: VR-EXT = 1.2V ; Internal resistance RINT = 1KΩ IOUT = [VR-EXT / (REXT + RINT )] X 480 where REXT is the resistance of the external resistor connected to REXT terminal and VR-EXT is the voltage of REXT terminal. The magnitude of current (as a function of REXT) is around 40mA at 14KΩ and 20mA at 29KΩ Constant Current In LED display application, LD1016 provides nearly no variation in current from channel to channel and IC to IC. This can be achieved by: 1) The maximum current variation between channels is less than 3%, and that between ICs is less than 6%. 2) In addition, the current characteristic of output stage is flat. The output current can be kept constant regardless of the variations of LED forward voltage. This perform as a perfection of load regulation.
Ver1.0 LD1016 VDD = 5V VLED = 5V 0 7 15 0 7 15 I15 I15 I0 = I7 = I15 OE STROBE DIN IOUT0 IOUT15REXT GND IOUT7 CLK DOUT OE STROBE DIN LD1016
Ver1.0 LD1016
PACKAGE INFORMATION
(0.002 MIN)
24 SSOP – 300 mil
#12 #13 #24 7.90 + 0.30 (0.311 + 0.012) 15.20 + 0.20 (0.598 + 0.008) 15/60 MAX (0.614 MAX)
2.00 MAX
0.079 MAX
1.75 + 0.10 (0.069 + 0.004)
0.05 MIN
0.45 +-.10+0.501.27 (0.050) 5.30 + 0.20 (0.209 + 0.008) 7.62 (0.300) 0.60 + 0.20 (0.024 + 0.008) 0~8 o 0.20 + 0.10 -0.05 Unit : mm (inch)
Ver1.0 LD1016 #12 #13 #24 10.30 + 0.30 (0.406 + 0.012) 15.34 + 0.20 (0.604 + 0.008) 15/74MAX (0.620MAX) MIN0.05 (MINO.002) 0.38 +0.10-0.051.27 (0.050) 2.60MAX (0.102MAX) 0.69 (0.027) 2.35 + 0.10 (0.093 + 0.004) 7.50 + 0.20 (0.295 + 0.008) 9.53 (0.375) 0.87 + 0.20 (0.034 + 0.008) 0~8 o Unit : mm (inch)
24 SOP – 375mil
Ver1.0 LD1016 Unit : inch 0.258 + 0.025 1.250 + 0.03 0.300 q=7~15o 0.355+ 0.02 0.018typ 0.100typ 0.050typ 0.130 + 0.02 0.210 SETING PLANE 0.130 + 0.05