IH6208 HARRIS | Alldatasheet

Document overview

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Technical content

Features

  • Ultra Low Leakage - ID(OFF) ≤ 100pA (Typ)
  • r DS(ON) < 400Ω Over Full Signal and Temperature Range
  • Power Supply Quiescent Current Less Than 100µA
  • ±14V Analog Signal Range
  • No SCR Latchup
  • Break-Before-Make Switching
  • Binary Address Control (2 Address Inputs Control 2 Out of 8 Channels)
  • TTL and CMOS Compatible Address Control
  • Pin Compatible with DG509A, HI-509 and ADG509A
  • Internal Diode in Series with V+ for Fault Protection

Description

The IH6208 is a CMOS 2 of 8 multiplexer. The part is a plug-in replacement for the DG509A. Two-line binary decoding is used so that the 8 channels can be controlled in pairs by the binary inputs; additionally a third input is provided for use as a system enable. When the ENABLE input is high (5V), the channels are sequenced by the 2 line binary inputs, and when low (0V) all channels are off. The 2 Address inputs arecontrolled by TTL logic or CMOS logic elements with a “0” corresponding to any voltage less than 0.8V and a “1” corresponding to any voltage greater than 2.4V. Note that the ENABLE input must be taken to 5V to enable the system, and less than 0.8V to disable the system. Pinout IH6208 (CERDIP, PDIP) TOP VIEW Functional Diagram Part Number Information PART NUMBER TEMP. RANGE ( oC) PACKAGE PKG. NO. IH6208MJE -55 to 125 16 Ld CERDIP F16.3 IH6208MJE/883B -55 to 125 16 Ld CERDIP F16.3 IH6208MFE/883B -55 to 125 16 Ld Flat Pack K16.A IH6208CJE 0 to 70 16 Ld CERDIP F16.3 IH6208CPE 0 to 70 16 Ld PDIP E16.3 A 0 EN S2a S3a S4a A 1 S2b S3b S4b GND D b S1bS1a D a TRUTH TABLE A 1 A 0 EN ON SWITCH PAIR x x 0 None 0 0 1 1a, 1b 0 1 1 2a, 2b 1 0 1 3a, 3b 1 1 1 4a, 4b NOTE: A 0, A1 Logic “1” = VAH ≥ 2.4V, VENH ≥ 4.5V Logic “0” = VAL ≤ 0.8V. S1a S2a S3a S4a S1b S3b S4b S2b D a Db ADDRESS DECODER

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2 LINE BINARY ADDRESS INPUTS

(0 0) AND EN = 5V (EN = “1” for +5V, “0” for 0V) CHANNELS 1a AND 1b ON. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1997 File Number 3157.2 OBSOLETE PRODUCT POSSIBLE SUBSTITUTE PR ODUCT DG409, DG509A, HI-0509(A)

Absolute Maximum Ratings Thermal Information Operating Conditions Temperature Range Thermal Resistance (Typical, Note 1)θJA (oC/W) θJC (oC/W) oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsV+ = 15V, V- = -15V, VEN = +5V, Ground = 0V, Unless Otherwise Specified, (Note 4) PARAMETER MEASURED TERMINAL NO TESTS PER TEMP TYP 25oC TEST CONDITIONS M SUFFIX (oC) C SUFFIX ( oC) UNITS-55 25 125 0 25 70 SWITCH r DS(ON) S to D 8 180 V D = +10V, IS = -1.0mA Sequence Each Switch On V AL = 0.8V, VAH = 2.4V 300 300 400 350 350 450 Ω 8 150 V D = -10V, IS = -1.0mA Sequence Each Switch On V AL = 0.8V, VAH = 2.4V 300 300 400 350 350 450 Ω ΔrDS(ON) 20 ΔrDS(ON) = VS =±10V IS(OFF) S 8 0.002 V S = 10V, VD = -10V - ±0.5 ±50 - ±1 ±50 nA 8 0.002 V S = -10V, VD = 10V, VEN = 0.8V ID(OFF) D 2 0.03 V D = 10V, VS = -10V, VEN = 0.8V 2 0.03 V D = -10V, VS = 10V, VEN = 0.8V ID(ON) D 8 0.1 V S(ALL)= VD = 10V, Sequence Each Switch On V AL = 0.8V, VAH = 2.4V 8 0.1 V S(ALL) = -10V, Sequence Each Switch On V AL = 0.8V, VAH = 2.4V INPUT IAN(ON) A0, A1 2 0.01 V A = 0V - -10 -30 - -10 -30 µA IAN(OFF) 2 0.01 V A = 14V - 10 30 - 10 30 µA IA A0, A1 2 0.01 V EN = 5V, All VA = 0V (Address Pins) EN 1 0.01 V EN = 0V, All VA = 0V (Address Pins) rDS ON() MAX rDS ON() MIN– rDS ON() AVG IH6208

  1. See “Enable Input Strobing Levels” in Application Section.

FIGURE 1. tTRANSITION SWITCHING TEST CIRCUIT AND WAVEFORMS