GA1085 TRIQUINT | Alldatasheet

Document overview

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Technical content

Features

  • Wide frequency range:

24 MHz to 105 MHz

  • Output configurations: Four outputs at f REF Four outputs at f REF /2 Two outputs at fREF /2 ␣␣␣␣with adjustable phase Five outputs at 2x f REF Three outputs at f REF Two outputs at fREF ␣␣␣␣with adjustable phase
  • Selectable Phase Shift: –2t, –t, +t, and +2t (t = 1/f VCO)
  • Low output-to-output skew: 150 ps (max) within a group
  • Near-zero propagation delay: –350 ps +1000 ps (max)
  • TTL-compatible with 30 mA output drive
  • 28-pin J-lead surface-mount package

Figure 1. Block Diagram and operates over a wide range of frequencies—from 24 MHz to 105 MHz. A very stable internal Phase-Locked Loop (PLL) provides low-jitter operation. This completely self-contained PLL requires no external capacitors or resistors. between the reference clock (REFCLK) and each of the outputs. of sourcing and sinking 30 mA.

the GA1085 to operate between 24 MHz and 105 MHz. the reference clock is divided by 4, 5, or 6. with 30 mA symmetric drive and a minimum VOH of 2.4 V. required for synchronization (TSYNC) is 500 ms. Table 1. Frequency Mode Selection Note: 1. This mode produces outputs with 40/60 duty cycle for Q4 – Q8 only.

For additional information and latest specifications, see our website: www.triquint.com4 Storage temperature –65 °C to +150 °C Ambient temperature with power applied 2 –55 °C to +100 °C Supply voltage to ground potential –0.5 V to +7.0 V DC input voltage –0.5 V to (V DD + 0.5) V DC input current –30 mA to +5 mA Package thermal resistance (MQuad) θJA = 45 °C/W Die junction temperature TJ = 150 °C ␣␣␣␣ Symbol Description Test Conditions Min 3 Typ Max 3 Unit VOHT Output HIGH voltage V DD = Min IOH = –30 mA 2.4 3.4 V VIN = VIH or VIL VOHC Output HIGH voltage V DD = Min IOH = –1 mA 3.2 4.1 V VIN = VIH or VIL VOL Output LOW voltage V DD = Min IOL = 30 mA 0.27 0.5 V VIN = VIH or VIL VIH 4 Input HIGH level Guaranteed input logical 2.0 V HIGH voltage for all Inputs VIL4 Input LOW level Guaranteed input logical 0.8 V LOW voltage for all inputs IIL Input LOW current V DD = Max VIN = 0.40 V –156 –400 µA IIH Input HIGH current V DD = Max VIN = 2.7 V 0 25 µA II Input HIGH current V DD = Max VIN = 5.5 V 2 1000 µA IDDS5 Power supply current V DD = Max 119 160 mA VI Input clamp voltage V DD = Min IIN = –18 mA –0.70 –1.2 V Notes: 1. Exceeding these parameters may damage the device. 2. Maximum ambient temperature with device not switching and unloaded. 3. Typical limits are at V DD = 5.0 V and T A = 25 °C. 4. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included. 5. This parameter is measured with device not switching and unloaded. 6. These parameters are not 100% tested, but are periodically sampled. Symbol Description Test Conditions Min Typ Max Unit CIN 6 Input capacitance V IN = 2.0 V at f = 1 MHz 6 pF DC Characteristics (VDD = +5 V + 5%, TA = 0 °C to +70 °C) Absolute Maximum Ratings 1 Capacitance

  1. The PLL maintains alignment of CLK and FBIN at all times. This specification applies to the rising edge only because the inpu t duty

cycle can vary while the output duty cycle is typically 50/50. The delay t PD is measured at the 1.5 V level between CLK and FBIN.

  1. Skew specifies the width of the window in which outputs switch, and is measured at 1.5 V.
  2. This specification represents the deviation from 50/50 on the outputs.
  3. Jitter specifications refer to peak-to-peak value. t JR is the jitter on the output with respect to the reference clock.

tJP is the jitter on the output with respect to the output’s previous rising edge.

  1. tSYNC is the time required for the PLL to synchronize; this assumes the presence of a CLK signal and

a connection from one of the outputs to FBIN. Figure 3. AC Test Circuit

SYSTEM TIMINGSYSTEM TIMING PRODUCTS 7For additional information and latest specifications, see our website: www.triquint.com 28-Pin MQuad Pin Description Pin # Pin Name Description I/O

1 GND Ground —

2 Q9 Output Clock 9 (C1) O

3 Q10 Output Clock 10 (C2) O

4 VDD +5 V —

5 GND Ground —

6 F0 Frequency Select 0 I

7 F1 Frequency Select 1 I

8 S0 Shift Select 0 I

9 REFCLK Reference Clock I

10 S1 Shift Select 1 I

11 FBIN Feedback In I

12 TEST Test I

13 VDD +5 V —

14 Q0 Output Clock 0 (B1) O

.050 TYP. NON-ACCUM. .445 ±.005 .490 ±.005 .445 ±.005 .490 ±.005 .045 X 45°° .132 ±.005 .050 TYP. .410 ±.015.018 .104 ±.005 .172 ±.005 22 .445 ±.005 .040 MIN .015 X 45°° 0.125 VENT PLUG .028 .060 (All dimensions are in inches) 28-Pin MQuad J-Leaded Package Mechanical Specification Pin # Pin Name Description I/O

15 GND Ground —

16 Q1 Output Clock 1 (B2) O

17 Q2 Output Clock 2 (B3) O

18 VDD +5 V —

19 GND Ground —

20 Q3 Output Clock 3 (B4) O

21 Q4 Output Clock 4 (A1) O

22 VDD +5 V —

23 Q5 Output Clock 5 (A2) O

24 Q6 Output Clock 6 (A3) O

25 GND Ground —

26 VDD +5 V —

27 Q7 Output Clock 7 (A4) O

28 Q8 Output Clock 8 (A5) O

Table 6. Characteristics Above V DD and Below Ground Table 9. Rise and Fall Times Figure 11. Output Model Table 7. Device and Bond-Wire Characteristics Table 8. 28-Pin MQuad Package Characteristics

For additional information and latest specifications, see our website: www.triquint.com10

Ordering Information

To order, please specify as shown below: GA1085-MC nnnn 11-Output Configurable Clock Buffer Propagation delay skew: 1000 = –350 ps ± 1000 ps Temperature range: Commercial (0 °C to 70 °C) Package: MQuad For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Tel: (503) 615-9000 Email: sales@tqs.com Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: applications@tqs.com The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright © 1997 TriQuint Semiconductor, Inc. All rights reserved. Revision 1.1.A November 1997