FM25C160-GA

FM25C160 RAMTRON | Alldatasheet

Document overview

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• PDF pages: 13

Technical content

Features

16K bit Ferroelectric Nonvolatile RAM

• Organized as 2,048 x 8 bits
• High Endurance 1 Trillion (1012) Read/Writes
• NoDelay™ Writes
• Advanced High-Reliability Ferroelectric Process Very Fast Serial Peripheral Interface - SPI
• Up to 15 MHz maximum Bus Frequency
• Direct hardware replacement for EEPROM
• SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1) Sophisticated Write Protection Scheme
• Hardware Protection
• Software Protection Low Power Consumption
• 10 µA Standby Current Industry Standard Configuration
• Automotive Temperature -40° C to +125° C o Qualified to AEC Q100 Specification
• “Green”/RoHS 8-pin SOIC

Description

The FM25C160 is a 16-kilobit nonvolatile memory employing an advanced ferroelectric process. A ferroelectric random access memory or FRAM is nonvolatile but operates in other respects as a RAM. It provides reliable data retention for years while eliminating the complexities, overhead, and system level reliability problems caused by EEPROM and other nonvolatile memories. Unlike serial EEPROMs, the FM25C160 performs write operations at bus speed. No write delays are incurred. Data is written to the memory array immediately after it has been successfully transferred to the device. The next bus cycle may commence immediately. In addition, the product offers substantial write endurance compared with other nonvolatile memories. The FM25C160 is capable of supporting up to 10 12 read/write cycles -- far more than most systems will require from a serial memory. These capabilities make the FM25C160 ideal for nonvolatile memory applications requiring frequent or rapid writes. Examples range from data collection, where the number of write cycles may be critical, to demanding automotive controls where the long write time of EEPROM can cause data loss. The FM25C160 provides substantial benefits to users of serial EEPROM, in a hardware drop-in replacement. The FM25C160 uses the high-speed SPI bus, which enhances the high-speed write capability of FRAM technology. The specifications are guaranteed over an automotive temperature range of -40°C to +125°C. Pin Configuration Pin Name Function /CS Chip Select /WP Write Protect /HOLD Hold SCK Serial Clock SI Serial Data Input SO Serial Data Output VDD 5V VSS Ground

Ordering Information

FM25C160-GA “Green” 8-pin SOIC, Auto- motive Grade 1 CS SO WP VSS VDD HOLD SCK SI

Figure 1. Block Diagram the function of /WP is different from the FM25160. level to meet IDD specifications.

• SI may be connected to SO for a single pin data interface.

the falling edge of the serial clock.

• SO may be connected to SI for a single pin data interface.

FM25C160 - Automotive Temp. Rev. 3.1 July 2007 Page 3 of 13 Overview The FM25C160 is a serial FRAM memory. The memory array is logically organized as 2,048 x 8 and is accessed using an industry standard Serial Peripheral Interface or SPI bus. Functional operation of the FRAM is similar to serial EEPROMs. The major difference between the FM25C160 and a serial EEPROM with the same pin-out relates to its superior write performance. It also differs from Ramtron’s 25160 by supporting SPI mode 3 and the industry standard 16-bit addressing protocol. This makes the FM25C160 a drop-in replacement for most 16Kb SPI EEPROMs that support modes 0 & 3. Memory Architecture When accessing the FM25C160, the user addresses 2,048 locations each with 8 data bits. These data bits are shifted serially. The addresses are accessed using the SPI protocol, which includes a chip select (to permit multiple devices on the bus), an op-code and a two-byte address. The upper 5 bits of the address range are ‘don’t care’ values. The complete address of 11-bits specifies each byte address uniquely. Most functions of the FM25C160 either are controlled by the SPI interface or are handled automatically by on-board circuitry. The access time for memory operation essentially is zero, beyond the time needed for the serial protocol. That is, the memory is read or written at the speed of the SPI bus. Unlike an EEPROM, it is not necessary to poll the device for a ready condition since writes occur at bus speed. That is, by the time a new bus transaction can be shifted into the part, a write operation will be complete. This is explained in more detail in the interface section below. Users expect several obvious system benefits from the FM25C160 due to its fast write cycle and high endurance as compared with EEPROM. However there are less obvious benefits as well. For example in a high noise environment, the fast-write operation is less susceptible to corruption than an EEPROM since it is completed quickly. By contrast, an EEPROM requiring milliseconds to write is vulnerable to noise during much of the cycle. Note: The FM25C160 contains no power management circuits other than a simple internal power-on reset. It is the user’s responsibility to ensure that VDD is within data sheet tolerances to prevent incorrect operation. It is recommended that the part is not powered down with chip enable active. Serial Peripheral Interface – SPI Bus The FM25C160 employs a Serial Peripheral Interface (SPI) bus. It is specified to operate at speeds up to 15 MHz. This high-speed serial bus provides high performance serial communication to a host microcontroller. Many common microcontrollers have hardware SPI ports allowing a direct interface. It is quite simple to emulate the port using ordinary port pins for microcontrollers that do not. The FM25C160 operates in SPI Mode 0 and 3. The SPI interface uses a total of four pins: clock, data-in, data-out, and chip select. A typical system configuration uses one or more FM25C160 devices with a microcontroller that has a dedicated SPI port, as Figure 2 illustrates. Note that the clock, data-in, and data-out pins are common among all devices. The Chip Select and Hold pins must be driven separately for each FM25C160 device. For a microcontroller that has no dedicated SPI bus, a general purpose port may be used. To reduce hardware resources on the controller, it is possible to connect the two data pins (SI, SO) together and tie off (high) the Hold pin. Figure 3 shows a configuration that uses only three pins. Protocol Overview The SPI interface is a synchronous serial interface using clock and data lines. It is intended to support multiple devices on the bus. Each device is activated using a chip select. Once chip select is activated by the bus master, the FM25C160 will begin monitoring the clock and data lines. The relationship between the falling edge of /CS, the clock and data is dictated by the SPI mode. The device will make a determination of the SPI mode on the falling edge of each chip select. While there are four such modes, the FM25C160 supports modes 0 and 3. Figure 4 shows the required signal relationships for modes 0 and 3. For both modes, data is clocked into the FM25C160 on the rising edge of SCK and data is expected on the first rising edge after /CS goes active. If the clock begins from a high state, it will fall prior to beginning data transfer in order to create the first rising edge. The SPI protocol is controlled by op-codes. These op-codes specify the commands to the part. After /CS is activated the first byte transferred from the bus master is the op-code. Following the op-code, any addresses and data are then transferred. Note that the WREN and WRDI op-codes are commands with no subsequent data transfer. Important: The /CS pin must go inactive after an operation is complete and before a new op-code can be issued. There is one valid op-code only per active chip select.

protect inadvertent changes to the block protect bits. register is write protected if WPEN=1 and /WP=0. Table 4. Write Protection

0 X X Protected Protected Protected

any number of sequential writes may be performed. op-code. The next op-code is the WRITE instruction. value. The upper 5-bits of the address are don’t care. code and address are complete, the SI line is ignored. edge of /CS terminates a READ op-code operation. but the SCK pin can toggle during a hold state.

FM25C160 - Automotive Temp. Rev. 3.1 July 2007 Page 9 of 13 Electrical Specifications Absolute Maximum Ratings Symbol Description Ratings VDD Power Supply Voltage with respect to V SS -1.0V to +7.0V VIN Voltage on any pin with respect to V SS -1.0V to +7.0V and VIN < VDD+1.0V TSTG Storage Temperature -55°C to + 125°C TLEAD Lead Temperature (Soldering, 10 seconds) 300° C VESD Electrostatic Discharge Voltage - Human Body Model (JEDEC Std JESD22-A114-B) - Charged Device Model (JEDEC Std JESD22-C101-A) - Machine Model (JEDEC Std JESD22-A115-A) 4kV 1kV 400V Package Moisture Sensitivity Level MSL-1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and the functional operation of the device at these or any other conditions above those listed in the operational section of this specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. DC Operating Conditions (TA = -40° C to + 125° C, VDD = 4.5V to 5.5V unless otherwise specified) Symbol Parameter Min Typ Max Units Notes VDD Power Supply Voltage 4.5 5.0 5.5 V IDD VDD Supply Current @ SCK = 1.0 MHz @ SCK = 15.0 MHz 0.5 6.5 mA mA ISB Standby Current @ 85°C @ 125°C µA µA ILI Input Leakage Current ±1 µA 3 ILO Output Leakage Current ±1 µA 3 VIL Input Low Voltage -0.3 0.25 V DD V VIH Input High Voltage 0.75 V DD V DD + 0.3 V VOL Output Low Voltage @ IOL = 2 mA 0.4 V VOH Output High Voltage @ IOH = -2 mA VDD – 0.8 V VHYS Input Hysteresis 0.05 V DD V 4 Notes 1. SCK toggling between VDD-0.3V and VSS, other inputs VSS or VDD-0.3V. 2. SCK = SI = /CS=VDD. All inputs VSS or VDD. 3. VIN or VOUT = VSS to VDD. 4. This parameter is characterized but not 100% tested. Applies only to /CS and SCK pins.

FM25C160 - Automotive Temp. Rev. 3.1 July 2007 Page 10 of 13 AC Parameters (TA = -40° C to +125° C, VDD = 4.5V to 5.5V unless otherwise specified) Symbol Parameter Min Max Units Notes fCK SCK Clock Frequency 0 15 MHz tCH Clock High Time 30 ns 1 tCL Clock Low Time 30 ns 1 tCSU Chip Select Setup 10 ns tCSH Chip Select Hold 10 ns tOD Output Disable 25 ns 2 tODV Output Data Valid 25 ns tOH Output Hold 0 ns tD Deselect Time 80 ns tR Data In Rise Time 50 ns 2,3 tF Data In Fall Time 50 ns 2,3 tSU Data Setup Time 5 ns tH Data Hold Time 5 ns tHS /Hold Setup Time 10 ns tHH /Hold Hold Time 10 ns tHZ /Hold Low to Hi-Z 25 ns 2 tLZ /Hold High to Data Active 20 ns 2 Notes 1. tCH + tCL = 1/fCK. 2. This parameter is characterized and not 100% tested. 3. Rise and fall times measured between 10% and 90% of waveform. Capacitance (TA = 25° C, f=1.0 MHz, VDD = 5V) Symbol Parameter Min Max Units Notes CO Output Capacitance (SO) - 8 pF 1 CI Input Capacitance - 6 pF 1 Notes 1. This parameter is characterized and not 100% tested. AC Test Conditions Input Pulse Levels 10% and 90% of V DD Input rise and fall times 5 ns Input and output timing levels 0.5 V DD Output Load Capacitance 30 pF

FM25C160 - Automotive Temp. Rev. 3.1 July 2007 Page 11 of 13 Serial Data Bus Timing 1/fCK tCL tCH tCSH tODV tOH tOD tCSU tSU tH tD tRtF /Hold Timing Data Retention (VDD = 4.5V to 5.5V) Parameter Min Max Units Notes Data Retention @ TA = 55°C (average) @ TA = 125°C 9000 Years Hours Note: The device is guaranteed to retain data after both conditions have been applied : (1) 17 yrs at an average temperature of 55°C and (2) 9000 hrs at 125°C. Typical Grade 1 Operating Profile 200 400 600 800 1000 1200 1400 1600 70 75 80 85 90 95 100 105 110 115 120 125 Temperature (°C) Hours Typical Grade 1 Storage Profile 5000 10000 15000 20000 25000 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 Temperature (°C) Hours

FM25C160 - Automotive Temp. Rev. 3.1 July 2007 Page 12 of 13 Mechanical Drawing 8-pin SOIC (JEDEC MS-012, Variation AA) Pin 1 4.90 ±0.10 0.10 0.25 1.35 1.75 0.33 0.51 1.27 0.10 mm 0.25 0.50 45° 0.40 1.27 0.19 0.25 0°- 8° Recommended PCB Footprint 7.70 0.651.27 2.00 3.70 Refer to JEDEC MS-012 for complete dimensions and notes. All dimensions in millimeters. Legend: XXXX= part number, P= package type, T= temp (A= Automotive, blank=ind.) LLLLLLL= lot code RIC=Ramtron Int’l Corp, YY=year, WW=work week Example: FM25C160, “Green” SOIC package, Automotive, Lot 60018, Year 2006, Work Week 38 FM25C160GA A60018G RIC0638 XXXXXXX-PT LLLLLLL RICYYWW

FM25C160 - Automotive Temp. Rev. 3.1 July 2007 Page 13 of 13

Revision History

2.0 3/24/06 Created automotive temperature spec. 2.1 6/22/06 Changed V IH/VIL spec limits. Added comment to Note 4 in DC Table. 2.2 10/12/06 Updated Data Retention table and added typical operating/storage profiles. 3.0 1/30/07 Changed to Production status. Passed AEC Q100 testing. Added ESD Machine Model rating. 3.1 7/12/07 Changed to Production status. Changed Data Retention table.