FM24CL04_05 RAMTRON | Alldatasheet

Document overview

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Technical content

Features

4K bit Ferroelectric Nonvolatile RAM

  • Organized as 512 x 8 bits
  • Unlimited Read/Writes
  • 45 Year Data Retention
  • NoDelay™ Writes
  • Advanced High-Reliability Ferroelectric Process Fast Two-wire Serial Interface
  • Up to 1 MHz maximum bus frequency
  • Direct hardware replacement for EEPROM Low Power Operation
  • 2.7V to 3.65V operation
  • 75 µA Active Current (100 kHz) @ 3V
  • 1 µA Standby Current Industry Standard Configuration
  • Industrial Temperature -40° C to +85° C
  • 8-pin SOIC (-S)
  • “Green” 8-pin SOIC (-G)

Description

The FM24CL04 is a 4-kilobit nonvolatile memory employing an advanced ferroelectric process. A ferroelectric random access memory or FRAM is nonvolatile and performs reads and writes like a RAM. It provides reliable data retention for 45 years while eliminating the complexities, overhead, and system level reliability problems caused by EEPROM and other nonvolatile memories. Unlike serial EEPROMs, the FM24CL04 performs write operations at bus speed. No write delays are incurred. Data is written to the memory array in the cycle after it has been successfully transferred to the device. The next bus cycle may commence immediately. These capabilities make the FM24CL04 ideal for nonvolatile memory applications requiring frequent or rapid writes. Examples range from data collection where the number of write cycles may be critical, to demanding industrial controls where the long write time of EEPROM can cause data loss. The combination of features allows more frequent data writing with less overhead for the system. The FM24CL04 provides substantial benefits to users of serial EEPROM, yet these benefits are available in a hardware drop-in replacement. The FM24CL04 is available in an industry standard 8-pin package using a two-wire protocol. The specifications are guaranteed over an industrial temperature range of -40°C to +85°C. Pin Configuration Pin Names Function A1-A2 Device Select Address 1 and 2 SDA Serial Data/Address SCL Serial Clock WP Write Protect VSS Ground VDD Supply Voltage 3V

Ordering Information

FM24CL04-G “Green” 8-pin SOIC NC VSS VDD WP SCL SDA

Figure 1. Block Diagram edges. A pull-up resistor is required. input also incorporates a Schmitt trigger input for improved noise immunity. all addresses may be written. This pin is internally pulled down.

Rev. 3.0 March 2005 Page 8 of 11 Electrical Specifications Absolute Maximum Ratings Symbol Description Ratings VDD Power Supply Voltage with respect to V SS -1.0V to +5.0V VIN Voltage on any signal pin with respect to V SS -1.0V to +5.0V and VIN < VDD+1.0V * TSTG Storage Temperature -55°C to + 125°C TLEAD Lead Temperature (Soldering, 10 seconds) 300° C VESD Electrostatic Discharge Voltage - Human Body Model (JEDEC Std JESD22-A114-B) - Machine Model (JEDEC Std JESD22-A115-A) 3kV 300V Package Moisture Sensitivity Level MSL-1 * Exception: The “VIN < VDD+1.0V” restriction does not apply to the SCL and SDA inputs. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and the functional operation of the device at these or any other conditions above those listed in the operational section of this specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. DC Operating Conditions (TA = -40° C to + 85° C, VDD = 2.7V to 3.65V unless otherwise specified) Symbol Parameter Min Typ Max Units Notes VDD Main Power Supply 2.7 3.65 V IDD VDD Supply Current @ SCL = 100 kHz @ SCL = 400 kHz @ SCL = 1 MHz 150 300 µA µA µA ISB Standby Current 1 µA 2 ILI Input Leakage Current ±1 µA 3 ILO Output Leakage Current ±1 µA 3 VIH Input High Voltage 0.7 V DD V DD + 0.5 V VIL Input Low Voltage -0.3 0.3 V DD V VOL Output Low Voltage @ IOL = 3.0 mA 0.4 V RIN Input Resistance (WP, A2, A1) For VIN = VIL (max) For VIN = VIH (min) KΩ MΩ VHYS Input Hysteresis 0.05 V DD V 4 Notes 1. SCL toggling between VDD-0.3V and VSS, other inputs VSS or VDD-0.3V 2. SCL = SDA = VDD. All inputs VSS or VDD. Stop command issued. 3. VIN or VOUT = VSS to VDD. Does not apply to WP, A1, A2 pins. 4. This parameter is periodically sampled and not 100% tested.

Rev. 3.0 March 2005 Page 9 of 11 AC Parameters (TA = -40° C to + 85° C, VDD = 2.7V to 3.65V, CL = 100 pF unless otherwise specified) Symbol Parameter Min Max Min Max Min Max Units Notes fSCL SCL Clock Frequency 0 100 0 400 0 1000 kHz tLOW Clock Low Period 4.7 1.3 0.6 µs tHIGH Clock High Period 4.0 0.6 0.4 µs tAA SCL Low to SDA Data Out Valid 3 0.9 0.55 µs tBUF Bus Free Before New Transmission 4.7 1.3 0.5 µs tHD:STA Start Condition Hold Time 4.0 0.6 0.25 µs tSU:STA Start Condition Setup for Repeated Start 4.7 0.6 0.25 µs tHD:DAT Data In Hold 0 0 0 ns tSU:DAT Data In Setup 250 100 100 ns tR Input Rise Time 1000 300 300 ns 1 tF Input Fall Time 300 300 100 ns 1 tSU:STO Stop Condition Setup 4.0 0.6 0.25 µs tDH Data Output Hold (from SCL @ VIL) 0 0 0 ns tSP Noise Suppression Time Constant on SCL, SDA 50 50 50 ns Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations. 1 This parameter is periodically sampled and not 100% tested. Capacitance (TA = 25° C, f=1.0 MHz, VDD = 3V) Symbol Parameter Max Units Notes CI/O Input/Output Capacitance (SDA) 8 pF 1 CIN Input Capacitance 6 pF 1 Notes 1 This parameter is periodically sampled and not 100% tested. AC Test Conditions Input Pulse Levels 0.1 V DD to 0.9 VDD Input rise and fall times 10 ns Input and output timing levels 0.5 V DD Equivalent AC Load Circuit

Rev. 3.0 March 2005 Page 10 of 11 Diagram Notes All start and stop timing parameters apply to both read and write cycles. Clock specifications are identical for read and write cycles. Write timing parameters apply to slave address, word address, and write data bits. Functional relationships are illustrated in the relevant data sheet sections. These diagrams illustrate the timing parameters only. Read Bus Timing Write Bus Timing Data Retention (VDD = 2.7V to 3.65V, +85°C) Parameter Min Units Notes Data Retention 45 Years

Rev. 3.0 March 2005 Page 11 of 11 Mechanical Drawing 8-pin SOIC (JEDEC Standard MS-012 variation AA) Pin 1 4.90 ±0.10 0.10 0.25 1.35 1.75 0.33 0.51 1.27 0.10 mm 0.25 0.50 45° 0.40 1.27 0.19 0.25 0°-8 ° Recommended PCB Footprint 7.70 0.651.27 2.00 3.70 Refer to JEDEC MS-012 for complete dimensions and notes. All dimensions in millimeters Legend: XXXX= part number, P= package type LLLLLLL= lot code RIC=Ramtron Int’l Corp, YY=year, WW=work week Example: FM24CL04, Standard SOIC package, Year 2004, Work Week 39 FM24CL04-S A40003S RIC0439 XXXXXXX-P LLLLLLL RICYYWW