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FUJI Power Supply Control IC FA5510P/N FA5511P/N FA5514P/N FA5515P/N Application Note

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1.This Data Book contains the product specifications, characteristics, data, materials, and structures as of May 2001. The contents are subject to change without notice for specification changes or other reasons. When using a product listed in this Data Book, be sure to obtain the latest specifications. 2. All applications described in this Data Book exemplify the use of Fuji's products for your reference only. No right or license, either express or implied, under any patent, copyright, trade secret or other intellectual property right owned by Fuji Electric Co., Ltd. is (or shall be deemed) granted. Fuji makes no representation or warranty, whether express or implied, relating to the infringement or alleged infringement of other's intellectual property rights which may arise from the use of the applications described herein. 3. Although Fuji Electric is enhancing product quality and reliability, a small percentage of semiconductor products may become faulty. When using Fuji Electric semiconductor products in your equipment, you are requested to take adequate safety measures to prevent the equipment from causing a physical injury, fire, or other problem if any of the products become faulty. It is recommended to make your design fail-safe, flame retardant, and free of malfunction. 4.The products introduced in this Data Book are intended for use in the following electronic and electrical equipment which has normal reliability requirements. *Computers *OAequipment + Communications equipment (terminal devices) + Measurement equipment + Machine tools + Audiovisual equipment + Electrical home appliances * Personal equipment + Industrial robots etc. 5.If you need to use a product in this Data Book for equipment requiring higher reliability than normal, such as for the equipment listed below, it is imperative to contact Fuji Electric to obtain prior approval. When using these products for such equipment, take adequate measures such as a backup system to prevent the equipment from malfunctioning even if a Fuji's product incorporated in the equipment becomes faulty. * Transportation equipment (mounted on cars and ships) * Trunk communications equipment * Traffic-signal control equipment + Gas leakage detectors with an auto-shut-off feature * Emergency equipment for responding to disasters and anti-burglary devices + Safety devices 6. Do not use products in this Data Book for the equipment requiring strict reliability such as (without limitation) *Space equipment —* Aeronautic equipment + Atomic control equipment * Submarine repeater equipment + Medical equipment 7. Copyright © 1995 by Fuji Electric Co., Ltd. All rights reserved. No part of this Data Book may be reproduced in any form or by any means without the express permission of Fuji Electric. 8. If you have any question about any portion in this Data Book, ask Fuji Electric or its sales agents before using the product. Neither Fuji nor its agents shall be liable for any injury caused by any use of the products not in accordance with instructions set forth herein.

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  1. Description The FA551X series are the PWM type switching power supply control ICs that can directly drive power MOSFET. These ICs use a CMOS device with high dielectric strength (30V) to implement low power consumption. These ICs contain many function in a small 8-pin package. With these ICs, a high-performance and compact power supply can be created because not many extemal discrete components are needed. 2. Features - Low current consumption by CMOS process with high dielectric strength (30V) - Standby current of 2y/A or less (at Vec = 14), and operating current of 1.5mA (typ) - Overvoltage protection function detecting the Vcc voltage - Adrive circuit for connecting a power MOSFET directly - Output peak current +1.5A - Pulse-by-pulse overcurrent limiting function - Overload protection function (latch or nontatch mode selectable) - Output ON-OFF function by extemal signal . - Latch-mode overvoltage shutdown function - Undervoltage lockout function (16.5V ON / 9V OFF) - Reference voltage output (5V) - 8&pin package (DIP/SOP) 3. Outline SOP-8 (suffix : N) DIP-8 (suffix : P) 0. 180. 08 8 5 : 5 fotalct bh mi py | pie weal ty z _—_J é 93 oa A : Oo oo O 1,040.3 1.5 +0.3 1 ry 4.9 ~ ee 3 F - 2. 54 | 46 0.1 258) wal | 0.4 +01 2. 54x 327. 62 ne 718 Te ds ee

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  1. Block diagram FA5510/11 CSB) voc(s), FA5514/15 C38) vec(s),, re aa cava sey saa] t | an oayosev| SA | a { U | <TH t Ujeowett <To | tesve b | f a8 1 4 | — Ol ‘ 5 Na G) ‘ 5 ENB (6) ® e () ter o- ° (\\ Teor at Gaeta fer | ase fer oR ~1S+(3) RT) IS3) 5. Pin assignment [in| symbol | function | scription [+ [Rt | Osctaorimingresitor | Seting osclaton femuency———SC—=S | 2 [FB | Feedback | nputof PWM comparator [3 [1S | Overeurentdeiecion | Input verourentiiing incion =| | 4 [ono [emg Grund Ps [our [opt | Output fordrivinga powerMOSFET [6 [voc [Powersipsy = Powersupy [7 [REF | Reference oiage | Reference voliage output (V7) 6. Types of FA551X series cle (typ.)_| detection DIPS FASSTON FAS511P DIPS FASS14P 46% DIP-8 FASSTAN [FASSISN |”

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  1. Ratings and Characteristics Current characteristics; “+” is sink current and “-" is source current (1) Absolute maximum ratings ‘Supply Low impedance source Voor V Voltage (Iec>15mA ) acacia loc<15mA) | Output peak curent Tt 5 A | REF pin source current Ter fm | CS pin sink current cs TT Total power dissipation (Ta=25°C) | | 800 (DIP-8) 400 (SOP-8) | Maximum junction temperature TT 425 TY Note)There are cases where the IC cannot output the rating current depending on Vcc voltage or temperature. 400mW (SOP) 800mW (DIP) ge B ~ as SN = me, 0 ~s -30 25 85 125 Ambiance temperature Ta [°C] (2) Recommended operating conditions pote | Symbot TwnTtve max uit | Oscillation frequency | ose 10 fT 500k REF-GND capacitor [| Cet [or foam [a [Soft start capacitor cs oon

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(3) Electrical characteristics (Vcc=18V,RT=47kQ, Ta=25°C, unless otherwise specified) Reference voltage section (REF pin) [tem nT symbol_ [Condition MIN. [Typ [MAX TT Unit _] [Reference voltage Ver Tez5rc 45 5.00 [525 TV | lLine reguiaton | Ves Vco=10 to 28V_ TTT 0m a a a a Vec=18V [Temperature stabiity [Var Ta=30 to ssc Tt mvc | Oscillator section (RT pin) [item Symbol Condition MIN, TYP [MAX [Unit] sino Fenner ee Pan, ate [#28100 [tra | we [Temperature stability [far Ta=30 to 85°C TT t0.02 PC] Pulse width modulation circuit section (FB pin) [tem Symbol Condition MIN, TTP. MAX Unit _] FB pin source curent | ire Vrw=oV 855 720585 TA Input threshold voltage |__Vinrso | Duty cyce=0o% | og Pa TV (FB pin) Vinrem | Duty cycle=DMax FA5510/14 1.92 v FAS5511/15 2.40 Maximum duty cyde FA5510/14 50 FA5511/15 66 70 74 Overcurrent limiting circuit section (IS pin) [tem Symbol Condition MIN, TTP [MAX Unit _] Input threshold voltage VIHS FA5510/11 mV. IS pi FA5514/15 -190 -170 -150 [Source current (IS_pin) Vis=0V pA FA5510/11 FA5514/15 Soft start circuit section (CS pin) [tem Symbol Condition MIN, Typ MAX Tit] [Charge current (CS pin) [| onc Vos=tvite2erc | 72 | 52 | 32 A Input threshold voltage | Viricso [Duty cycle=0% Tog To PV (CS pin) Viucsm—_| Duty cycle=DMax V FA5510/14 1.92 FA5511/15, 240 Output ON/OFF control circuit section (CS pin) [tem Symbol] Condition MIN, [TYP MAX. Unit_] Source oarent (CS pr) | lsocs | vosrov, Tr25C | _-72| 62 | 32 | ya _| Penta | ee | threshold “ce ph T=25°C a ee ee ee TE25°C

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Latch-mode cutoff circuit section (CS pin) pO ttem Symbol J Condition MIN, [TYP [MAX JUnit] a a a TE25°C ee ee ee " Cutoff threshold votoge T<25°C Tj=25°C Overload cutoff circuit section (FB pin) [tem Symbol Condition MIN. typ. MAX. Unit] ir oltage _ (FB pin) Overvoltage cutoff circuit section (VCC pin) [tem Symbol Condition MIN. TYP [MAX [Unit] a ee ee eee ICC pir amie | = fee 1 1 ICC pir Vec=VTHvCc [Charge current_(CS pin) | isocs2__[ Ves=6.5V_ T4095 05 mA | Undervoltage Lockout circuit section (VCC pin) (tem Symbol Condition MIN. [Typ Max [Unit] |OFF-4t0-ON threshold voltage | Vccon [Tjs2src | 15.5 | 165 | 75 VT |ON-+to-OFF threshold voltage | Vocorr | 7j=25°C | 8 ToT t00 TV Output circuit section (OUT pin) fo tem Symbol Condition | MINS, [TYP | MAX] Unit _] High output voltage VoH ToH=100mA, Vv Vec=18V IRisetime tin ts [Fal time Tt in ss Supply current (VCC pin) fp item Symbol] Condition MIN. J Typ MAX. TT Unit] [Standby curent_ | locsm | vewtav iS ST | pee Pee | Le te te threshold voltage Pee | ee | Pe eT ‘supply current JOFF-state supply curent___ | ccor__—| Voo=t7v, cs=ov [| [80 | 200A [Latch mode supply current | tccu_ | Voo=tov_ 8

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  1. Characteristic curves Current characteristics; “+” is sink current and “-" is source current VCC=18V,RT=47kQ, Ta=25°C, unless otherwise specified Oscillation freq (fosc) \\s. Oscillation frequency(fosc) vs. 1000 ‘ering rosistor reeistance(Fe) 400.1 supply voltage(Vec) il cece oo SS ae 100.08 SNS aie al 10008 FP yoo LI EAN = tones — Bey A = 100.02 — = EEE rn NER rs cove Hue] fe PEA 99.94 PEE FHI 29.92 p 1 10 Rerqxcr) 100 4000 10 5 vam * 30 Oscillation frequency(fosc) vs. FB pin source current(IFB) vs. 402 junction temperature(T}) FB pin voltage(VFB) om) | | ed % 100 | A $ 200 tL west LL CL ~ a 50 0 50 100 150 0 1 2 3 4 5 Tic) VFB(V) Maximum duty cycle(DMAXx) vs. Maximum duty cycle(DMAx) vs. timing resitor resistance(RT) timing resitor resistance(RT)

49 FA5510/14 R FA5511/15

E46 t “ HH & 70 tt L = feb eset ae ove ne a 0 Til SEH -HTHI = HHA TH 42 {i H 1 10 100 1000 67 RT{kO) 1 10 Ra) 100 1000 FUJI — Q SLECTRIE

Maximum duty cycle(DMAXx) \\s. Maximum duty cycle(DMAx) vs. junction temperature(Tj) junction temperature(Tj) FA5510/14 7" FA5511/15, 47 wan a Sp 46.8 om a 70.8 {| Pore a Foe a 46.2 x 70.2 7 6 | 7 | 1 i oe 45.6 69.6

456 Pp fea |

pe a oo | a | oe -50 0 50 100 150 50 0 50 100 150 Tic) Tic) IS(+) pin current(Iis(+)) vs. ISG) pin current(Iis(-)) vs. IS(+) pin voltage(ViS(+)) FASS14/15 IS(+) pin voltage(Vis(-)) FASS10/14 5 oos |__| 7 ee oe es es | A gars | 2° So 0.3 + pe es 25 -1 0 1 2 3 4 1 0 1 2 3 4 Vis(4)(V) Vis(-)(V) CS pin current(Ics) vs. CS pin current(Ics) vs. ‘0 FB=open CS pin voltage(Vcs) o FB=0V CS pin voltage(Vcs) pe a a Oe | pos | s Po ea a | a 1 eg ee Oh Sis | S15 [| jf gr | Bil 0 — | spe os 5 5 | a A or a 0 2 4 6 8 10 12 0 2 4 6 8 10 12 Ves(v) Ves(v)

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CS pin charge current(ICHG) ws. junction temperature(T}) 45 ] | | 47 _ | g49 en ee uy i | 551 <— 5.5 -60 0 50 100 150 Tic) UVLO OFF-to-ON threshold voltage(VCOON) UVLO ON-to-OFF threshold voltage(VCOOFF) Ws. junction temperature(T}) vs. junction temperature(Tj) 16.8 | 9.05 _ | _ = 167 f < | = | = i > 165 Z| > [77 | 8.95 —™ . 16.3 8.9 -50 0 50 100 150 50 0 50 100 150 TiC) Tire) HHevel output voltage(VOH) vs. Level output voltage(VOL) vs. supply voltage(Vcc) supply voltage(Vec) 1.8 9=-100mA 0.8 = 100mA 15 |N ; | 0.65 —_ E14 S 06 — a Fa = I | 81.2 > 05 [ i - A414 0.45 {os —— 1 0.4 |__| 0.9 a 0.35 . ; - OB o3 L__1 id | 10 15 20 25 30 10 15 20 25 30 Vee(V) Vec(V) "1 SBUSCTRIG

Operating state supply current(Ioo0P) \\s. Operating state supply current(Icoop) vs. supply voltage(Vcc) junction temperature(Tj) 18 - 1.72 e14 +— — é a §13 —+ — & 1.66 Ss a ee 8 B=0V eu Ft <—}— |) Lt | Fe copen | 162 og | a 1.6 10 15 20 25 30 50 0 50 100 150 Vec(V) Tic) OFF state supply current(ICCOFF) ws. OFF state supply current(ICCOFF) vs. 3000 supply voltage(Vcc) 200 supply voltage(Vcc) es ee oe oe ee) ee z = 120 | fim | | SP § 1500 ag A | 9 8 80 —, * 1000 ne ee ee iad po a a 10 15 20 25 30 10 12 14 16 18 20 Vee(V) Vec(V) Latch mode supply current(ICCL) vs. Latch mode supply current(Icc.) vs. 3000 supply voltage(Vcc) supply voltage(Vcc) ~ 200 re ee ee ee ee 2500 r Sf to Lf | 160 2000 wot | | $ 1500 = 100

1000 W 60

— 0) 10 15 20 25 30 10 12 14 16 18 20 Vee(V) Vec(v)

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  1. Description of each circuit (1) Oscillator The oscillator generates a triangular waveform by charging and @ DT voltage discharging the built-in capacitor. A desired oscillation frequency 3 FB pin voltage: can be set by the value of the resistor connected to the RT pin CS pin voltage (See Figure 1). @ Oscillator PuNM comparator output tp Fig.3 PWM comparator Oar [] @FB pin voltage (4.0V) IRT al @DT voltage Fig.1 Oscillator © Oscitator output OOM OE ME i @CS pin voltage FA Piob doi: ‘The builtin capacitor voltage oscillates between about 3V and 1V, PWM comparator tr ft with almost the same charging and discharging gradients (Figure ‘output 2). You can set the desired oscillation frequency by changing the h Hh Ho? gradients using the resistor connected to the RT pin. (Large Rt = OUT pin voltage low frequency, small RT = high frequency) Fig.4 PWM comparator timing chart Rt=Small Rt=Large sv ° \\n (3) CS pin circuit L7\\0. y . ‘As shown in Figure 5, capacitor Cs is connected to the CS pin. The Z So CS pin voltage varies depending on the charging voltage of this Vv 4 M7 capacitor Cs. ‘When the power is tumed on, the constant current source (5.2) begins to charge capacitor. Accordingly, the CS pin voltage rises Fig.2 Oscillator output as shown in Figure 6. The CS pin voltage is connected to the PWM comparator, which is characterized to make output based on the ae - . lowest of input voltages. The device enters soft-start mode while Fre iors Ne ponwoen Rr and the oscitaion frequency is the CS pin voltage is between 1.0V and VTHCSM approximately gi g (FA5510/14:1.92V, FA5511/15:2.4V). Ry +14 Zener diode. If the output voltage drops due to an overload and the FB voltage rises to 3.5V or more, the clamp voltage 4.0V is fosc connected to latch comparator C2. If the CS pin voltage rises to fosc: Oscillation frequency [kHz] 8.5V or more, comparator C2 toggles to tum off the 5V REF circuit, The oscillator waveform cannot be observed from the outside Since the CS pin is also connected to comparator C1, the SV REF because the oscillator output is not pinned out. The oscillator output _<ifcuit can be tumed off to shut the output down by dropping the is connected toa PWM comparator. CS pin voltage below 0.68V. In this way, comparator C1 can be used for output on-off control. As explained above, the CS pin can be used for soft-start, overload output shutdown, and output on-off (2)PWM comparator ; control by varying the voltage. Further details on the above three The PWM comparator has four inputs as shown in Figure 3. major functions of the CS pin are given below. Oscillator output @ is compared with CS pin voltage @, FB pin voltage ©, and DT voltage ©. The lowest of three inputs @, ©, and @ has priority and is compared with oscillator output @. While the vottage is lower than the oscillator output, the comparator output is high. While the voltage is higher than the oscillator output, the PWM comparator output is low (see Figure 4). The IC OUT pin voltage is high while the PWM comparator output is low. When the IC is powered up, CS pin voltage @ controls soft start operation. The output pulse then begins to widen gradually. During normal operation, the output pulse width is determined within the maximum duty cycle (FA5510/14:46%, FA5511/15:70%) set by DT voltage @ under the condition set by FB pin voltage @, to stabilize the output voltage.

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E les vec ¥_@gs_evec +t | 0.8/0.68V REF, vee to! Fz Ena FB PWM t <o, ® = asi7ov ~ circuit uvLo (] 5 FBI Output © E eee Fig.7 Soft start circuit FB pin voltage oO Osci RT scillator output Fig.5 CS pin circuit OT volage r = 8.5}--- ststeeeeseeseseeceneeseesese feces Hob: bio obi odd 3 snuniom = omomme (LL LLL S 3 BD fre sacsacscerssersay Fig.8 Soft start timing chart Q 1.0 }-----2-5y Momentary Overload or (3-2) Overtoad shutdown function 0 overvoltage timing chart that illustrates overload shutdown operation. If the Soft start output voltage drops due to an overload or short circuit, the FB pin Timet output voltage rises. If the FB pin voltage exceeds the reference OFF mode voltage (3.5V) of comparator C3, the output of comparator C3 goes low to tum off the switch. With the switch off, the CS pin voltage clamped at 4.0V by zener diode in normal operation is unclamped, Fig.6 CS pin waveform and the constant current source (5.2)1A) begins to charge capacitor (3-1) Soft start function exceeds the reference voltage (8.5V) of comparator C2, the output Figure 7 shows the soft start circuit. Figure 8 is a soft-start ‘of comparator C2 toggles to tum off the 5V REF circuit. The IC then operation timing chart. The CS pin is connected to capacitor Cs. enters the latched mode and shuts down the output. IC current ‘When the power is tumed on, the constant current source (5.2) consumption for shutdown is 45yA (typ) (Vec= 10V).This current begins to charge the capacitor. As shown in the timing chart, the must be supplied through the startup resistor. The IC enters output CS pin voltage rises slowly in accordance with the capacitor Cs Off (low voltage) state. ; charging current. The CS pin is also connected to the IC intemal The overload shutdown operation can be reset by lowering the PWM comparator, which has such characteristics that the voltage ‘supply voltage Vcc to below the OFF threshold voltage (9.0V) or is determined to output on the basis of the lowest of input voltages. forcing the CS pin voltage below 7.9V. ‘The comparator output pulse slowly widens to cause a soft start as The period OL from the time the output is short-circuited to the shown in the timing chart. time the output circuit goes off is given by the following equation: The soft start period can be approximately estimated by the period . width widens to 30%. The period ts is given by the following equation: Cs: soft start capacitor [11F] item 9 in “Design advice” Cs: soft start capacitor [LF]

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“FT les vec CS pin voltage 4) ®—® [| DT voltage ep on. 88v Yo! FB pin voltage REF) <P'l [ae Oscillator output EN9| eel Comparator C1 & <q reference voltage (0.8/0.68V) . wo H. : Q = OUT pin output : FBI Output : © > arom REF pin voltage oy ON mode OFF mode O RT Fig.12 Output ON/OFF control circuit timing chart Fig. 9 Overload shutdown circuit (4) Overcurrent limiting circuit ‘The overcurrent limiting circuit detects the peak value of every Comparator C2 (9, drain current pulse (pulse by pulse method) of the main switching reference voltage x MOSFET to limit the overcurrent. The detection threshold voltage (6v) H is +0.24V for FA5510/11 or -0.17V for FA5514/15 with respect to CS pin voltage {4 the ground as shown in Figure 13 and Figure 14. The drain current pin voliage of the MOSFET is converted to voltage by resistor Rs and fed to DT voltage the IS pin of the IC. If the voltage exceeds the reference voltage FB pin voltage: +0.24V (FA5510/11) or -0.17V (FA5514/15) of comparator C4, Oscillator output ov) comparator C4 works to set fip-fop output Q to high. The output is “ immediately tumed off to shut off the current. Flip-flop output Q is OUT pin voltage | reset on the next cycle to tum on the output again. This operation is - on. H repeated to limit the overcurrent. REF pin voltage | if the overcurrent limiting circuit malfunctions due to noise, place an ‘Overload detection - > RC filter between the IS pin and MOSFET as shown in Figure 13 Overload and Figure 14. (See item 12 in “Design advice.”) Figure 15 is a ‘shutdown timing chart that illustrates overcurrent-limiting operations. Fig.10 Overload shutdown timing chart FA5510/11 ++ pwn uvLo (3-3) Output ON/OFF control function . - CS pin 3 The IC can be tumed on or off via an extemal signal applied to the FB pin =F) Output ours CS pin. Figure 11 shows the output on/off control circuit, and Figure Oscillator circuit [2 9 12's. timing chart. The IC is turned off when the CS pin voltage is ocr. Le! extemally made to drop below 0.68V (typ). The output of t> [ra ‘comparator C1 goes high to tum the 5V REF circuit off. This shuts ony yt the output down. The IC enters output off (low voltage) state. 2 CA RF [Irs Required IC current consumption during shutdown is 801A _ (typ) ee ono (Vcc = 17V). This current must be supplied through the startup - resistor. The IC goes on when the CS pin is opened and the CS pin voltage exceeds 0.80V (typ). This tums the 5V REF circuit on =, and results in automatic soft start. The power supply then restarts Fig.13 Overcurrent limiting circuit (FA5510/11) operation. ON/OFF control © Cs + ges wee FA5514/15 T | 44h pwm UVLO REF @)—\\5v 21 Output! 3 Pe ete ae Eke et UVLO 0.17V T C4 FF Urs PWM ouput Oo OGno = © [Grea O a Fig.14 Overcurrent limiting circuit (FA55114/15) RT Fig.11 Extemal output ON/OFF control circuit

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CS pin voltage (v1 Comparator C2 (9.5V) DT voltage reference voltage FB pin voltage (8.5V) f Oscillator output f f ay : HW i : CS pin voltage ! : ‘OUT pin output : : L : ; tor C4 : : DT voltage reference voltage : : FB pin voltage FA5510/11:+0.24V A A FA5514/15:-0.17V. 1 Leo LILA Osillator output A (OV) {S pin voltage : : OUT pin voltage " i" : REF pin voltage 0X : . OFF a a4 _ ON + 7 limit REF . Overcurrent limiting pin voltage OFF on A ] Fig.15 Overcut chart ervoltage e rent timing detection Shutdown (5) Vcc overvoltage protection circuit .17 Overvoltage shutdown timing The IC contains a Voc overvoltage protection circuit to protect the Fe chart IC from damage by overvoltage. Figure 16 shows the overvoltage ‘overvoltage protection operations. Overvoltage is detected if the ‘The IC incorporates a circuit that prevents the IC from ‘supply voltage Vcc rises to 31.8V (Ic = 14mA) or more and current malfunctioning when the supply voltage drops. When the supply flows in the buitt-in zener diode. The output of comparator C5 then Voltage is raised from OV, the IC starts operation with Voc = 16.5V goes high and the constant current source (0.95mA) raises the CS (typ). If the supply voltage drops, the output is shut down when Vcc. pin voltage. When the CS pin voltage exceeds 8.5V, the output of = 9.0V (typ). When the undervottage lockout circuit operates, the comparator C2 goes high to tum off the 5V REF circuit. The IC outputs of the OUT and CS pins go low to reset the IC. then enters the latched mode and the IC output is put in the off (ow voltage) state. When latched mode, the IC current consumption is (7) Output circuit 45,1A (typ) (Voc = 10V). This current must be supplied through the ‘The IC contains a push-pull output stage and can directly drive startup resistor. the MOSFET. The absolute maximum rating of OUT pin peak ‘The overvoltage shutdown operation can be reset by lowering the current is +1.5A. But when using in actual circuit, the output peak supply voltage to below 9.0V or forcing the CS pin voltage below current depends on the characteristics of the MOSFET, 7.9V. (When you want to enable Vec overvottage shutdown at a resistance between the OUT pin and the MOSFET, supply desired voltage, see item 6 in “Design advice.”) voltage, temperature and so. When supply’ voltage is relatively © low or temperature is relatively high, the output peak current vin |_| E 3 may not reach the maximum ratings. © 3 Note that the output current causes loss of the output stage. The 5 total loss caused by the operating current and the output current Q fa should be within the ratings in actual circuit. cs KI + 3 cS vec ° a cr gene [| Tse REF ET [foam fo ena <_ en ee ‘5V REF | Ze | eek a579V ov vg UvLo +. 0 sa FO Low FBQ) Output [esc} RT Fig.16 Overvoltage shutdown circuit

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  1. Design advice (1) Deciding the startup circuit (1-2) Connecting the startup resistor after rectification(DC line) These ICs, which use CMOS process, consume less current, and When the startup resistor is connected after rectification (DC line) therefore can use larger startup resistance than the conventional as shown in Figure 19, the voltage applied to the startup resistor bipolar type of IC. To decide the startup resistance, the following becomes the peak value of the AC input voltage. Startup resistor conditions must be satisfied: R1 must satisfy the three equations shown below. Select a (a) The IC is started when the power is tumed on. smaller-side value for R1 in consideration of temperature (b) The IC consumption current is supplied during latch mode characteristics. operation to maintain the latch state. (a) To supply startup current 30yA at ON threshold voltage 17.5V (0) The IC consumption current is supplied during the off state (max) of UVLO: under the on/off function to maintain the off state. prc W2EVAC=175. gy However, these are the minimum conditions for using the IC. The 0.03 startup time required for the power supply must also be decided (0) To supply 1C consumption curent ‘80UA (max.) (Voc =10V) in on. le: (1-1) Connecting a startup resistor before rectification(AC line) ai <Y2xVEC=10... When the startup resistor is connected before rectification (AC line) : ; ; as shown in Figure 18, the voltage applied to the startup resistor (c) To supply IC consumption current 200HA (max.) (Voc = 17V) in forms a half-wave rectified waveform of the AC input voltage. the off state under the on/off function: Startup resistor R1 must satisfy the three equations shown below. y2xVac-17 Select a smaller-side value for R1 in consideration of the RI< (10) temperature characteristics. ne (a) To supply startup current 3A at ON threshold voltage 17.5V Rt: Startup resistance [KO] baile +e fer vA Vac: Effective value of AC input voltage [V] V2 Vac -17.5 If neither the latch nor the on/off functions are used, only the Nac expression in (8) needs to be satisfied. In this method, after latch RI< Bg) mode operation, smoothing capacitor C1 in the main circuit ; . supplies current to the IC via the startup resistor even if the AC (©) To supply IC consumption current BOHA (max. (Voc =10V) in input is shut down. Therefore, some time must elapse before the latch mode: latch mode is reset. 2 evac-10 ss " 0.08 3 (©) To supply IC consumption current 200A (max.) (Voc =17V) in AC INPUT = the off state under the on/off function: 2 © ——xVac -17 U Ri< Es (7) D R1: Startup resistance [kQ] vcc SE C2 S Vag: Effective value of AC input voltage [V] © + L£ Hf neither the latch mode operation nor the on/off functions are used, FA551X © FR MOSFET only the expression in (5) needs to be satisfied. In this method, the OuT supply current to the IC via the start-up resistor is stopped when [] Rs AC input is shut down. Therefore, after latch mode operation, shutting the AC input down resets the latch mode in a very short - period of time. Fig.19 Startup circuit(2) DB 1 © = (2) Determining the Vcc capacitor value AC INPUT i S To property start the power supply, a certain value is required for 3 the capacitor connected to the VCC pin. Figure 20 shows the Voc © voltage at start-up when a proper value is given to the capacitor. When the input power is tumed on, the capacitor connected to the Ul VCC pin is charged via the startup resistor and the voltage increases. The IC is then in standby state and almost no current is KI consumed. (icc < 2A) Thereafter, Voc reaches the ON threshold vec SS C2 = voltage of UVLO and the IC begins operation. When the IC begins © ] L ‘operation to make output, the IC operates based on the voltage MOSFET from the auxiliary winding. When the IC is just starting up, however, FA551X © 5 it takes time for the voltage from the auxiliary winding to rise OUT ‘enough, and Voc drops during this period. [] Rs Determine the Voc capacitor value so that Vec will not drop down Lt tothe OFF threshold voltage of UVLO during this period. Fig.18 Startup circuit(1)

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R1 should be decreased. But loss of the resistor R1 increases. Vee In such case, the circuit shown in Fig. 23 is effective to shorten ‘start-up period without increasing the loss of the resistor R1. one veeecceeceypecees lowsensseesees The capacitor C2 is decreased to shorten the start-up period and, ° Vee must not drop to dro hold ince re Von conse? SPpted fom C3 to prolong UVLO OFF. The start-up period of this circuit aloso is approximately given by one vec Jocceecc Dieceecceesceeeseee the expression in (11) i Auxiliary winding [Rt pt va [4 voltage KI KI : vcc wiC2 wiC3 Time t © i Fig.20 Vcc voltage at startup with a adequate capacitor FAS51X Ifthe Voc capacitor value is too small, Vcc will drop to the OFF Fig.23 Startup circuit(4) threshold voltage of UVLO before the auxiliary winding voltage rises enugh. If so, Voc repeatedly goes up and down between the (4) Setting soft start period and OFF latch delay UVLO threshold voltages, and the power supply cannot start up. independently (Figure 21) Figure 24 shows a circuit for setting the soft start period and OFF latch delay independentty. In this circuit, capacitance Cs Veg determines the soft start period, and capacitance Ci determines UvLo the OFF latch delay. If the overload shutdown or overvottage een nen nagens ren engocenensnqsoees shutdown functions raise the CS pin voltage to around 5V, zener ON diode Zn becomes conductive to charge capacitor CL. The OFF latch delay can be thus prolonged by capacitance C1. UVLOT Zo Mo Me Ae cL OFF cs Van Zn tov les Timet ® FA551X Fig.21 Vcc voltage at startup with a inadequate capacitor @ GND (3) The startup period “ ‘The start-up period from the time the power is on to the time the Fig.24 Independent setting of soft start period and ICis tum to on is approximately given by: OFF latch deley vi (5) Overvoltage protection using the VCC pin Where: ‘These ICs contain an overvoltage protection function detecting the an ‘stort Vec voltage using intemal ZD (See item 5 in “Description of each Ri siorup resto | CC and GND pin Circuit’). If Voc voltage exceed 31.8V, the current of 14mA flows G2 Capac i Of AC input M through the intemal ZD and the evervottage protection function v2xVac ‘ . After this protection function operates, the IC continues to consume NeExNAC ...(Connectit startuy te pole Vi= before rectification) coutoe spied to Voc pin has relatively high impedarioe and V2 x Vac---(Connecting a startup resistor cannot supply the current of 14mA, overvoltage protection function “ti does not operate. But the intemal ZD maintains the Vcc voltage after rectification) 32V or less and protects the IC. []R1 D1 (6) Overvoltage protection using CS pin KI ‘These ICs contain the overvoltage protection function detecting vec xC2 &g \\Vec voltage. However, the threshold voltage is fixed. Adding a © circuit to CS pin enables the overvoltage protection detecting = ¥ desired 7 FAS51X volage (6-1) Detecting on secondary side " Figure 25 shows the overvoltage shutdown circuit based on the Fig.22 Startup circuit(3) signal from the secondary side. The optocoupler output transistor is connected between the CS and Vee pins. When the output voltage To shorten the start-up period, the capacitor C2 or resistor R1 is putin the overvoltage state, the optocoupler output transistor should be decreased. But in some case, such as when the load goes on to raise the CS pin voltage via resistor R2. When the CS current of the power supply is changed rapidly, you may want to Pin voltage exceeds the reference voltage (8.5V) of intemal prolong the hold time of the Vcc voltage over the off threshold. In comparator, the IC enters the OFF latch mode and shuts the this case the capacitor C2 cannot be decreased and the resistor Output down. The IC consumes current 45jA (typ) (Voc = 10V) in

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latch mode. This current must be supplied via startup resistor R1. ‘one microfarad. The overvoltage protection circuit can be reset by lowering the M © supply voltage Vcc to below 9.0V or forcing the CS pin voltage Bs below 7.9V. In normal operation, the CS pin voltage is clamped by Ss Ss [] Vout the 4V zener diode with maximum sink current 451A . Therefore, to Se © raise the CS pin voltage to 8.5V or more, 451A or a higher current }_I5 needs to be supplied from the optocoupler. Set the current input to WZ the CS pin to 1mA or less. FAS51X ‘TouT Rs D0 U © 4 3167 © Org ul 5 Vin | E= ES a Vout E 3\\8 [LJR3 Pct tas oped oa sat c= lator UJR1 a + ren oO Mas Fig.28 FB pin circuit{1) " 2 WZ (Apc If noise is applied to the FB pin, the output pulses may be lacked or disturbed. Cs; In this case, connect a capacitor C5 as shown in Fig. 29 to r ‘suppress the noise applied to the FB pin. Set the capacitance of camsVCCL = ICs C5 less than 10% of capacitance of C4 and connect C5 as near Lt ® the IC as possible. = FA551X GND FASS1X Sor an QD Rs Fig.25 Overvoltage shutdown circuit(1) GND FB ae ¥ (6-1) Detecting on primary side (detecting Vcc voltage) To attain overvoltage protection, the CS pin voltage is forcibly []R3 (yPet raised from outside the IC until it exceeds the reference voltage C4 (8.5V) of the intemal comparator C2. When the reference voltage is = exceeded, the IC enters latch mode and shuts the output down. ° “ Connect a zener diode (ZD) and resistor between the Voc and CS Fig.29 FB pin circuit(2) pins as shown in Figure 26. When the Voc voltage exceeds about ZD voltage + 8.5V, the IC enters the OFF latch mode and shuts the (8) Simple voltage control on the primary side ‘output down. If Voc remains high even after shutdown and current Ina flyback type power supply, the output voltages of the power is input to the CS pin, set the current to 1mA or lower. Set the supply and auxiliary winding voltage are almost proportional to the Zener voltage of the ZD connected to the CS pin higher than the number of winding tums of the transformer. This characteristic can UVLO ON threshold voltage. Startup is disabled below this voltage. be used in the circuit shown in Figure 30, where the output voltage R2 ZD can easily be made constant by detecting the auxiliary winding CS ®-cHD voltage. [| However, this is an easy output voltage control method, and the vec 6 ‘output voltage precision and regulation are therefore not as good. To reduce output pulse width completely to 0%, the FB pin voltage . must fall below 0.9V and R5 must be set below about 1kQ. from Fig.26 Overvoltage shutdown circuit(2) the characteristics of the FB pin voltage and source current. My ©) Figure 27 shows another circuit for enabling latch mode shutdown alg by detecting a desired Voc voltage using the CS pin. in this circuit, : 3/6 Vout overvoltage shutdown works when the Vcc voltage is about the © same as the ZD voltage. For this circuit also, use a ZD voltage I higher than the UVLO ON threshold voltage. Set the current flowing into the CS pin to 1mA or lower. vcc [JR2 “zp D @—FB a 0] 1 9 cs® Cs Tt a Fig.30 Simple voltage control circuit Fig.27 Overvoltage shutdown circuit(3) (7) Feedback pin circuit Figure 28 gives an example of connection in which a feedback signal is input to the FB pin. If this circuit causes power supply instability, connect R3 and C4 as shown in Figure 28 to decrease the frequency gain. Set R3 between several tens of ohms to several kilohms and C4 between several thousand picofarads to

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——e (9) Disabling the overload shutdown function (12) Preventing malfunction caused by noise As shown in Figure 31, connect a 10kQ_ resistor R6 between the Noise applied to each pin may cause malfunction of the IC. If noise FB pin and the ground. The FB pin voltage then does not rise causes malfunction, see the notes summarized below and confirm sufficiently high to reach the shutdown threshold voltage when an in actual circuit to prevent malfunction. ‘overload occurs so that IC does not enter OFF latch mode. Use a 5% or better-precision resistor for R6. - The IS pin for overcurrent limiting function detects the MOSFET Even with this connection, the overvoltage shutdown function is current converted to the voltage. The parasitic capacitor and available. inductor of the MOSFET, transformer, wiring, etc. cause a noise in switching operation. If this switching noise causes a FA551X maffunction of overcurrent limitimg function, insert the RC filter GND into IS pin as shown in Figure 13 and 14. Connect this capacitor FBo ® as near the IC as possible to suppress noise effectively. R3 ~ Connect a noise prevention capacitor (0.1)1 F or more) to the qre_ H gq REF pin that outputs the reference voltage for each component. Q 10k ze ~ If noise is applied to the FB pin, the output pulses may be ¥ ~ * disturbed. In this case, see “item 7 in “Design advice.” Fig.31 Disablit verload shutdown function ke nam ~ Relatively large noise may occur at the VCC pin because large current flows from VCC pin to drive the MOSFET. Then (10) Polarities for overcurrent detecting and their this noise may cause malfunction of the IC. In addition, the IC The FAS510/11 uses postive polarity detection for overourrent Te OT oe Mind tt eaoectonos “ad limiting (number 3 pin of IS pin) and the FA5514/15 uses negative characteristics of the capacitor connected evens nd polarity detection. The characteristics of positive and negative : ° 7 at olanty detection are summarized Select onein noe GND in not to allow the large noise at the VCC pin, To with the circuit used. (See item 4 in “Description of each circuit”) 0.5u1s or less and noise voltage below about +0.6V or less. Positive detection (FA5510/11) Preventi nection a = Wiring is easy because the ground can be shared by the main (3 Poheae aoledtosean caused by negative circuit and IC peripherals. When tat ; ' , ‘i r ; ge negative voltage is applied to each IC pin, a parasitic ~ Wis easy to correct the current detected as overioad against the element in the IC may operate and cause maifunction. Be careful input voltage. not to allow the voltage applied to each pin to drop below -0.3V. Especially for the OUT pin, voltage oscillation caused after the whe MOSFET Give curert oesnoow othe cuent ceecion_-MOSEET ums ff nay be gpd 1 ho OUT pn va the parasite resistor and therefore it hardly affects overcurrent detection. applied to the OUT pin. Ifthe voltage falls below -0.3V, add a Schottky diode between the OUT pin and the ground. The forward Ce eer ng owarioad detection current voltage of the Schottky diode can suppress the vottage applied to tthe Is the rrent limiting the OUT pin. Use the low forward voltage of the Schottky diode. }lselaireshr-dat- esl appli str iat Similarty, be careful not to cause the voltages at other pins to fall varies depending on the input voltage; the higher the input voltage, Pelow-0.3V. the more the overload detection current may increase. If any OUT problems occur as a result of the appearance of this symptom, FASS1X © J connect resistor R8 between current detection resistor Rs and the IS (+) pin and add resistor R7 for correction as shown in Figure 32. ® ASBD The standard resistance of R8 is several hundred ohms, and that GND of R7 is from several hundred kilohms to several megohms. 7 = Note that the above correction slightly lowers the output current when overload even where the input voltage is low. This correction Fig.33 Protection of OUT pin against the negative voltage is available only for the FA5510/11 that uses positive polarity for overcurrent detection. (14) Gate circuit configuration DB 1 To adjust switching speeds or prevent oscillation at gate terminals, © resistors are normally inserted between the power MOSFET gate C1 g terminal to be driven and the OUT pin of the IC. You may prefer to AC input mae = decide on the drive current independently, to turn the MOSFET on and off. Ifso, connect the MOSFET gate terminal to the OUT pin of © the IC as shown in Figure 34. In this circuit, Rg1 and Rg2 restrict | 4 the current when the MOSFET is tumed on, and only Rg} restricts the current when it is tumed off. R7 Rg1 Rg2 S FA5510/11 U R8 FA551X @©—CI a 1s) Ot ouT Ly a [Rs Fig.34 Gate circuit Fig.32 Correction of overload detection current

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(15) Loss calculation When the total gate charge of the power MOSFET is Qg, the IC loss must be confirmed to use the IC within the ratings. Since it switching frequency is fsw , the supply voltage is Voc, and gate is hard to directly measure IC loss, some examples of calculating resistance is Rg, the loss caused at the IC output circuit is given approximate IC loss are given below. by: (15-1) Calculation example 1 _1 Ron Roff Suppose the supply voltage is Voc, IC current consumption is lecop, Par = peVeowaxtows( ae a Ro joss(14) the total gate charge of the power MOSFET is Qg, and the switching frequency is few . Total KC loss Pd can be calculated by: When gate resistance differs between ON and OFF as shown in Pd 4 Vecx(lecop + Qgx fsw)--+-+-(12) Figure 36, the loss is given by: This expression calculates an approximate value of Pd, which is normally a little larger than the actual loss. Since various conditions Pdr = 1xVoexgxfsw x Ron +—Roff_).¢. such as temperature characteristics apply, thoroughly verify the 2 Rgl+Rg2+Ron Rgl+Roff appropriateness of the calculation under all applicable conditions. Example: ‘When Vec = 18V, locop = 2.5mA (max) is obtained from the specifications. Suppose Qg = 80nC and fsw = 100kHz. vec Pd = 18Vx(2.5mA +80nCx100kHz) © =189mW aa e UT Ky ©— OI 5 (15-2) Calculation example 2 Ro? Rg2 The IC loss consists of the loss caused by operation of the contro! J ‘gt Rg: Gircuit and the loss caused at the output circuit to drive the power MOSFET. ® GND (15-2-1) Loss at the control circuit The loss caused by operation of the IC control circuit is Fig.36 Output circuit(2) calculated by the supply voltage and IC current consumption. When the supply voltage is Voc and IC current consumption is Iccop, loss Pop at the control circuit is: Example: Example: typical IC loss is given by: When Voc = 18, locop = 1.9mA (typ) is obtained from the 1 150 72 specficatons. The typical IC loss is given by: Par = ptevxtonctookten seas teq * oa 7a } ee BV Lema = 27m 2 102+152 102+70 =72.8mW (15-2-2) Loss at the output circuit ‘The output cirut of the IC is a MOSFET push-pull circuit. When (152.3) Total loss oe ee a the heGctorces on be dotonined as chow ‘The total loss (Pd) ofthe Cis the sum of the control circuit ioss below based on Voc = 18V and Tj = 25°C obtained from the (Pop) and the output circuit oss (Pdr) calculated previously: Ron = 150 (typ), Roff = 70 (typ) Example: The standard IC loss under the conditions used in (1) and (2) @vEC above are: Pd = Pop +Pdr = 27mW +72.8mW = 99.8mW TES” Jout va . ©Gnp Fig.35 Output Circuit{1) a BUSETIRIG

11.Application circuit FA5510 Wy 24 AC80t0 3 Ft C103 a Sl] e203 0201 0108.40 148 9fovisn Cite SSS oh | 3 1000p Ta awl = le tel ewd de ‘ge I tJ] ee z THe . SIE R102] 8 8011 200vi1000F FA "0 S| 5 |ESADS2M-02 ° als cant *F gros] 2 Gle2_Toaseaso EE 2200pF| R103, SHE tp 100K0 [] Qi 58 S R104 28K1938, q 204 (GND 0010 [] R09 Reo Soda], e fal] 2401] rio | S12 Dio | ao Poa, Pet [R208 oy Dike Spit ] R112 1kQ U 3K [o.0s 1K Poe 205, R206 por CO i '1000pF" 0.1 yF os os 3205 £202 a rT 220 bRast-o2 Kin 10RD Os a iP 12 ale Po] a a 32 ae i Bry 4 és a “Tur Gu FASSTO 2 als 280) 3lg 109 110 as BS | oz O.2yF Be FA5511 crs wav ace o, OE] oo01 101.468 rev 4 ois os TH 1 “ 01 {Peak:2.71A) OT RIOT = 3\\|s rl Md ° sic] 0 som cr0s,f 201 gb ale | Ua] ‘wn SoC] = 400V/220uF tev als YG026 otd\\o Ls || C201 col F C104 C102 _| p3SBA60 O: ES 2200uF 250VBA 470p 0.22pF| a EIS 47008 R103 hs to 130K0 [] at FG ‘204 ° ioe 21201, | oa (eno s30Ka [] R207 | | nee | 2 24K0 100 as Pct 8 2) [ee ryseot riod 3 Ogi? 1k bt eKO ¥8t 10 ros | [yp2ee 33k nko R107 TI Sr 6500-3 Phaot-o2 woo LOE ict a 3 = { = "3 Baal Slo ofa a a C106 cus ale | S[s pa Our Gu FASS a als 100 | Ler0 ole 0.22pF 0.22pF Sage

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‘c80t0 : ww fav, Ft cite C103 my, S| czo3_ pant 0108.40 govien Sith Sp or BH 3 Soar : sel = le Co! cod, be ge Te] em eh 2 Br sonndh Ea2.0 SIE 7 [Groratce tos] 2 Ct02 |p; aS rood 0zapr| O9S8A80 EIS R103 qu SVE iP 100K at F210) fo 38 é ios 224938 ef fon J, toa [1] wm | She RS BU 0) toa x is PCa PCH [yR20! Ose a2 i) U2 [6086 coos S08 Pez rior (©. 1000p F 0.4pF on Oa TT | He Bootes a co a] +—k - 12% f =e a = gis [sls fr 3 Sue uy lS Ee sc i (. at FASS14- 28u as 109 110 ais Sig | kara: p82 ry BO FA5515 cma aoa ‘ACBO to 2200 Oto 1.464 264v C101 _ C103 ce TH P| peor v0 (Poak:2.71A) = 0.22FATOp pa n a 0 ° ‘R101 net “gis rl sto [] 90 sot cos.) zor Ells Arse) ‘tou Rite = acovn20F 3 180V 3\\/e Yos0aC ole% i EI cot coos Sot + HiT 1 “chee foasaaco v2 EE aoe 2avaa aro} 0224] Aero Alle 470,F| ‘R103 Sie iP 1000 [] ar Fo cao S R104 2SK2101 i 00: [GND 100 [] ror nee ag 24k 100 gy | T+ Pet kd ¥) [JR206 [ yR201 wast 8 hea bread ley Ya loos aos [hpaoe oxo hes 107 03 soa es Force ia a a K—3 R203 [] mete a | bed sig? tot 20 cts a8 35 Co ‘ovr f] as he & FAG sls 100 | Leto O 7 S|8] oSe2Sih. Bue

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