FA3675F FUJI | Alldatasheet

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Technical content

n Dimensions, mm

  • LQFP-48 0~7˚ 9.0–0.3 0.10–0.06 0.5–0.1 0.2–0.06 0.127 –0.05 1.45 max 7.0 11 2 36 25 48 37 13 24 9.0–0.3 0.5–0.2 7.0 7.8 8.0 CMOS IC For Switching Power Supply Control n Description FA3675F is a control IC for 6-channel DC-DC converter. This IC can directly drive a Nch/Pch-MOSFET. This IC is suitable to reduce converter size because it has many functions in a small package LQFP-48. n Features
  • 6-channel PWM control with MOSFET direct driving : 5-channel for Pch-MOSFET, 1channel for Nch-MOSFET
  • Low input voltage: 2.5V to 20V
  • ±1.0% high accuracy bandgap reference
  • Low power consumption by means of CDMOS Standby mode: 20µA(max.) Operating mode: 10mA(max.)
  • Soft start function for each channel
  • ON/OFF function for each channel
  • Timer latch for short protection
  • Undervoltage lockout
  • Wide range of operation frequency: 50kHz to 1MHz
  • Package: LQFP-48(Thin and small) n Application
  • VTR-camera, digital-steel-camera and portable equipment FA3675F
  • Ta < 25°C Pin Pin Description No. symbol

1 VCC1 Power supply for control circuit

2 RT Oscillator timing resistor

3 CT Oscillator timing capacitor

4 CS3 Soft start for Ch. 3 & Ch. 4 5 CS5 Soft start for Ch. 6 6 CS4 Soft start for Ch. 5 7 CS1 Soft start for Ch. 1 8 CS2 Soft start for Ch. 2

9 VREF Reference voltage output

10 CREF Capacitor for reference voltage output

11 VREG Regulated voltage output

12 IN2- Ch. 2 inverting input to error amplifier 13 FB2 Ch. 2 output of error amplifier 14 IN1- Ch. 1 inverting input to error amplifier 15 FB1 Ch. 1 output of error amplifier 16 IN5+ Ch. 5 non-inverting input to error amplifier 17 IN5- Ch. 5 inverting input to error amplifier 18 FB5 Ch. 5 output of error amplifier 19 IN6- Ch. 6 inverting input to error amplifier 20 FB6 Ch. 6 output of error amplifier 21 IN3+ Ch. 3 non-inverting input to error amplifier 22 IN3- Ch. 3 inverting input to error amplifier 23 FB3 Ch. 3 output of error amplifier 24 IN4+ Ch. 4 non-inverting input to error amplifier Pin Pin Description No. symbol 25 IN4- Ch. 4 inverting input to error amplifier 26 FB4 Ch. 4 output of error amplifier

27 CP Timing capacitor for timer latch delay

28 GND Ground

29 TLSEL Ch. 3 & Ch. 4 timer latch selection (Low: disable) 30 CNT5 Ch. 6 ON/OFF function 31 CNT4 Ch. 5 ON/OFF function 32 CNT2 Ch. 2 ON/OFF function 33 CNT3 Ch. 3 & Ch. 4 ON/OFF function 34 CNT1 Ch. 1 ON/OFF function

35 VCC2 Power supply for output stage

36 VDRV Bias for logic circuit of outputs

37 PGND1 Power ground

38 OUT1S Ch. 1 source electrode of output stage 39 OUT1 Ch. 1 output (for Pch-MOSFET) 40 OUT4 Ch. 4 output (for Pch-MOSFET) 41 OUT3 Ch. 3 output (for Pch-MOSFET) 42 OUT2S Ch. 2 source electrode of output stage 43 OUT2 Ch. 2 output (for Pch-MOSFET) 44 OUT6S Ch. 6 source electrode of output stage 45 OUT6 Ch. 6 output (for Nch-MOSFET) 46 OUT5 Ch. 5 output (for Pch-MOSFET) 47 OUT5S Ch. 5 source electrode of output stage

48 PGND2 Power ground

n Absolute maximum ratings Item Symbol Rating Unit Power supply voltage VCC 20.0 V Source peak current IOUT –200 mA Sink peak current IOUT 200 mA Input voltage for analog input VANA –0.3 to +2.5 V Total power dissipation * Pd 550 mW Junction temperature TJ 125 °C Ambient temperature TOP –20 to +85 °C Storage temperature Tstg –40 to +150 °C n Recommended operating conditions Item Symbol Min. Max. Unit Power supply voltage VCC 2.5 18.0 V Input voltage for logic input Vcc ≤ 5.0 VLOG 0.0 Vcc +0.25 V Vcc > 5.0 0.0 5.25 Oscillation frequency fOSC 50 1000 kHz Oscillator timing resistor R T 6.8 100 k Ω Oscillator timing capacitor C T 22 1000 pF CREF terminal by-pass capacitor C REF 0.01 µF

Item Symbol Test condition Min. Typ. Max. Unit Oscillation frequency fOSC R T=10kΩ , C T=100pF 432 480 528 kHz Frequency variation due to supply voltage change fdV VCC =2.5 to 18V ± 1 ± 3% Frequency variation due to temperature change fdT Ta=–20 to +25°C ± 3 ± 6% Ta=+25 to +85°C ± 7 ± 14 Error amplifier section Item Symbol Test condition Min. Typ. Max. Unit Input offset voltage VIOF 21 0 m V Input common mode voltage range VICOM 0.2 1.5 V Open-loop gain AVOL 70 75 dB Unity-gain bandwidth fT 1.0 MHz Output sink current IFBL VFB =VREF +0.05V 2.5 3.5 mA Output source current IFBH VFB =VREF -0.05V –0.18 –0.14 mA Soft-start circuit section 1 (CS1, CS2, CS3) Item Symbol Test condition Min. Typ. Max. Unit Input threshold voltage VCSO Duty cycle=0% 0.36 0.46 0.56 V VCS100 Duty cycle=100% 1.11 1.31 1.51 V Charge current ICS VCS =0V –7.5 –5.0 –2.5 µA Soft-start circuit section 2 (CS4, CS5) Item Symbol Test condition Min. Typ. Max. Unit Input threshold voltage VCSO Duty cycle=0% 0.36 0.46 0.56 V VCS100 Duty cycle=100% 1.11 1.31 1.51 V Charge current ICS 0 µA n Electrical characteristics (Ta=25°C, Vcc1=Vcc2=6V, CT=100pF, RT=10kΩ ) Reference voltage section Item Symbol Test condition Min. Typ. Max. Unit Output voltage VREF No load 0.99 1.00 1.01 V Load regulation VRFLOD No load to RL=15kΩ 71 5 m V Line regulation VRFLIN VCC =2.5 to 18V 3 10 mV Output voltage variation due to temperature changeVRTa Ta=–20 to +85°C ± 0.5 ± 1.0 % Regulated voltage section Item Symbol Test condition Min. Typ. Max. Unit Output voltage VREG No load 2.134 2.20 2.266 V Load regulation VRG LOD No load to RL=3.9kΩ 21 0 m V Line regulation VRG LIN VCC =2.5 to 18V 6 20 mV Output voltage variation due to temperature changeVRGTa Ta=–20 to +85°C ± 0.5 ± 1.0 %

Output section 4 (OUT6) Item Symbol Test condition Min. Typ. Max. Unit L-level ON resistance R ONL IO =10mA, OUT6S:VCC2 10 15 Ω H-level ON resistance R ONH IO =–10mA, OUT6S:VCC2 10 15 Ω Rise time tr C LOAD =1000pF, OUT6S:VCC2 40 60 ns Fall time tf C LOAD =1000pF, OUT6S:VCC2 70 95 ns Source current IOUT OUT6S:R S6=330Ω to VCC2 -14 -11 -8 mA VCC =7V Short-circuit protection section Item Symbol Test condition Min. Typ. Max. Unit Threshold voltage at CP VCPTH 1.39 1.64 1.89 V Charge current at CP ICP –3.0 –1.9 –1.0 µA Threshold voltage at error amplifier output VFBTL 1.36 1.56 1.76 V ON/OFF logic input section Item Symbol Test condition Min. Typ. Max. Unit Input voltage for ON mode VDH Vcc≤5.0V 1.0 Vcc V +0.25 Vcc>5.0V 1.0 5.25 Input voltage for OFF mode VDL 0 0.4 V Undervoltage lockout circuit section Item Symbol Test condition Min. Typ. Max. Unit OFF to ON threshold voltage VUVVCC 1.52 1.72 1.92 V Voltage hysteresis ΔUVCC 0.1 V Output section 1 (OUT1) Item Symbol Test condition Min. Typ. Max. Unit L-level ON resistance R ONL IO =10mA, OUT1S:GND 6 10 Ω H-level ON resistance R ONH IO =–10mA, OUT1S:GND 6 10 Ω Rise time tr C LOAD =1000pF, OUT1S:GND 30 50 ns Fall time tf C LOAD =1000pF, OUT1S:GND 60 85 ns Sink current IOUT OUT1S:R S1=68Ω to GND 9 12 15 mA Output section 2 (OUT2, OUT5) Item Symbol Test condition Min. Typ. Max. Unit L-level ON resistance R ONL IO =10mA 10 15 Ω OUT2S, OUT5S:GND H-level ON resistance R ONH IO =–10mA 10 15 Ω OUT2S, OUT5S:GND Rise time tr C LOAD =1000pF 40 60 ns OUT2S, OUT5S:GND Fall time tf C LOAD =1000pF 70 95 ns OUT2S, OUT5S:GND Sink current IOUT OUT2S, OUT5S: 8 11 14 mA R S2, RS5=68Ω to GND Output section 3 (OUT3, OUT4) Item Symbol Test condition Min. Typ. Max. Unit L-level ON resistance R ONL IO =10mA 10 15 Ω H-level ON resistance R ONH IO =–10mA 10 15 Ω Rise time tr C LOAD =1000pF 40 60 ns Fall time tf C LOAD =1000pF 70 95 ns Overall device Item Symbol Test condition Min. Typ. Max. Unit Standby current ICCO 12 20 µA Operating-state supply current ICC Duty cycle=0%, R L= ∞ 46m A

n Characteristic curves (Ta = 25°C) Oscillation frequency (fOSC ) vs. Oscillation frequency (f OSC ) vs. timing resistor resistance (RT) ambient temperature (Ta) Output duty cycle vs. CS terminal voltage (VCS ) Output duty cycle vs. FB terminal voltage (V FB ) Reference voltage (VREF ) vs ambient temperatare (Ta) Supply current (I cc) vs supply voltage (Vcc) CT=29pF 56pF 100pF 500pF 10 100 100 1000 R T [kΩ ] fOSC [kHz] Ta [°C] fosc [kHz] 420 440 460 480 500 520 400 0 20 40 60 80 10020 Vcs [V] 100 Output duty cycle [%] VFB [V] 100 Output duty cycle [%] VREF [V] 0.96 0.98 1.02 1.04 1.06 Ta [°C] 0 20 40 60 80 10020 0 5 10 15 20 C T=100pF , RT=10kΩ Vcc [V] Icc [mA] Duty cycle 60% Duty cycle 0% Duty cycle 100%

H-level output voltage (VCC-VOH ) vs. L-level output voltage(V OL ) vs. output sink current (ISINK ) output source current (ISOURCE ) for OUT1 for OUT1 H-level output voltage (VCC-VOH ) vs. L-level output voltage(V OL ) vs. output source current (ISOURCE ) for OUT2, 3, 4, 5, 6 output sink current (ISINK) for OUT2, 3, 4, 5, 6 Error amplifier voltage gain(Av) / phase(θ) vs. frequency(f) 0 50 100 150 200 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.2 ISOURCE [mA] VCC –VOH [V] 0 50 100 150 2000 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.2 ISINK [mA] VOL [V] ISOURCE [mA] VCC– VOH [V] 100 150 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 0 50 ISINK [mA] VOL [V] 100 150 0.2 0.4 0.6 1.2 1.4 0.8 10 100 1K 10K 100K 1M 10M –60 –40 –20 100 120 140 160 180 Av [deg] AV [dB] f [Hz] Condition: Open loop

Parts tolerances characteristics are not defined in the circuit design sample shown above. When designing an actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical operation.