ES5106

ES5106_03 CYRUSTEK | Alldatasheet

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3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/141 １． GENERAL DESCRIPTION The ES 5106 is a low power mo nolithic CMOS 3 1/2 digit LCD display A/D converter. The single chip ES 5106 provides all necessary active devices which contains the internal clock, voltage reference, seven- segment decoders, LCD display driv ers and a back plane driver. The improved internal zener reference voltage circuit gives the analog common a small temperature coefficient of 60 ppm/℃ typically. The high accuracy characteristics of the ES5106 perform very low linearity error and rollover error. The high input impedance (>1012Ω) and low input leakage curre nt (1pA typical) give the ES5106 a good application in the field of high im pedance circuit measurement. The differential input and reference are suitable for measuring bridge transducer or ohms by using ratiometric method. The dual slope conversion techni que makes the ES5106 a good normal and common mode rejection ratio. With a suitable oscillator frequency, the ES5106 has a high re jection of 50HZ, 60HZ and 400HZ line frequency noise. With single power supply, a few passive components and a LCD display, ES5106 can be built as a hi gh performance panel meter. Existing TSC7106 or ICL7106 based systems may be upgraded without changing external, passive component values.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/142 ２． FEAUTRES  Guaranteed zero reading with zero input  Low input leakage current (1pA typical)  Internal Reference with low temperature drift (60ppm/℃ typial)  Low noise (15μVp-p typical)  Direct LCD display driver-no external components required  Differential input and voltage reference  Precision null detection with true polarity at zero  Internal clock circuit  No additional active circuits required ３． APPLICATIONS  Digital panel meters  Digital multimeters  Thermometers  Capacitance meters  pH meters  Photometers

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/143 E T

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/144 ４． PIN ASIGNMENT 4 4 - p i n Q F P p a c k a g e NC NC TEST OS3 OS2 OS1 AB4 POL BP NC NC INT BUFF A.Z INLO INMI COMMON C-REF C+REF REFLO REFHI ES5106Q

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/145 P I N A S S I G N M E N T 4 0 - p i n D I P p a c k a g e

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/146 ５．Pin Description Pin No Symbol Description 1 V+ Positive supply volta ge. Connecting to battery positive terminal. 2 D1 LCD segment line. 3 C1 LCD segment line. 4 B1 LCD segment line. 5 A1 LCD segment line. 6 F1 LCD segment line. 7 G1 LCD segment line. 8 E1 LCD segment line. 9 D2 LCD segment line. 10 C2 LCD segment line. 11 B2 LCD segment line. 12 A2 LCD segment line. 13 F2 LCD segment line. 14 E2 LCD segment line. 15 D3 LCD segment line. 16 B3 LCD segment line. 17 F3 LCD segment line. 18 E3 LCD segment line. 19 AB4 LCD segment line. 20 POL LCD segment line. 21 BP LCD Backplane. 22 G3 LCD segment line. 23 A3 LCD segment line. 24 C3 LCD segment line. 25 G2 LCD segment line. 26 V- Ne gative supply voltage. Connecting to battery negative terminal. 27 INT Integration cycle output. 28 BUFF Integration resistor connection for buffer output. 29 A.Z Auto-zero capacitor connection. 30 IN LO Low analog input signal connection. 31 IN MI High analog input signal connection.

32 COMMON Set the common-mode voltage for the system

33 C+REF Positive capacitor connectio n for on-chip DC-DC converter. 34 C-REF Negative capacitor connectio n for on-chip DC-DC converter. 35 REF LO Low differential reference input connection. 36 REF HI High differential reference input connection. 37 TEST Pull high to V+ all LCD segments will be activated. 38 OS3 Crystal oscillator connection. 39 OS2 Crystal oscillator connection. 40 OS1 Crystal oscillator connection.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/147 ６．ABSOLUTE MAXIMUM RATINGE Characteristic Rating Supply Voltage (V+ to V-)1 2 V Analog Input Voltage (either input) V + to V- Reference Input Voltage (either input) V + to V- Clock Input TEST to V + Power Dissipation (plastic package) 800mW Operating Temperature 0℃ to +70 ℃ Storage Temperature -65℃ to +160 ℃ Lead Temperature(soldering, 10 sec) 270℃ ７．ELECTRICAL CHARACTERISTICS Limit Characteristic Test Condition Min. Typ. Max. Units Zero Input Reading V IN=0.0V Full-Scale=200.0mV Digital Reading Ratiometric Reading V IN=VREF, VREF=100mV 999 999/1000 1000 Digital Reading Linearity (Max. deviation from best straight line fit) Full-Scale=200mV or Full-Scale=2.000V -1 ±0.2 1 Counts

3 1/2 DIGIT A/D CONVERTERW/LCD 03/05/14 ELECTRICAL CHARACTERISTICS (continued) Limit Characteristic Test Condition Min. Typ. Max. Units Roll-Over Error -V IN=+VIN〜200.0mV -1 ±0.2 +1 Counts Common Mode Rejection Ratio VCM=±1V,VIN=0V Full-Scale=200.0mV － 50 －μ V/V Noise V IN=0V,Full- Scale=200.0mV － 15 －μ Vp-p Input Leakage Current VIN=0V － 11 0 p A Zero Reading Drift VIN=0V,0℃≦TA≦+70 － 0.2 1 μV/℃ Scale Factor Temperature Coefficient VIN=199.0mV,0℃≦TA ≦+70℃ Ext.Ref.=0ppm/℃ － 15 ppm/℃ Analog COMMON Voltage (with respect to V+) 25KΩ Between Common and Positive Supply 2.8 3.0 3.2 V Analog COMMON Temperature Coefficient 25KΩ Between Common and V +,0℃≦TA≦70℃ － 60 75 ppm/℃ Segment Drive Voltage V+ to V-=9V 4 5 6 V Back plane Drive Voltage V+ to V-=9V 4 5 6 V Supply Current (Does not include COMMON current) VIN=0V － 0.5 0.65 mA

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/149 ８．Operation Mode  Analog Common The Common pin is used to se t the common-mode voltage for the system in which the input signals are floating with respect to the power supply of the ES5106. In all most of the applications, IN LO, REF LO and COMMON pins are tied to the same point, so that the common mode voltage can be rem oved from the reference system and the converter. In some applica tions, IN LO may not at the same point with COMMON and thus a common mode voltage exists in the system, the high CMRR (86db typi cal) of the ES 5106 can take care of this common mode voltage. Neverthereless, it should be care to prevent the output of the integrator from saturation. The COMMON pin is also used as a voltage reference. It sets a voltage which is around 2.9 volts more nega tive than the positive supply. The COMMON voltage of ES5106 has a 0.001 %/% voltage coefficient and a low output impedance of 15Ω typical. The analog COMMON is tied intern ally to an N channel FET capable of sinking 30mA. This FET will hold the COMMON voltage at 2.9 volts when an ex ternal load atte mpt to pull the COMMON voltage toward the positive supply.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1410 The source current of COMMON is only 10μA, so it is easy to pull COMMON voltage to a more negative voltage with respect to the positive supply. When the total supply voltage is large enough to cause the zener to regulate(>7V), the CO MMON voltage will have a low temperature cofficient typically less than 60 ppm/ ℃. This voltage can be used to generate the ES5106 reference voltage and an external voltage reference will be unnecessary in most cases.  Reference Voltage For a 1000 counts reading, the input signal must be equal to the reference voltage. So for a 2000 counts full-scale reading, it requires the input signal be twice the refe rence voltage. Thus, for the 200mV and 2.000V full-scale, the referenc e voltage should equal 100.0mV and 1.000V, In some applications the full-scale input voltage may be other than 200mV or 2V, but 600m V, for example, The reference voltage should be set to 300 mV and the input signal can be used directly without being divided. The differential reference can be used during the measurment of resistor by the ratiometric me thod and when a digital reading of zero is desired for V IN≠0. A compensating offset voltage can be applied between COMMON and IN LO and the voltage of being measured is connected between COMMON and IN HI.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1411  System Timing The oscillator frequency is divided by four prior to clocking the internal decade counte rs. The signal integrate takes a fixed 1000 counts time period which is equal to 4000 clock pulses. The back plane drive signal is derived by dividing clock frequency by 800. To make a maximum rejection of lin e frequency (60Hz or 50Hz) noise pickup, the signal integrate period should be a multiple of the line frequency period. For 600Hz noise rejection, oscillator frequencies of 120KHz, 80KHz, 60KHz, 48KHz, 40KHz, etc. should be selected. For 50Hz rejection, oscillato r frequencies of 100KHz, 50KHz, 40KHz, etc. would be suitable. For all ranges of frequency Rosc should be 100K Ω, Cosc is selected from the approximate equation f=0.45/RC. For 48KHz clock (3readings/second), Cosc=100PF.  Integrating Resistor The input buffer amplifier and integrator both have class A output stage with 100 μA of quiescent current and can supply 20μA drive currents with negligible linearity errors. The integrating resistor should be chosen to remain in the output stage linear drive region. It should be noticed that the integrating resistor should not be so large such that the leakage currents of printed circuit board will induce errors. For a 200m V full-scale the recommended integrating resistor value is 47KΩ and for 2V full-scale is 470K Ω.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1412  Integrating Capacitor The integrating capacitor shou ld be selected to maximize integrator output voltage swing without causing output saturation. If the analog COMMON is us ed as voltage reference, a±2V full-scale integrator output swing is sa tisfactory. For 3 readings/second (48KHz clock) a 0.22μF value of CINT is suggested. When different oscillator frequencies are used, C INT must be changed in inverse proportion to maintain the nominal ±2V integrator swing. The integrating capacitor should have low dielectric absorption to minimize roll-over error. An inexpensive polypropylene capacitor will work well.  Auto-Zero Capacitor The auto-zero capacitor size has some influence on system noise. A 0.47 μF capacitor is recommended for 200mV full scale where noise is very important. A 0.047 μF capacitor is adequate for 2V full scale aplications. A myla r type dielectric capacitor is adequate.  Reference Voltage Capacitor When IN LO is tied to analog COMMON, a 0.1 μF capacitor adequate to be the reference capacitor. If a large common-mode voltage exists and the applicati on require a 200mV full scale, a larger value is required to prevent roll-over error. A 1.0 μF capacitor will hold the roll-over error to 0.5 count.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1413  TEST The TEST pin is tied to the inte rnally generated digital supply through a 500 Ω resistor. It's potentia l is 5V less than V +. Thus TEST may be used as the nega tive power supply connection for externally generated segment driv ers. The TEST pin load should be no more than 1 mA. If TEST is pulled high to V + all segments plus the minus sign will be activated and the disp lay should read-1888. For such operation, the segment have a cons tant DC voltage and may destroy the LCD display if left in this mode for several minutes.  Segment Drivers For 3 readings/second (48KHz clock) the BP frequency is a 60Hz square wave with a nominal amplitude of 5V. The segments are driven at the same frequenc y and amplitude and are in phase with BP when OFF, but out of phase when ON . In all cases neglible DC voltage exists across the segm ents. The polarity inidication is "ON" for negative voltage inputs.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1414 ９．TEST CIRCUIT

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1415 １０．APPLICATION CIRCUITS (1) This circuit uses analog COMMON voltage as reference voltage. Values here are for 200.0mV full scale, 3readings/sec.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1416 (2) The values of this circuit are for 2.000V full scale, 3 readings/sec.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1417 (3) The circuit is for measuring ratiometric values of quad loadcell.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1418 (4) This circuit is a di gital centigrade thermo meter. The temperature sensor is a silicon diode-conn ected transistor which has a temperature coefficient of about-2mV/℃.

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1419 １１．包裝(Package) 44-pin QFP package

3 1/2 DIGIT A/D CONVERTER W/LCD 03/05/1420 40-pin DIP package