EC5575 E-CMOS | Alldatasheet
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14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 1 of 12 2007/09/12 FEATURES
- Wide supply voltage range 6.5V ~ 18V
- Rail-to-rail output swing (The highest two stage & lowest two stage)
- High slew rate 1V/µs
- GBWP 1 MHz
- 2 MHz -3dB Bandwidth
- Large Vcom Drive Current: ±100mA(Max)
- Ultra-small Package TQFP-48 APPLICATIONS
- TFT-LCD Reference Driver GENERAL DESCRIPTION The EC5575 is a 14+1 channel voltage buffers that buffers reference voltage for gamma correction in a thin film transistor liquid crystal display (TFT LCD). This device incorporating a Vcom amplifier circuits, four rail to rail buffer amplifier circuits (the highest two stage and lowest two stage) and 10 buffer amplifiers circuits. The EC5575 is available in a space saving 48-pin TQFP package, and the operating temperature is from –20°C to +85°C. PIN ASSIGNMENT ( E Type ) Li Ki Ji Ii Hi Vss VDD Gi Fi Ei Di Ci Bi Ai VDD Vss Ao Vss Bo N.C N.C VDD N.C Co DoEoFoGoVDDVssHoIoJoKoLoMo No Vcomo Vss VDD N.C N.C N.C Vss VDD Mi Ni Vcomi Ai Ao Bi Bo Ci Co Di Do Ei Eo Fi Fo Gi Go Hi Ho Ii Io Ji Jo Ki Ko Li Lo Mi Mo Ni No ComiComo 1 2 34 5678 9 10 11 12 252627282930313233343536 A, B, M, N: Rail to Rail OPAMPs
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 2 of 12 2007/09/12 PIN ASSIGNMENT ( E2 Type ) Ordering Information Part No. Top Mark Package Description EC5575-F AS15-F TQFP48 14+1 lead-free EC5575-G AS15-G TQFP48 14+1 Green Package EC5575-FR AS15-F TQFP48 14+1 lead-free; (R) : Tape & reel EC5575-GR AS15-G TQFP48 14+1 Green Package; (R) : Tape & reel EC5575-HF AS15-HF TQFP48 14+1 lead-free ( H ) EC5575-HG AS15-HG TQFP48 14+1 Green Package ( H ) EC5575E2-F AS15E2-F TQFP48 14+1 (pin40 is Vcom-) lead-free EC5575E2-G AS15E2-G TQFP48 14 chann el (pin40 is Vcom-)Green Package EC5575E2-HF AS15E2-HF TQFP48 14+1 (pin40 is Vcom-) lead-free ( H ) EC5575E2-HG AS15E2-HG TQFP48 14 chann el (pin40 is Vcom-)Green Package (H) Note: (H): Exposed pad (3.05x3.05 mm) ; (R) : Tape & reel
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 3 of 12 2007/09/12 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) Values beyond absolute maximum ratings may cause permanent damage to the device. These are stress ratings only; functional device operation is not implied. Exposure to AMR conditions for extended periods may affect device reliability. Supply Voltage between VS+ and VS- Input Voltage (For rail-to-rail ) V S-Ñ0.5V, Maximum Continuous Output Current (A ~ N uffers) Maximum Continuous Output Current(Com Buffer) Maximum Die Temperature +18V VS +Ð0.5V 30mA 100mA +150°C Storage Temperature Operating Temperature Lead Temperature ESD Voltage -65°C to +150°C -20°C to +85°C 260°C 2kV Important Note: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA ELECTRICAL CHARACTERISTICS VS+= +5V, VS - = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C unless otherwise specified. Parameter Description Condition Min Typ Max Units Input Characteristics VOS Input Offset Voltage VCM= 0V 2 12 mV TCVOS Average Offset Voltage Drift [1] 5 µV/°C IB Input Bias Current V CM= 0V 2 50 nA RIN Input Impedance 1 G c CIN Input Capacitance 1.35 pF Output Characteristics VOL Output Swing Low IL= -5mA (A, B, M, N rail-to-rail Buffers) -4.92 -4.85 V VOH Output Swing High I L= 5mA (A, B, M, N rail-to-rail Buffers) 4.85 4.92 V VOL Output Swing Low I L= -5mA (C ~ L Buffers) -3.5 V VOH Output Swing High I L= 5mA (C ~ L Buffers) 3.5 V ISC Short Circuit Current (A ~ N Buffers) ±120 mA IOUT Output Current (A ~ N Buffers) ±30 mA ISC(Com) Short Circuit Current (Com Buffer) ±300 mA IOUT(Com) Output Current (Com Buffer) ±100 mA Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from ±3.25V to ±7.75V 60 80 dB IS Supply Current (Per Amplifier) No Load (A ~ N Buffers) 500 750 µA IS(Com) Supply Current (Com Buffer) 5 mA Dynamic Performance SR Slew Rate [2] -4.0VÙVOUTÙ4.0V, 20% to 80% 1 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), V O=2V Step 5 µs BW -3dB Bandwidth RL = 10KƸ, CL = 10PF 2 MHz PM Phase Margin RL = 10KƸ, CL = 10PF 60 Degrees CS Channel Separation f = 1 MHz 75 dB 1. Measured over operating temperature range 2. Slew rate is measured on rising and falling edges
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 4 of 12 2007/09/12 TYPICAL PERFORMANCE CURVES Input Offset(mV) Quantity(Amplifiers) Figure (a) Input Offset V oltage Distribution Figure (b) Input beyond the rails Figure (c) Rail to Rail Capability igure (d) Large Signal Transient Response Figure (e) Large Signal Transient Response Figure (f) Small Signal Transient Response VCC = 10V , F :10K VCC = 10V , F :10K VCC = 10V , F :1K VCC = 10V , F :1K VCC = 10V , F :1K
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 5 of 12 2007/09/12 TYPICAL PERFORMANCE CURVES Figure (g) Open Loop Gain & Phase vs. Frequency Figure (h) Frequency Response for Various C L Figure (h) Frequency Response for Various RL
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 7 of 12 2007/09/12 PDmax = Maximum Power Dissipation in the Package. The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: P Dmax =∑i[VS * ISmax + (VS+ – VO) * IL] When sourcing, and P Dmax = ∑i[VS * ISmax + (VO – VS-) * IL] When sinking. Where: i = 1 to 4 V S = Total Supply Voltage ISmax = Maximum Supply Current Per Amplifier VO = Maximum Output Voltage of the Application IL= Load current RL= Load Resistance = (VS+ – VO)/IL = (VO – VS-)/ IL A calculation for R L to prevent device from overheat can be easily solved by setting the two P Dmax equations equal to each other. Pin Count Θja (oC/W) Θjc (C/W) TQFP-48 67 31 Normal TQFP-48 31 15 EXPOSED PAD Driving Capacitive Loads The EC5575 is designed to drive a wide range of capacitive loads. In addition, the output current handling capability of the device allows for good slewing characteristics even with large capacitive loads. The combination of these features make the EC5575 ideally for applications such as TFT LCD panel grayscale reference voltage buffers, ADC input amplifiers, etc. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The amplifiers drive 10pF loads in parallel with10K Ƹ. with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5 Ƹand 50 Ƹ) can be placed in series with the output. However, this will obviously reduce the gain slightly. A nother method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150 Ƹ and 10nF are typical. The advantage of a snubber is that it improves the settling and overshooting performance while does not draw any DC load current or reduce the gain. Power Supply Bypassing and Printed Circuit Board Layout With high phase margin, the EC5575 performs stable gain at high frequency. Like any high-frequency device, good layout of the printed circuit board usually comes with optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the V S- pin is connected to ground, a 0.1 µF ceramic capacitor should be placed from V S+ pin to V S- pin as a bypassing capacitor. A 4.7 µF tantalum capacitor should then be connected in parallel, placed in the region of the amplifier. One 4.7 µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used.
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 8 of 12 2007/09/12 Application Circuits
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 9 of 12 2007/09/12 PACKAGE MARKING INDICATION (PACKAGE TYPE TQFP 48) LEAD FREE TQFP48 ( MAKING ) AS15 DATE CODE Lot. Number AS15-F DATE CODE Lot. Number
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 10 of 12 2007/09/12 OUTLINE DIMENSIONS (Dimensions shown in millimeters) Ô Ô Ô Ô Ô Ô NBY #4$ Ô PÔP Ô
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 11 of 12 2007/09/12 OUTLINE DIMENSIONS H: Exposed pad (3.05x3.05 mm)
14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 12 of 12 2007/09/12 General Disclaimer: 1. Product information and specifications furnished by E-CMOS in this data sheets are in effect as of the publication date shown and are believe d to be accurate and reliable. However, no responsibility is assumed by E-CMOS for the use of any information shown herein, nor for any patent or other rights infringement. 2. No license is granted by implication or ot herwise under any patent or industrial properties owned by E-CMOS or any third party through this document. 3. The information herein is subject to change at any time without notice. 4. Neither reproduction nor duplication of this document, in any form, the whole or part is allowed without the prior written approval from E-CMOS. 5. Products of E-CMOS Corp., unless otherwise sp ecified, are not authorized for use as critical components of any device or equipment in applications that demand extremely high reliability or where its failure or malfunction may dire ctly threaten human life or cause risk of bodily injury, such as aerospace, aircraft, vehicles , nuclear power, radiat ion resistant system, transportation, disaster prev ention equipment, gas related equipment, physical exercise equipment, safety equipment and medical equipment for life support, etc. 6. Although E-CMOS makes every attempt to ens ure that its products are of high quality and reliability, thorough co nsideration of safety design an d operating within the ranges guaranteed are strongly recommended to prevent any accident and damage that may ensue. E-CMOS bares no responsibility for failure or damage when abused or used beyond the guaranteed ranges. 7. Products applied to life support devices and systems are strongly requested to contact E-CMOS Corporation headquarter for the writt en approval to establish suitable terms & conditions. E-CMOS’ warranty is limited to replacement of defective components. Any personal injury or death or any other consequential damages of property are not covered. Copyright © 2002 by E-CMOS Corporation. E-CMOS CORPORATION IC DATASHEET ADDRESS: NO.1, CREATION RD. 2ND, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU 300, TAIWAN, R.O.C. WEBSITE: http://www.ecmos.com.tw E-MAIL: mailto:sales@ecmos.com.tw TEL: 886-3-5785888 FAX: 886-3-5783630