DS34C87T ARTSCHIP | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 7

Technical content

Features

.TTL inputs compatible .Typical propagation delays:6ns .Typical output skew: 0.5ns .Outputs won’t load line when Vcc =0V .Meets the requirements of EIA standard RS-422 .Operation from single 5V supply .TRI-STATE outputs for connection to system buses .Low quiescent current .Available in surface mount Connection and Logic Diagrams See Pin Description Table for details Top View Order Number DS34c87TM or D34C87TN See NS Package Number M16A or N16E Truth Table Input Control Input Non-Inverting Output Inverting Output H L X H H L H L z L H Z L=Low logic state H=High logic state X=Irrelevant Z=TRI-STATE(high performance)

www.artschip.com 2 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. S u p p l y V o l t a g e ( V c c ) - 0 . 5 V t o 7 . 0 V DC Voltage (VIN) - 1 . 5 V t o V c c + 1 . 5 V DC Output Voltage (VOUT) - 0 . 5 t o 7 V Clamp Diode Current (IIK,IOK) ± 2 0 m A DC Output Current, per pin (IOUT) ± 1 5 0 m A Storage Temperature Range (TSTG) -65 ¥ to +150 ¥ Maximum Power Dissipation (PD) @ 25¥ (Note 3) Plastic “N” Package 1736mW Lead Temperature (TL) ( S o l d e r i n g 4 s e c ) 2 6 0 ¥ This device does not meet 2000V ESD rating. (Note 12) Operating Conditions Min Max Units S u p p l y V o l t a g e ( V c c ) 4 . 5 0 5 . 5 0 V DC Input or Output Voltage (VIN,VOUT) 0 V c c V Operating Temperature Range (TA) D S 3 4 C 8 7 T - 4 0 + 8 5 ¥ Input Rise or Fall Times (tr, tf) 500 ns Vcc = 5V ± 10% (unless otherwise specified) Symbol Parameter Conditions Min Typ Max Units VIH High Level Input Voltage 2.0 V VIL Low Level Input Voltage 0.8 V VOH High Level Output Voltage VIN=VIH or VIL, IOUT=-20mA 2.5 3.4 V VOL Low Level Output Voltage VIN=VIH or VIL, IOUT=48mA 0.3 0.5 V VT Differential Output Voltage RL=100Ω (Note 5) 2.0 3.1 V | VT |-| T| Difference In Differential Output RL=100Ω (Note 5) 0.4 V Vos Common Mode Output Voltage RL=100Ω (Note 5) 2.0 3.0 V | Vos - os| Difference In Common Mode Output RL=100Ω (Note 5) 0.4 V IIN Input Current V IN = Vcc, GND, VIH, or VIL ±1.0 µA Icc Quiescent Supply Current IOUT = 0µA, VIN=Vcc or GND VIN =2.4V or 0.5V (Note 6) 200 0.8 500 2.0 µA mA IOZ TRI-STATE TM Output Leakage Current VOUT = Vcc or GND Control =VIL ±0.5 ±0.5 µA ISC Output Short Circuit Current VIN=Vcc or GND (Notes 5,7) -30 -150 mA IOFF Power Off Output Leakage Current Vcc = 0V (Note 5) VOUT =6V VOUT=-0.25V 100 -100 µA µA Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not mean to imply that the device should be operated at these limits. The table of “Electrical Characteristics” provide conditions for actual device operation. Note 2: Unless otherwise specified, all voltages are referenced to ground. All current into device pins are positive; all curre nts out of device pins are negative. Note 3: Ratings apply to ambient temperature at 25¥. Above this temperature derate N package 13.89 mW/¥, and M package 9.80mW/¥. Note 4:Unless otherwise specified, min/max limits apply across the -40¥ to 85 ¥ temperature range. All typicals are given for Vcc =5V and T A =25¥. Note 5: See EIA Specification RS-422 for exact test conditions. Note 6: Measured per input. All other inputs at Vcc or GND. Note 7: This is the current sourced when a high output is shorted to ground. Only one output at a time should be shorted.

www.artschip.com 3 Switching Characteristics (Note 4) Vcc =5V± 10%, tr, tf ≤6ns (Figures 1,2,3,4) Symbol Parameter Conditions Min Typ Max Units tPLH,tPHL Propagation Delay Input to Output S1 Open 6 11 ns Skew (Note 8) S1 Open 0.5 3 ns tTLH,tTHL Differential Output Rise And Fall Times S1 Open 6 10 ns tPZH Output Enable Time S1 Closed 12 25 Ns tPZL Output Enable Time S1 Closed 13 26 Ns tPHZ Output Disable Time (Note 9) S1 Closed 4 8 Ns tPLZ Output Disable Time (Note 9) S1 Closed 6 12 Ns CPD Power Dissipation Capacitance (Note 10) 100 pF CIN Input Capacitance 6 pF Note 8: Skew is defined as the difference in propagation delays between complementary outputs at the 50% point. Note 9: Output disable time is the delay from the control in put being switched to the Output transistors turning off. The actua l disable times are less than indicated due to the delay added by the RC time constant of the load. Note 10: C PD determines the no load dynamic power consumption, P D = C PD V 2CC f +Icc vcc, and the no load dynamic current consumption, IS=CPD Vcc f +Icc Comparison Table of Switching Characteristics into “LS-Type” Load (Note 11) Vcc = 5V, TA=+25¥, tr ≤6ns, tf ≤6ns (Figures 4,5,6,7,8,9) DS34C870 DS3487 Symbol Parameter Conditions Typ Max Typ Max Units tPLH,tPHL Propagation Delay Input to Output 6 10 10 15 ns Skew (Note 8) 1.5 2.0 ns tTLH,tTHL Differential Output Rise And Fall Times 4 7 10 15 ns tPHZ Output Disable Time (Note 9) CL=50pF, RL=200Ω, S1 Closed, S2 Closed 8 11 17 25 ns tPLZ Output Disable Time (Note 9) CL=50pF, RL=200Ω, S1 Closed, S2 Closed 7 10 15 25 ns tPZH Output Enable Time C L=50pF, RL=∞, S1 Closed, S2 Closed 11 19 11 25 ns tPZL Output Enable Time C L=50pF,RL=200Ω, S1 Closed, S2 Open 14 21 15 25 ns Note 11: This table is provided for comparison purposes only. The values in this table for the DS34C87 reflect the performance of the device but are not tested or guaranteed. Note 12: ESD Rating: HBM (15kΩ, 100pF) Input≥1500V Output ≥1000V EIAJ (0Ω, 200pF) All Pins ≥350V

www.artschip.com 6 Pin Description Table Pin Number (DIP or SOP package) Pin Name Function

1 INPUT A Channel A –TTL/CMOS input

2 OUTPUT A – True True Output for Channel A,

3 OUTPUT A - Inverting Inverting Output for Channel A, RS422 Levels

4 A/B CONTROL Enable Pin for Channels A and B,

Active High, TTL/CMOS Levels

5 OUTPUT B - Inverting Inverting output for channel B,

6 OUTPUT B -True True Output for Channel B,

7 INPUT B Channel B –TTL/CMOS input

8 GND Ground Pin (0V)

9 INPUT C Channel C –TTL/CMOS input

10 OUTPUT C – True True Output for Channel C,

11 OUTPUT C - Inverting Inverting Output for Channel C,

12 C/D CONTROL Enable Pin for Channels C and D,

Active High, TTL/CMOS Levels

13 OUTPUT D - Inverting Inverting Output for channel D,

14 OUTPUT D- True True Output for Channel D,

15 INPUT D Channel D –TTL/CMOS input

16 Vcc Power Supply pin, 5.0V typical

www.artschip.com 7 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Molded Package Small Outline (M) Order Number DS34C87TM 16-Lead Molded Dual-In-Line Package (N) Order Number DS34C87TN