DG201CJ HARRIS | Alldatasheet

Document overview

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Technical content

Features

  • Switches Greater than 28VP-P Signals with±15 Supplies
  • Break-Before-Make Switching tOFF 250ns, tON 700ns Typical
  • TTL, DTL, CMOS, PMOS Compatible
  • Non-Latching with Supply Turn-Off
  • Complete Monolithic Construction
  • Industry Standard (DG200, DG201)

Applications

  • Data Acquisition
  • Sample and Hold Circuits
  • Operational Amplifier Gain Switching Networks December 1993 Pinouts DG200 (CDIP, PDIP) TOP VIEW DG200 (TO-100 METAL CAN) TOP VIEW DG201 (CDIP, PDIP) TOP VIEW IN2 NC GND NC D 2 IN1 NC V+ (SUBSTRATE) NC D 1 VREF D 1 D 2 IN2 2 VREF GND IN1 (SUBSTRATE AND CASE) IN1 D 1 GND IN4 D 4 IN2 V+(SUBSTRATE) VREF D 3 IN3 D 2 File Number 3115

DG200, DG201 Schematic Diagram (1/2 DG200,1/4 DG201) Functional Diagram DG200, DG201 SWITCH CELL VREF INPUT GATE PROTECTION RESISTOR Q10 Q12 Q13 Q11 D 1S1 Q14 Q15 N PIN S D

Specifications DG200 Absolute Maximum Ratings Thermal Information Thermal Resistance θJA θJC Operating Temperature Range CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications(TA = +25oC, V+ = +15V, V- = -15V) PARAMETER TEST CONDITIONS MILITARY COMMERCIAL / INDUSTRIAL UNITS-55oC +25 oC +125 oC 0oC TO -25oC +25 oC +70oC TO +85oC Input Logic Current, IIN(ON) VIN = 0.8V (Notes 2, 3) ±10 ±1 ±10 - ±10 ±10 µA Input Logic Current, IN(OFF) VIN = 2.4V (Notes 2, 3) ±10 ±1 ±10 - ±10 ±10 µA Drain-Source On Resis- tance, rDS(ON) IS = 10mA, VANALOG = ±10V 70 70 100 80 80 100 Ω Channel-to-Channel rDS(ON) Match, rDS(ON) - 25 (Typ) - - 30 (Typ) - Ω Minimum Analog Signal Handling Capability, V ANALOG Switch OFF Leakage Current, ID(OFF) VANALOG = -14V to +14V - ±2 100 - ±5 100 nA Switch OFF Leakage Current, IS(OFF) VANALOG = -14V to +14V - ±2 100 - ±5 100 nA Switch ON Leakage Cur- rent, ID(ON) + IS(ON) VD = VS = -14V to +14V - ±2 200 - ±10 200 nA Switch “ON” Time (Note 1), tON R L = 1kΩ , VANALOG = -10V to +10V (Figure 5) - 1.0 - - 1.0 - µs Switch “OFF” Time, tOFF R L = 1kΩ , VANALOG = -10V to +10V (Figure 5) - 0.5 - - 0.5 - µs Charge Injection, Q(INJ.) Figure 6 - 15 (Typ) - - 20 (Typ) - mV Minimum Off Isolation Rejection Ratio, OIRR f = 1MHz, RL = 100Ω , C L ≤ 5pF (Figure 7, Note 1) - 54 (Typ) - - 50 (Typ) - dB +Power Supply Quiescent Current, IV1 VIN = 0V or VIN = 5V 1000 1000 2000 1000 1000 2000 µA -Power Supply Quiescent Current, IV2 1000 1000 2000 1000 1000 2000 µA Minimum Channel to Channel Cross Coupling Rejection Ratio, CCRR One Channel Off - 54 (Typ) - - 50 (Typ) - dB NOTES: 1. Pull Down Resistor must be≤ 2kΩ 2. Typical values are for design aid only, not guaranteed and not subject to production testing. 3. All channels are turned off by high “1” logic inputs and all channels are turned on by low “0” inputs; however 0.8V to 2.4V describes the minimum range for switching properly. Peak input current required for transition is typically -120µA.

Specifications DG201 Absolute Maximum Ratings Thermal Information oC to +150oC Thermal Resistance θJA θJC Operating Temperature Range CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications(TA = +25oC, V+ = +15V, V- = -15V) PARAMETER TEST CONDITIONS MILITARY COMMERCIAL / INDUSTRIAL UNITS-55oC +25 oC +125 oC 0oC TO -25oC +25 oC +70oC TO +85oC Input Logic Current, IIN(ON) VIN = 0.8V (Note 1) 10 ±11 0 ±1 ±11 0 µA Input Logic Current, IN(OFF) VIN = 2.4V (Note 1) 10 ±11 0 ±1 ±11 0 µA Drain-Source On Resis- tance, rDS(ON) IS = 10mA, VANALOG = ±10V 80 80 125 100 100 125 Ω Channel-to-Channel rDS(ON) Match, rDS(ON) - 25 (Typ) - - 30 (Typ) - Ω Minimum Analog Signal Handling Capability, V ANALOG Switch OFF Leakage Current, ID(OFF) VANALOG = -14V to +14V - ±1 100 - ±5 100 nA Switch OFF Leakage Current, IS(OFF) VANALOG = -14V to +14V - ±1 100 - ±5 100 nA Switch ON Leakage Cur- rent, ID(ON) + IS(ON) VD = VS = -14V to +14V - ±2 200 - ±5 200 nA Switch “ON” Time (Note 2), tON R L = 1kΩ , VANALOG = -10V to +10V (Figure 5) - 1.0 - - 1.0 - µs Switch “OFF” Time (Note 2), tOFF R L = 1kΩ , VANALOG = -10V to +10V (Figure 5) - 0.5 - - 0.5 - µs Charge Injection, Q(INJ.) Figure 6 - 15 (Typ) - - 20 (Typ) - mV Minimum Off Isolation Rejection Ratio, OIRR f = 1MHz, RL = 100Ω , C L ≤ 5pF, (Figure 7) - 54 (Typ) - - 50 (Typ) - dB +Power Supply Quiescent Current, I+Q VIN = 0V or VIN = 5V 2000 1000 2000 2000 1000 2000 µA -Power Supply Quiescent Current, I-Q 2000 1000 2000 2000 1000 2000 µA Minimum Channel to Channel Cross Coupling Rejection Ratio, CCRR One Channel Off - 54 (Typ) - - 50 (Typ) - dB NOTES: 1. Typical values are for design aid only, not guaranteed and not subject to production testing. 2. All channels are turned off by high “1” logic inputs and all channels are turned on by low “0” inputs; however 0.8V to 2.4V describes the minimum range for switching properly. Peak input current required for transition is typically -120µA.

FIGURE 1. RDS(ON) vs VD AND TEMPERATURE FIGURE 2. r DS(ON) vs VD AND POWER SUPPLY VOLTAGE FIGURE 3. ID(ON) vs TEMPERATURE FIGURE 4. I S(OFF) OR ID(OFF) vs TEMPERATURE

4 V- Negative power supply terminal

5 GND Ground terminal (Logic Common)

4 Source (input) terminal for switch 4

10 D 3 Drain (output) terminal for switch 3

11 S 3 Source (input) terminal for switch 3

12 V REF Logic reference voltage

13 V+ Positive power supply terminal (substrate)

2 Source (input) terminal for switch 2

15 D 2 Drain (output) terminal for switch 2

16 IN 2 Logic control for switch 2

2 NC No Connection

3 GND Ground Terminal (Logic Common)

4 NC No Connection

7 V- Negative power supply terminal

10 S 1 Source (input) terminal for switch 1

11 NC No Connection

12 V+ Positive power supply terminal (substrate)

13 NC No Connection

1 Source (input) terminal for switch 1

DIE DIMENSIONS: 74 x 77 x 14± 1mils METALLIZATION: Type: Al Thickness: 10k Å ± 1kÅ GLASSIVATION: Type: SiO2/Si3N 4 SiO2 Thickness: 7kÅ ± 1.4kÅ Si3N 4 Thickness: 8kÅ ± 1.2kÅ WORST CASE CURRENT DENSITY: 1 x 105 A/cm2 Metallization Mask Layout DG200 S1 (10) V- (SUBSTRATE)* (12) (7) D 1 (9) (5) S2 (6) (14) IN1 (1) IN2 (3) GND D 2 * Backside of Chip is V+

DIE DIMENSIONS: 94 x 101 x 14± 1mils METALLIZATION: Type: Al Thickness: 10k Å ± 1kÅ GLASSIVATION: Type: SiO2/Si3N 4 SiO2 Thickness: 7kÅ ± 1.4kÅ Si3N 4 Thickness: 8kÅ ± 1.2kÅ WORST CASE CURRENT DENSITY: 1 x 105 A/cm2 Metallization Mask Layout DG201 S1 (3) V- (4) GND (5) S4 (6) IN2 (16) IN1 (1) D 1 (2) (11) S3 (13) V+ (SUBSTRATE)* (14) S2 (15) (7) D 4 (8) IN4 (9) IN3 (10) D 3 D 2 * Backside of Chip is V+