CS5341-DZZ

CS5341 CIRRUS | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 24

Technical content

Features

Advanced Multi-bit Delta-Sigma Architecture 24-bit Conversion Supports all audio sample rates including 192 kHz. 105 dB Dynamic Range at 5 V -98 dB THD+N High-pass Filter to Remove DC Offsets Analog/digital Core Supplies from 3.3 V to 5 V Supports logic levels between 1.8 V and 5 V. Low-latency Digital Filter Auto-mode Selection General Description The CS5341 is a complete analog-to-digital converter for digital audio systems. It performs sampling, analog-to- digital conversion, and anti-alias filtering, generating 24-bit values for both left and right inputs in serial form at sample rates up to 200 kHz per channel. The CS5341 uses a 5th-order, multi-bit Delta-Sigma modulator followed by digital filtering and decimation, which removes the need for an external anti-alias filter. The CS5341 is ideal for audio systems requiring wide dy- namic range, negligible distortion and low noise, such as set-top boxes, DVD-karaoke players, DVD recorders, A/V receivers, and automotive applications.

ORDERING INFORMATION

CS5341-CZZ, Lead Free -10° to 70° C 16-pin TSSOP CS5341-DZZ, Lead Free -40° to 85° C 16-pin TSSOP CDB5341 Evaluation Board Voltage Reference Serial Output Interface Digital Filter High Pass Filter High Pass Filter Decimation Digital Filter Decimation DAC S/H DAC S/H AINR SCLK SDOUT MCLK RST VQ LRCK AINL FILT+ REFGND VL Q LP Filter Q LP Filter VD GND VA 3.3V - 5.0V 3.3V - 5.0V 1.8V - 5.0V Aug ‘04 DS564PP2

Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative. To find one nearest you go to www.cirrus.com/ IMPORTANT NOTICE “Preliminary” product information describes products that are in production, but for which full characterization data is not yet available. Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP- ERTY OR ENVIRONMENTAL DAMAGE (ìCRITICAL APPLICATIONSî). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, LIFE SUPPORT PRODUCTS OR OTH- ER CRITICAL APPLICATIONS (INCLUDING MEDICAL DEVICES, AIRCRAFT SYSTEMS OR COMPONENTS AND PERSONAL OR AUTOMOTIVE SAFETY OR SECURITY DEVICES). INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMERíS RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABIL- ITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMERíS CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, IN- CLUDING ATTORNEYSí FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

CHARACTERISTICS AND SPECIFICATIONS (All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at typical supply voltages and TA = 25°C.) SPECIFIED OPERATING CONDITIONS (GND = 0 V, all voltages with respect to 0 V.) Notes: This part is specified at typical analog voltages of 3.3 V and 5.0 V. See Analog Characteristics (CS5341- CZ/CZZ) and Analog Characteristics (CS5341-DZZ), below, for details. ABSOLUTE MAXIMUM RATINGS (GND = 0 V, All voltages with respect to ground.) (Note 4) Notes: Any pin except supplies. Transient currents of up to ±100 mA on the analog input pins will not cause SRC latch-up. The maximum over/under voltage is limited by the input current. Operation beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. Parameter Symbol Min Typ Max Unit Power Supplies Analog Digital Logic VA VD VL 3.1 3.1 1.7 (Note 1) 3.3 3.3 5.25 5.25 5.25 V V V Ambient Operating Temperature Commercial (-CZ/-CZZ) (-DZZ) TAC TAC -10 -40 Parameter Symbol Min Max Units DC Power Supplies: Analog Logic Digital VA VL VD -0.3 -0.3 -0.3 +6.0 +6.0 +6.0 V V V Input Current (Note 2) Iin ±10 mA Analog Input Voltage (Note 3) VIN GND-0.7 VA+0.7 V Digital Input Voltage (Note 3) VIND -0.7 VL+0.7 V Ambient Operating Temperature (Power Applied) TA -50 +95 Storage Temperature Tstg -65 +150

ANALOG CHARACTERISTICS (CS5341-CZ/CZZ) Test conditions (unless otherwise speci- fied): Input test signal is a 1 kHz sine wave; measurement bandwidth is 10 Hz to 20 kHz. Parameter Symbol Min Typ Max Unit VA = 3.3 V Single Speed Mode Fs = 48 kHz Dynamic Range A-weighted unweighted 102 dB dB Total Harmonic Distortion + Noise (Note 5) -1 dB -20 dB -60 dB THD+N -95 -79 -39 -89 dB dB dB Double Speed Mode Fs = 96 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 102 dB dB dB Total Harmonic Distortion + Noise (Note 5) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -95 -79 -39 -87 -89 dB dB dB dB Quad Speed Mode Fs = 192 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 102 dB dB dB Total Harmonic Distortion + Noise (Note 5) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -95 -79 -39 -87 -89 dB dB dB dB VA = 5.0 V Single Speed Mode Fs = 48 kHz Dynamic Range A-weighted unweighted 105 102 dB dB Total Harmonic Distortion + Noise (Note 5) -1 dB -20 dB -60 dB THD+N -98 -82 -42 -92 dB dB dB Double Speed Mode Fs = 96 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 105 102 dB dB dB Total Harmonic Distortion + Noise (Note 5) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -98 -82 -42 -95 -92 dB dB dB dB

Note: Referred to the typical full-scale input voltage Quad Speed Mode Fs = 192 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 105 102 dB dB dB Total Harmonic Distortion + Noise (Note 5) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -98 -82 -42 -95 -92 dB dB dB dB Dynamic Performance for All Modes Interchannel Isolation dB DC Accuracy Interchannel Gain Mismatch 0.1 dB Gain Error Gain Drift ±100 ppm/°C Analog Input Characteristics Full-scale Input Voltage 0.53*VA 0.56*VA 0.59*VA Vpp Input Impedance kΩ

ANALOG CHARACTERISTICS (CS5341-DZZ) Test conditions (unless otherwise specified): Input test signal is a 1 kHz sine wave; measurement bandwidth is 10 Hz to 20 kHz. Parameter Symbol Min Typ Max Unit VA = 3.3 V Single Speed Mode Fs = 48 kHz Dynamic Range A-weighted unweighted 102 dB dB Total Harmonic Distortion + Noise (Note 6) -1 dB -20 dB -60 dB THD+N -95 -79 -39 -87 dB dB dB Double Speed Mode Fs = 96 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 102 dB dB dB Total Harmonic Distortion + Noise (Note 6) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -95 -79 -39 -87 -87 dB dB dB dB Quad Speed Mode Fs = 192 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 102 dB dB dB Total Harmonic Distortion + Noise (Note 6) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -95 -79 -39 -87 -87 dB dB dB dB VA = 5.0 V Single Speed Mode Fs = 48 kHz Dynamic Range A-weighted unweighted 105 102 dB dB Total Harmonic Distortion + Noise (Note 6) -1 dB -20 dB -60 dB THD+N -98 -82 -42 -90 dB dB dB Double Speed Mode Fs = 96 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 105 102 dB dB dB Total Harmonic Distortion + Noise (Note 6) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -98 -82 -42 -95 -90 dB dB dB dB

Note: Referred to the typical full-scale input voltage Quad Speed Mode Fs = 192 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 105 102 dB dB dB Total Harmonic Distortion + Noise (Note 6) -1 dB -20 dB -60 dB 40 kHz bandwidth -1 dB THD+N -98 -82 -42 -95 -90 dB dB dB dB Dynamic Performance for All Modes Interchannel Isolation dB DC Accuracy Interchannel Gain Mismatch 0.1 dB Gain Error ±10 Gain Drift ±100 ppm/°C Analog Input Characteristics Full-scale Input Voltage 0.5*VA 0.56*VA 0.62*VA Vpp Input Impedance kΩ

DIGITAL FILTER CHARACTERISTICS (CS5341-CZ/CZZ/DZZ) Note: Response shown is for Fs equal to 48 kHz. Filter characteristics scale with Fs. Parameter Symbol Min Typ Max Unit Single Speed Mode Fs = 48 kHz Passband (-0.1 dB) 23.5 kHz Passband Ripple 0.035 dB Stopband 27.3 kHz Stopband Attenuation dB Total Group Delay (Fs = Output Sample Rate) tgd 12/Fs s Double Speed Mode Fs = 96 kHz Passband (-0.1 dB) kHz Passband Ripple ±0.025 dB Stopband 53.8 kHz Stopband Attenuation dB Total Group Delay (Fs = Output Sample Rate) tgd 9/Fs s Quad Speed Mode Fs = 192 kHz Passband (-0.1 dB) kHz Passband Ripple ±0.025 dB Stopband kHz Stopband Attenuation dB Total Group Delay (Fs = Output Sample Rate) tgd 5/Fs s High Pass Filter Characteristics Frequency Response -3.0 dB -0.13 dB (Note 7) Hz Hz Phase Deviation @ 20 Hz (Note 7) Deg Passband Ripple dB

DC ELECTRICAL CHARACTERISTICS (GND = 0 V, all voltages with respect to 0 V. MCLK=12.288 MHz; Master Mode) Notes: Power Down Mode is defined as RST = Low with all clocks and data lines held static. Valid with the recommended capacitor values on FILT+ and VQ as shown in the Typical Connection Diagram. DIGITAL CHARACTERISTICS THERMAL CHARACTERISTICS Parameter Symbol Min Typ Max Unit DC Power Supplies: Positive Analog Positive Digital Positive Logic VA VD VL 3.1 3.1 1.7 5.25 5.25 5.25 V V V Power Supply Current VA = 5 V (Normal Operation) VA = 3.3 V VL,VD = 5 V VL,VD = 3.3 V IA IA ID ID 18.2 23.1 16.5 mA mA mA mA Power Supply Current VA = 5 V (Power-Down Mode) (Note 8) VL,VD=5 V IA ID 1.5 0.4 mA mA Power Consumption VL, VD, VA = 5 V (Normal Operation) VL, VD, VA = 3.3 V (Power-Down Mode) 180 9.5 198 100 mW mW mW Power Supply Rejection Ratio (1 kHz) (Note 9) PSRR dB VQ Nominal Voltage Output Impedance VA÷2 V kΩ Filt+ Nominal Voltage Output Impedance Maximum allowable DC current source/sink VA 0.01 V kΩ mA Parameter Symbol Min Typ Max Units High-Level Input Voltage (% of VL) VIH 70% V Low-Level Input Voltage (% of VL) VIL 30% V High-Level Output Voltage at Io = 100 µA (% of VL) VOH 70% V Low-Level Output Voltage at Io =100 µA (% of VL) VOL 15% V Input Leakage Current Iin ±10 µA Parameter Symbol Min Typ Max Unit Allowable Junction Temperature 135 Junction to Ambient Thermal Impedance θJA °C/W Ambient Operating Temperature (-CZ/-CZZ) (Power Applied) (-DZZ) TA TA -10 -40 +70 +85

SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT (Logic "0" = GND = 0 V; Logic "1" = VL, CL = 20 pF) * For a description of Speed Modes, please refer to Table 1 on page 17. Parameter Symbol Min Typ Max Unit MCLK Specifications MCLK Period tclkw ns 1953 ns MCLK Pulse Width High tclkh ns MCLK Pulse Width Low tclkl ns Master Mode SCLK falling to LRCK tmslr -20 ns SCLK falling to SDOUT valid tsdo ns SCLK Duty Cycle Slave Mode Single Speed* LRCK Duty Cycle SCLK Period tsclkw 156 ns SCLK Low tsclkhl ns SCLK falling to SDOUT valid tdss ns SCLK falling to LRCK edge tslrd -20 ns Double Speed* LRCK Duty Cycle SCLK Period tsclkw 156 ns SCLK Low tsclkhl ns SCLK falling to SDOUT valid tdss ns SCLK falling to LRCK edge tslrd -20 ns Quad Speed* LRCK Duty Cycle SCLK Period tsclkw ns SCLK Low tsclkhl ns SCLK falling to SDOUT valid tdss ns SCLK falling to LRCK edge tslrd ns

Mode Selection (Input) - Determines the operational mode of the device. MCLK Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters. VL Logic Power (Input) - Positive power for the digital input/output. SDOUT Serial Audio Data Output (Output) - Output for two’s complement serial audio data. GND 5,14 Ground (Input) - Ground reference. Must be connected to analog ground. VD Digital Power (Input) - Positive power supply for the digital section. SCLK Serial Clock (Input/Output) - Serial clock for the serial audio interface. LRCK Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the serial audio data line. RST Reset (Input) - The device enters a low power mode when low. AINL AINR Analog Input (Input) - The full scale analog input level is specified in the Analog Charac- teristics specification table. VQ Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage. VA Analog Power (Input) - Positive power supply for the analog section. FILT+ Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. MCLK FILT+ VL REF_GND SDOUT VA GND AINR VD VQ SCLK AINL LRCK RST

APPLICATIONS

4.1 Single, Double, and Quad Speed Modes The CS5341 can support output sample rates from 2 kHz to 200 kHz. The proper speed mode can be determined by the desired output sample rate and the external MCLK/LRCK ratio, as shown in Table 1. * Quad Speed Mode, 64x only available in Master Mode. Table 1. Speed Modes and the Associated Output Sample Rates (Fs) or slave is made via the Mode pins as shown in Table 2. Table 2. CS5341 Mode Control

the master clock with the left/right clock equal to Fs and the serial clock equal to 64x Fs, as shown in Figure 18. be synchronously derived from the master clock and be equal to 64x Fs to maximize system performance. to the desired mode. The auto-mode selection feature supports all standard audio sample rates from 2 to 200 kHz. Figure 18. CS5341 Master Mode Clocking

minimum specified operating voltages to prevent power glitch related issues. Figure 21. CS5341 Recommended Analog Input Buffer

ensure that all converters begin sampling on the same clock edge. ues used to optimize low frequency distortion performance. Figure 22. CS5341 THD+N versus Frequency

The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified bandwidth. Dynamic Range is a signal-to-noise ratio measurement over the specified bandwidth made with a -60 dBFS signal. 60 dB is added to resulting measurement to refer the measurement to full-scale. This technique ensures that the distortion components are below the noise level and do not affect the measurement. This measurement technique has been accepted by the Audio Engineering Society, AES17-1991, and the Electronic Industries Association of Japan, EIAJ CP-307. Expressed in decibels. Total Harmonic Distortion + Noise The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified bandwidth (typically 10 Hz to 20 kHz), including distortion components. Expressed in decibels. Measured at -1 and -20 dBFS as suggested in AES17-1991 Annex A. Frequency Response A measure of the amplitude response variation from 10 Hz to 20 kHz relative to the amplitude response at 1 kHz. Units in decibels. Interchannel Isolation A measure of crosstalk between the left and right channels. Measured for each channel at the converter's output with no signal to the input under test and a full-scale signal applied to the other channel. Units in decibels. Interchannel Gain Mismatch The gain difference between left and right channels. Units in decibels. Gain Error The deviation from the nominal full-scale analog input for a full-scale digital output. Gain Drift The change in gain value with temperature. Units in ppm/°C. Offset Error

Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold mismatch and are measured at the parting line, mold flash or protrusions shall not exceed 0.20 mm per side. Dimension “b” does not include dambar protrusion/intrusion. Allowable dambar protrusion shall be 0.13 mm total in excess of “b” dimension at maximum material condition. Dambar intrusion shall not reduce dimension “b” by more than 0.07 mm at least material condition. These dimensions apply to the flat section of the lead between 0.10 and 0.25 mm from lead tips. INCHES MILLIMETERS NOTE DIM MIN NOM MAX MIN NOM MAX A 0.043 1.10 0.002 0.004 0.006 0.05 0.15 0.03346 0.0354 0.037 0.85 0.90 0.95 b 0.00748 0.0096 0.012 0.19 0.245 0.30 2,3 D 0.193 0.1969 0.201 4.90 5.00 5.10 E 0.248 0.2519 0.256 6.30 6.40 6.50 0.169 0.1732 0.177 4.30 4.40 4.50 e

0.026 BSC

0.065 BSC

L 0.020 0.024 0.028 0.50 0.60 0.70 JEDEC #: MO-153 Controlling Dimension is Millimeters 16L TSSOP (4.4 mm BODY) PACKAGE DRAWING E N 1 2 3 e A D SEATING PLANE E11 L SIDE VIEW END VIEW TOP VIEW

REVISION HISTORY

-Initial Advance Release. July 2003 -Modified serial port timing specs. -Added Applications section on speed mode detect. PP1 June 2004 -Change 2700 pF capacitors to 2200 pF in analog input buffer diagram. -Update Output Sample Rate Range on page 17. -Add new Applications section about capacitors on FILT+ pin. -Corrected Max MCLK period under “Switching Characteristics” on page 13. -Add CS5341-CZZ as an available part-number. -Replace available part number CS5341-DZ with CS5341-DZZ. -Initial Preliminary Product Release. PP2 Aug 2004 Update data sheet to include lead-free option. Table 5. Revision History